diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/Makefile.in | 206 | ||||
| -rw-r--r-- | sim/lm32/Makefile.in | 9 | ||||
| -rw-r--r-- | sim/lm32/local.mk | 34 |
3 files changed, 167 insertions, 82 deletions
diff --git a/sim/Makefile.in b/sim/Makefile.in index a49d400..9ff05ee 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -200,60 +200,61 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_58 = iq2000/eng.h @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_59 = $(iq2000_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_60 = $(iq2000_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/run -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32/eng.h -@SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_61 = lm32/libsim.a +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_62 = lm32/run +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_63 = lm32_SIM_EXTRA_HW_DEVICES="$(lm32_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_64 = lm32/eng.h @SIM_ENABLE_ARCH_lm32_TRUE@am__append_65 = $(lm32_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_66 = m32c/run -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = $(m32c_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = m32c/opc2c -@SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = \ +@SIM_ENABLE_ARCH_lm32_TRUE@am__append_66 = $(lm32_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_67 = m32c/run +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_68 = $(m32c_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_69 = m32c/opc2c +@SIM_ENABLE_ARCH_m32c_TRUE@am__append_70 = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_70 = m32r/run -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_71 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_71 = m32r/run +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_72 = m32r_SIM_EXTRA_HW_DEVICES="$(m32r_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h -@SIM_ENABLE_ARCH_m32r_TRUE@am__append_73 = $(m32r_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m32r_TRUE@am__append_74 = $(m32r_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_75 = m68hc11/run -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_76 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_77 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = m68hc11/gencode -@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = $(m68hc11_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mcore_TRUE@am__append_80 = mcore/run -@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_81 = microblaze/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_82 = mips/run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_83 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mips_TRUE@am__append_84 = mips/itable.h \ +@SIM_ENABLE_ARCH_m32r_TRUE@am__append_75 = $(m32r_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_76 = m68hc11/run +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_77 = m68hc11_SIM_EXTRA_HW_DEVICES="$(m68hc11_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_78 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_79 = m68hc11/gencode +@SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_80 = $(m68hc11_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mcore_TRUE@am__append_81 = mcore/run +@SIM_ENABLE_ARCH_microblaze_TRUE@am__append_82 = microblaze/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_83 = mips/run +@SIM_ENABLE_ARCH_mips_TRUE@am__append_84 = mips_SIM_EXTRA_HW_DEVICES="$(mips_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_mips_TRUE@am__append_85 = mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC) -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_85 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_86 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_86 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_87 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32 -@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_87 = \ +@SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_88 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run -@SIM_ENABLE_ARCH_mips_TRUE@am__append_88 = $(mips_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mips_TRUE@am__append_89 = $(mips_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_mips_TRUE@am__append_90 = mips/multi-include.h mips/multi-run.c -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_91 = mn10300/run -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_92 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_93 = \ +@SIM_ENABLE_ARCH_mips_TRUE@am__append_90 = $(mips_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mips_TRUE@am__append_91 = mips/multi-include.h mips/multi-run.c +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_92 = mn10300/run +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_93 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)" +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94 = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @@ -262,29 +263,29 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h -@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_94 = $(mn10300_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_95 = $(mn10300_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_moxie_TRUE@am__append_96 = moxie/run -@SIM_ENABLE_ARCH_msp430_TRUE@am__append_97 = msp430/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_98 = or1k/run -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_99 = or1k/eng.h -@SIM_ENABLE_ARCH_or1k_TRUE@am__append_100 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_96 = $(mn10300_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_moxie_TRUE@am__append_97 = moxie/run +@SIM_ENABLE_ARCH_msp430_TRUE@am__append_98 = msp430/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_99 = or1k/run +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_100 = or1k/eng.h @SIM_ENABLE_ARCH_or1k_TRUE@am__append_101 = $(or1k_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_ppc_TRUE@am__append_102 = ppc/run ppc/psim -@SIM_ENABLE_ARCH_pru_TRUE@am__append_103 = pru/run -@SIM_ENABLE_ARCH_riscv_TRUE@am__append_104 = riscv/run -@SIM_ENABLE_ARCH_rl78_TRUE@am__append_105 = rl78/run -@SIM_ENABLE_ARCH_rx_TRUE@am__append_106 = rx/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_107 = sh/run -@SIM_ENABLE_ARCH_sh_TRUE@am__append_108 = \ +@SIM_ENABLE_ARCH_or1k_TRUE@am__append_102 = $(or1k_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_ppc_TRUE@am__append_103 = ppc/run ppc/psim +@SIM_ENABLE_ARCH_pru_TRUE@am__append_104 = pru/run +@SIM_ENABLE_ARCH_riscv_TRUE@am__append_105 = riscv/run +@SIM_ENABLE_ARCH_rl78_TRUE@am__append_106 = rl78/run +@SIM_ENABLE_ARCH_rx_TRUE@am__append_107 = rx/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_108 = sh/run +@SIM_ENABLE_ARCH_sh_TRUE@am__append_109 = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c -@SIM_ENABLE_ARCH_sh_TRUE@am__append_109 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_sh_TRUE@am__append_110 = sh/gencode -@SIM_ENABLE_ARCH_sh_TRUE@am__append_111 = $(sh_BUILD_OUTPUTS) -@SIM_ENABLE_ARCH_v850_TRUE@am__append_112 = v850/run -@SIM_ENABLE_ARCH_v850_TRUE@am__append_113 = \ +@SIM_ENABLE_ARCH_sh_TRUE@am__append_110 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_sh_TRUE@am__append_111 = sh/gencode +@SIM_ENABLE_ARCH_sh_TRUE@am__append_112 = $(sh_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_113 = v850/run +@SIM_ENABLE_ARCH_v850_TRUE@am__append_114 = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @@ -293,8 +294,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h -@SIM_ENABLE_ARCH_v850_TRUE@am__append_114 = $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_115 = $(v850_BUILD_OUTPUTS) +@SIM_ENABLE_ARCH_v850_TRUE@am__append_116 = $(v850_BUILD_OUTPUTS) subdir = . ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ @@ -586,6 +587,25 @@ iq2000_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o am_iq2000_libsim_a_OBJECTS = iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS) +lm32_libsim_a_AR = $(AR) $(ARFLAGS) +@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ +@SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o lm32/cgen-run.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o lm32/cgen-utils.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o lm32/cpu.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o lm32/sem.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o lm32/model.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o lm32/sim-if.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o lm32/user.o +am_lm32_libsim_a_OBJECTS = +lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS) @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \ @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \ @@ -917,11 +937,12 @@ SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \ $(example_synacor_libsim_a_SOURCES) $(frv_libsim_a_SOURCES) \ $(ft32_libsim_a_SOURCES) $(h8300_libsim_a_SOURCES) \ $(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \ - $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \ - $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \ - $(cr16_run_SOURCES) $(cris_run_SOURCES) \ - $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \ - $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \ + $(lm32_libsim_a_SOURCES) $(aarch64_run_SOURCES) \ + $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ + $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ + $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ + $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ + $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ @@ -1473,35 +1494,35 @@ srcroot = $(srcdir)/.. SUBDIRS = @subdirs@ $(SIM_SUBDIRS) AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \ $(am__append_3) $(am__append_16) $(am__append_30) \ - $(am__append_62) $(am__append_71) $(am__append_76) \ - $(am__append_83) $(am__append_92) + $(am__append_63) $(am__append_72) $(am__append_77) \ + $(am__append_84) $(am__append_93) pkginclude_HEADERS = $(am__append_1) noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \ $(am__append_10) $(am__append_12) $(am__append_14) \ $(am__append_17) $(am__append_22) $(am__append_28) \ $(am__append_35) $(am__append_41) $(am__append_45) \ $(am__append_47) $(am__append_52) $(am__append_54) \ - $(am__append_56) + $(am__append_56) $(am__append_61) BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \ $(am__append_37) $(am__append_49) $(am__append_58) \ - $(am__append_63) $(am__append_72) $(am__append_84) \ - $(am__append_93) $(am__append_99) $(am__append_108) \ - $(am__append_113) + $(am__append_64) $(am__append_73) $(am__append_85) \ + $(am__append_94) $(am__append_100) $(am__append_109) \ + $(am__append_114) CLEANFILES = common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ testsuite/common/bits64m63.c -DISTCLEANFILES = $(am__append_90) +DISTCLEANFILES = $(am__append_91) MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \ %,%/stamp-hw,$(SIM_ENABLED_ARCHES)) \ $(common_GEN_MODULES_C_TARGETS) $(patsubst \ %,%/stamp-modules,$(SIM_ENABLED_ARCHES)) $(am__append_7) \ site-sim-config.exp testrun.log testrun.sum $(am__append_21) \ $(am__append_27) $(am__append_34) $(am__append_40) \ - $(am__append_51) $(am__append_60) $(am__append_65) \ - $(am__append_69) $(am__append_74) $(am__append_79) \ - $(am__append_89) $(am__append_95) $(am__append_101) \ - $(am__append_111) $(am__append_115) + $(am__append_51) $(am__append_60) $(am__append_66) \ + $(am__append_70) $(am__append_75) $(am__append_80) \ + $(am__append_90) $(am__append_96) $(am__append_102) \ + $(am__append_112) $(am__append_116) AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS) AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \ $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \ @@ -1514,10 +1535,10 @@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \ $(common_HW_CONFIG_H_TARGETS) $(common_GEN_MODULES_C_TARGETS) \ $(am__append_4) $(am__append_20) $(am__append_25) \ $(am__append_33) $(am__append_38) $(am__append_50) \ - $(am__append_59) $(am__append_64) $(am__append_67) \ - $(am__append_73) $(am__append_77) $(am__append_88) \ - $(am__append_94) $(am__append_100) $(am__append_109) \ - $(am__append_114) + $(am__append_59) $(am__append_65) $(am__append_68) \ + $(am__append_74) $(am__append_78) $(am__append_89) \ + $(am__append_95) $(am__append_101) $(am__append_110) \ + $(am__append_115) SIM_INSTALL_DATA_LOCAL_DEPS = SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43) SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44) @@ -2068,6 +2089,31 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop +@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = +@SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_OBJECTS) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-utils.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cpu.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sem.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/model.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sim-if.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o \ +@SIM_ENABLE_ARCH_lm32_TRUE@ lm32/user.o + @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES = @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \ @@ -2187,8 +2233,8 @@ testsuite_common_CPPFLAGS = \ @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_85) $(am__append_86) \ -@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_87) +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_86) $(am__append_87) \ +@SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_88) @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \ @@ -2715,6 +2761,14 @@ iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EX $(AM_V_at)-rm -f iq2000/libsim.a $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) iq2000/libsim.a +lm32/$(am__dirstamp): + @$(MKDIR_P) lm32 + @: > lm32/$(am__dirstamp) + +lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp) + $(AM_V_at)-rm -f lm32/libsim.a + $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD) + $(AM_V_at)$(RANLIB) lm32/libsim.a clean-checkPROGRAMS: @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ @@ -2855,9 +2909,6 @@ igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_ig iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp) @rm -f iq2000/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS) -lm32/$(am__dirstamp): - @$(MKDIR_P) lm32 - @: > lm32/$(am__dirstamp) lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp) @rm -f lm32/run$(EXEEXT) @@ -4297,6 +4348,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode: @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode +@SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h + +@SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: lm32/%.c +@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +@SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c +@SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in index a39420f..cee1935 100644 --- a/sim/lm32/Makefile.in +++ b/sim/lm32/Makefile.in @@ -5,13 +5,6 @@ arch = lm32 -# List of object files, less common parts. -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - cgen-utils.o cgen-trace.o cgen-scache.o \ - cgen-run.o \ - sim-if.o arch.o \ - cpu.o decode.o sem.o model.o mloop.o \ - lm32.o traps.o user.o +SIM_LIBSIM = ## COMMON_POST_CONFIG_FRAG diff --git a/sim/lm32/local.mk b/sim/lm32/local.mk index 311de7d..987f2ac 100644 --- a/sim/lm32/local.mk +++ b/sim/lm32/local.mk @@ -16,6 +16,40 @@ ## You should have received a copy of the GNU General Public License ## along with this program. If not, see <http://www.gnu.org/licenses/>. +%C%_libsim_a_SOURCES = +%C%_libsim_a_LIBADD = \ + $(common_libcommon_a_OBJECTS) \ + $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \ + $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \ + $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \ + %D%/modules.o \ + \ + %D%/cgen-run.o \ + %D%/cgen-scache.o \ + %D%/cgen-trace.o \ + %D%/cgen-utils.o \ + \ + %D%/arch.o \ + %D%/cpu.o \ + %D%/decode.o \ + %D%/sem.o \ + %D%/mloop.o \ + %D%/model.o \ + \ + %D%/lm32.o \ + %D%/sim-if.o \ + %D%/traps.o \ + %D%/user.o +$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h + +noinst_LIBRARIES += %D%/libsim.a + +%D%/%.o: %D%/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + +%D%/%.o: common/%.c + $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) + %C%_run_SOURCES = %C%_run_LDADD = \ %D%/nrun.o \ |