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-rw-r--r--sim/mips/mips.igen18
1 files changed, 18 insertions, 0 deletions
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 66c475a..ad5700b 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1720,6 +1720,7 @@
000000,5.RS,5.RT,5.RD,00000011000:SPECIAL:32::MULT
+"mult r<RS>, r<RT>":RD == 0
"mult r<RD>, r<RS>, r<RT>"
*vr5000:
*r3900:
@@ -1751,6 +1752,7 @@
}
000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU
+"multu r<RS>, r<RT>":RD == 0
"multu r<RD>, r<RS>, r<RT>"
*vr5000:
*r3900:
@@ -3795,6 +3797,22 @@
*vr5000:
+010000,00001,5.RT,5.RD,000,0000,0000:COP0:64::DMFC0
+"dmfc0 r<RT>, r<RD>"
+*mipsIII,mipsIV:
+{
+ DecodeCoproc (instruction_0);
+}
+
+
+010000,00101,5.RT,5.RD,000,0000,0000:COP0:64::DMTC0
+"dmtc0 r<RT>, r<RD>"
+*mipsIII,mipsIV:
+{
+ DecodeCoproc (instruction_0);
+}
+
+
010000,10000,000000000000000,111000:COP0:32::EI
"ei"
*mipsI,mipsII,mipsIII,mipsIV: