diff options
Diffstat (limited to 'sim/m32r')
34 files changed, 0 insertions, 34020 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog deleted file mode 100644 index 6ee9d85..0000000 --- a/sim/m32r/ChangeLog +++ /dev/null @@ -1,1387 +0,0 @@ -2002-06-16 Andrew Cagney <ac131313@redhat.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2001-11-14 Dave Brolley <brolley@redhat.com> - - * arch.c: Regenerate. - * arch.h: Regenerate. - * cpu.c: Regenerate. - * cpu.h: Regenerate. - * cpuall.h: Regenerate. - * cpux.c: Regenerate. - * cpux.h: Regenerate. - * decode.c: Regenerate. - * decode.h: Regenerate. - * decodex.c: Regenerate. - * decodex.h: Regenerate. - * model.c: Regenerate. - * modelx.c: Regenerate. - * sem-switch.c: Regenerate. - * sem.c: Regenerate. - * semx-switch.c: Regenerate. - -2001-07-05 Ben Elliston <bje@redhat.com> - - * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). - (stamp-cpu): Likewise. - (stamp-xcpu): Likewise. - -2001-03-05 Dave Brolley <brolley@redhat.com> - - * arch.c: Regenerate. - * arch.h: Regenerate. - * cpu.c: Regenerate. - * cpu.h: Regenerate. - * cpuall.h: Regenerate. - * cpux.c: Regenerate. - * cpux.h: Regenerate. - * decode.c: Regenerate. - * decode.h: Regenerate. - * decodex.c: Regenerate. - * decodex.h: Regenerate. - * model.c: Regenerate. - * modelx.c: Regenerate. - * sem-switch.c: Regenerate. - * sem.c: Regenerate. - * semx-switch.c: Regenerate. - -2001-01-12 Frank Ch. Eigler <fche@redhat.com> - - * configure: Regenerated with sim_scache fix. - -2000-11-18 Greg McGary <greg@mcgary.org> - - * Makefile.in: remove `@true' commands for rules that have - $(CGEN_MAINT) as a prerequisite. - -2000-10-06 Dave Brolley <brolley@redhat.com> - - * sem.c: Regenerated. - * sem-switch.c: Regenerated. - * semx-switch.c: Regenerated. - -2000-08-28 Dave Brolley <brolley@redhat.com> - - * Makefile.in: Use of @true confuses VPATH. Remove it. - * cpu.h: Regenerated. - * cpux.h: Regenerated. - * decode.c: Regenerated. - * decodex.c: Regenerated. - * model.c: Regenerated. - * modelx.c: Regenerated. - * sem-switch.c: Regenerated. - * sem.c: Regenerated. - * semx-switch.c: Regenerated. - -2000-08-21 Frank Ch. Eigler <fche@redhat.com> - - * Makefile.in (m32r-clean): Add stamp-arch, stamp-cpu. - (stamp-arch, stamp-cpu): New targets. - -Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -2000-03-30 Dave Brolley <brolley@redhat.com> - - * configure: Regenerated. - -1999-10-04 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,cpuall.h: Rebuild. - * cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild. - -1999-09-29 Doug Evans <devans@casey.cygnus.com> - - * mloop.in: Update call to sim_engine_invalid_insn. - * sem.c,sem-switch.c: Rebuild. - * traps.c (sim_engine_invalid_insn): New arg `vpc'. Change type of - result to SEM_PC. Return vpc. - * mloopx.in: Ditto. - * semx-switch.c: Rebuild. - -Wed Sep 29 14:47:20 1999 Dave Brolley <brolley@cygnus.com> - - * traps.c (sim_engine_invalid_insn): Return PC. - -Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -1999-09-01 Doug Evans <devans@casey.cygnus.com> - - * decodex.c: Rebuild. - -1999-08-28 Doug Evans <devans@casey.cygnus.com> - - * sem.c: Rebuild - - * cpux.h: Rebuild. - -1999-08-09 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - * cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild. - -1999-08-04 Doug Evans <devans@casey.cygnus.com> - - * m32r-sim.h (SEM_SKIP_INSN): Delete. - * cpu.h,cpuall.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. - * cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild. - * mloopx.in (emit_parallel): Call SEM_SKIP_COMPILE. - (emit_full_parallel): Ditto. - -1999-05-08 Felix Lee <flee@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Apr 16 16:47:43 1999 Doug Evans <devans@charmed.cygnus.com> - - * devices.c (device_io_read_buffer): New arg `sd'. - (device_io_write_buffer): New arg `sd'. - (device_error): Give proper arg spec. - -1999-04-10 Doug Evans <devans@casey.cygnus.com> - - * sem-switch.c,sem.c: Rebuild. - * cpux.h,semx-switch.c: Rebuild. - -1999-03-27 Doug Evans <devans@casey.cygnus.com> - - * decode.c: Rebuild. - * decodex.c: Rebuild. - -1999-03-26 Doug Evans <devans@casey.cygnus.com> - - * m32r-sim.h (M32R_DEVICE_LEN): Fix off by one error. - -1999-03-22 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,model.c: Rebuild. - * modelx.c: Rebuild. - * m32r-sim.h (a_m32r_h_gr_get,a_m32r_h_gr_set): Declare. - (a_m32r_h_cr_get,a_m32r_h_cr_set): Declare. - * m32r.c (m32rbf_fetch_register): Replace calls to a_m32r_h_pc_get, - a_m32r_h_accum_get with appropriate calls to m32rbf_*. - (m32rbf_store_register): Ditto. - (a_m32r_h_gr_get,a_m32r_h_gr_set): New functions. - (a_m32r_h_cr_get,a_m32r_h_cr_set): Ditto. - * sim-if.c (sim_open): Update call to m32r_cgen_cpu_open. - * traps.c (m32r_core_signal): Replace calls to a_m32r_h_*, - with appropriate calls to m32rbf_*. - -1999-03-11 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,cpu.c,cpu.h,sem.c,sem-switch.c: Rebuild. - * cpux.c,cpux.h,semx-switch.c: Rebuild. - * m32r-sim.h (GET_H_*,SET_H_*, except GET_H_SM): Delete. - * sim-if.c (sim_open): Update call to m32r_cgen_cpu_open. - -1999-02-25 Doug Evans <devans@casey.cygnus.com> - - * cpu.c,cpu.h: Rebuild. - -1999-02-09 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (SIM_EXTRA_DEPS): Add m32r-desc.h, delete cpu-opc.h. - (stamp-xmloop): s/-parallel/-parallel-write/. - * configure.in (sim_link_files,sim_link_links): Delete. - * configure: Rebuild. - * decode.c,decode.h,model.c,sem-switch.c,sem.c: Rebuild. - * decodex.c,decodex.h,modelx.c,semx-switch.c: Rebuild. - * mloop.in (execute): CGEN_INSN_ATTR renamed to CGEN_INSN_ATTR_VALUE. - * sim-if.c (sim_open): m32r_cgen_cpu_open renamed from - m32r_cgen_opcode_open. Set disassembler. - (sim_close): m32r_cgen_cpu_open renamed from m32r_cgen_opcode_open. - * sim-main.h: Don't include cpu-opc.h,cpu-sim.h. Include - m32r-desc.h,m32r-opc.h,m32r-sim.h. - -Thu Feb 4 16:04:26 1999 Doug Evans <devans@canuck.cygnus.com> - - * cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate. - -1999-01-27 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,model.c,sem-switch.c,sem.c: Rebuild. - * cpux.h,decodex.c,modelx.c,semx-switch.c: Rebuild. - -1999-01-15 Doug Evans <devans@casey.cygnus.com> - - * decode.h,model.c: Regenerate. - * decodex.h,modelx.c: Regenerate. - -1999-01-14 Doug Evans <devans@casey.cygnus.com> - - * arch.c,arch.h,cpuall.h: Regenerate. - * cpu.c,cpu.h,decode.c,decode.h,model.c,sem-switch.c,sem.c: Regenerate. - * traps.c (sim_engine_invalid_insn): PCADDR->IADDR. - * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,semx-switch.c: Regenerate. - -1999-01-11 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (m32r-clean): rm eng.h. - * sim-main.h: Delete inclusion of ansidecl.h. - * cpu.h: Regenerate. - * cpux.h: Regenerate. - -1999-01-06 Doug Evans <devans@casey.cygnus.com> - - * cpu.h: Regenerate. - * cpux.h: Regenerate. - -1999-01-05 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (MAIN_INCLUDE_DEPS): Delete. - (INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete. - (sim-if.o): Use SIM_MAIN_DEPS. - (arch.o,traps.o,devices.o): Ditto. - (M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS. - (m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies. - (m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto. - * cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate. - * m32r-sim.h (m32rbf_h_cr_[gs]et_handler): Declare. - ([GS]ET_H_CR): Define. - (m32rbf_h_psw_[gs]et_handler): Declare. - ([GS]ET_H_PSW): Define. - (m32rbf_h_accum_[gs]et_handler): Declare. - ([GS]ET_H_ACCUM): Define. - (m32rxf_h_{cr,psw,accum}_[gs]et_handler): Declare. - (m32rxf_h_accums_[gs]et_handler): Declare. - ([GS]ET_H_ACCUMS): Define. - * sim-if.c (sim_open): Model probing code moved to sim-model.c. - * m32r.c (WANT_CPU): Define as m32rbf. - (all register access fns): Rename to ..._handler. - * cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate. - * m32rx.c (WANT_CPU): Define as m32rxf. - (all register access fns): Rename to ..._handler. - -1998-12-14 Doug Evans <devans@casey.cygnus.com> - - * configure.in: --enable-cgen-maint support moved to common/aclocal.m4. - (SIM_AC_OPTION_ALIGNMENT): Make strict. - * configure: Regenerate. - - * sem-switch.c,sem.c,semx-switch.c: Regenerate. - * sim-main.h (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Define. - * traps.c (m32r_core_signal): Handle --environment=operating. - -1998-12-09 Doug Evans <devans@casey.cygnus.com> - - * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. - * cpux.h,decodex.c,semx-switch.c: Regenerate. - - * sim-if.c: Include string.h or strings.h if present. - -1998-12-04 Doug Evans <devans@casey.cygnus.com> - - * configure.in: Call SIM_AC_OPTION_INLINE. - * configure: Regenerate. - * sim-main.h: Protect against multiple inclusion. - Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h. - Done by cgen-sim.h now. - * tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h. - * cpuall.h: Regenerate. - * cpu.h,decode.c,sem-switch.c,sem.c: Regenerate. - * mloop.in (extract16): Make static inline again. - Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp. - (extract32): Ditto. - Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp. - (execute): Test ARGBUF_PROFILE_P before profiling. - Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI. - * cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate. - * mloopx.in: Rewrite. - -1998-11-22 Doug Evans <devans@tobor.to.cygnus.com> - - * devices.c (device_io_write_buffer): Fix typo. - * sim-if.c (sim_open): Hack in call to dv_sockser_install. - * tconfig.in (HAVE_DV_SOCKSER): Add but comment out. - -1998-11-18 Doug Evans <devans@casey.cygnus.com> - - * Makefile.in (M32R_OBJS): Delete extract.o. - (extract.o): Delete. - * cpu.c,cpu.h,decode.c,decode.h,sem-switch.c,sem.c: Rebuild. - * mloop.in (extract16): Update type of `insn' arg. - Delete call to d->extract. - (extract32): Ditto. - * cpux.c,cpux.h,decodex.c,decodex.h,semx-switch.c: Rebuild. - * mloopx.in (extractx16): Update type of `insn' arg. - Delete call to d->extract. Delete arg pbb_p. All callers updated. - (extract-simple,full-exec-simple,fast-exec-simple): Delete. - (extractx32): Ditto. - -Wed Nov 4 23:55:37 1998 Doug Evans <devans@seba.cygnus.com> - - * sim-main.h: Delete inclusion of config.h, include sim-basics.h - before cgen-types.h. - * tconfig.in: Guard against multiple inclusion. - * cpu.h: Delete decls moved to genmloop.sh. - * cpux.h: Ditto. - -Mon Oct 19 14:13:05 1998 Doug Evans <devans@seba.cygnus.com> - - * sim-main.h: #include cpu-opc.h. - * arch.c,arch.h,decode.c,extract.c,model.c,sem.c: Regenerate - to get #include cleanup. - * decodex.c,extractx.c,modelx.c: Ditto. - - * Makefile.in (SIM_EXTRA_DEPS): Replace cgen headers with - CGEN_INCLUDE_DEPS. - (M32RBF_INCLUDE_DEPS): Define. - (m32r .o's): Depend on it. - (mloop.c): Update call to genmloop.sh. - * cpu.h,cpuall.h: Regenerate. - * sim-main.h: Delete inclusion of cpu.h,decode.h, moved to cpuall.h. - #include cgen-scache.h,cgen-cpu.h. - * tconfig.in (WITH_FOO semantic macros): Delete. - * Makefile.in (M32RXF_INCLUDE_DEPS): Define. - (m32rx .o's): Depend on it. - (mloopx.c): Update call to genmloop.sh. - * cpux.h: Regenerate. - -Fri Oct 16 09:15:29 1998 Doug Evans <devans@charmed.cygnus.com> - - * sim-if.c (sim_do_command): Handle "sim info reg {bbpsw,bbpc}". - -Fri Oct 9 16:11:58 1998 Doug Evans <devans@seba.cygnus.com> - - Add pseudo-basic-block execution support. - * Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o. - (SIM_EXTRA_DEPS): Add include/opcode/cgen.h. - (INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h. - (mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu. - * arch.c,arch.h,cpuall.h: Regenerate. - * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. - * sem-switch.c,sem.c: Regenerate. - * m32r-sim.h (M32R_MISC_PROFILE): New members load_regs, - load_regs_pending. - * m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register. - (m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set, - m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get, - m32rbf_h_accum_set): Likewise. - (m32r_model_{init,update}_insn_cycles): Delete. - (m32rbf_model_insn_{before,after}): New fns. - (m32r_model_record_cti,m32r_model_record_cycles): Delete. - (m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete. - (m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete. - (check_load_stall): New fn. - (m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns. - (m32rbf_model_test_u_exec): New fn. - * mloop.in: Rewrite, use pbb support. - * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete. - (sim_fetch_register,sim_store_register): Delete. - * sim-main.h (CIA_GET,CIA_SET): Fix. - (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete. - * tconfig.in (WITH_SCACHE_PBB): Define. - (WITH_SCACHE_PBB_M32RBF): Define. - * traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_.... - (m32r_trap): Pass pc to sim_engine_halt. - * configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384. - * configure: Regenerate. - * Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o. - (mloopx.c): Build pseudo-basic-block version. - (semx.o): Delete. - (extractx.o): Add. - * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate. - * readx.c: Delete. - * semx.c: Delete. - * extractx.c: New file. - * semx-switch.c: New file. - * m32r-sim.h (BRANCH_NEW_PC): Delete. - (SEM_SKIP_INSN): New macro. - * m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register. - (m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set, - m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get, - m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise. - (m32rxf_model_insn_{before,after}): New fns. - (m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete. - (m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete. - (check_load_stall): New fn. - (m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns. - * mloopx.in: Rewrite, use pbb support. - * tconfig.in (WITH_SCACHE_PBB_M32RXF): Define. - (WITH_SEM_SWITCH_FULL): Change from 0 to 1. - -Wed Sep 16 18:22:27 1998 Doug Evans <devans@canuck.cygnus.com> - - * m32r-sim.h ({PSW,CBR,SPI,SPU,BPC,BBPSW,BBPC}_REGNUM): New macros. - ({ACC1L,ACC1H}_REGNUM): New macros. - (m32r_decode_gdb_ctrl_regnum): Add prototype. - * m32r.c (m32r_decode_gdb_ctrl_regnum): New function. - (m32r_fetch_register,m32r_store_register): Rewrite. - * m32rx.c (m32rx_fetch_register,m32rx_store_register): Rewrite. - -Tue Sep 15 15:01:14 1998 Doug Evans <devans@canuck.cygnus.com> - - * m32r-sim.h (GET_H_SM): New macro. - (UART params): Update to msa2000. - * devices.c (device_io_read_buffer): Update to msa2000. - * m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw. - (m32rb_h_psw_get,m32rb_h_psw_set): New functions. - * arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate. - * m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw. - (m32rx_h_psw_get,m32rx_h_psw_set): New functions. - * cpux.c,cpux.h,readx.c,semx.c: Regenerate. - -Wed Sep 9 15:29:36 1998 Doug Evans <devans@canuck.cygnus.com> - - * m32r-sim.h (m32r_trap): Update prototype. - * traps.c (m32r_trap): New arg `pc'. - * sem.c,sem-switch.c: Regenerated. - * cpux.h,readx.c,semx.c: Regenerated. - -Mon Aug 3 12:59:17 1998 Doug Evans <devans@seba.cygnus.com> - - Rename cpu m32r to m32rb to distinguish from architecture name. - * Makefile.in (mloop.c): cpu m32r renamed to m32rb. - * sim-main.h (WANT_CPU_M32RB): Renamed from WANT_CPU_M32R. - * tconfig.in (WANT_CPU_M32RB): Ditto. - * m32r.c (WANT_CPU_M32RB): Ditto. - (*): m32r_ cpu fns renamed to m32rb_. - * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Update. - * arch.h,arch.c: Regenerate. - * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. - * sem-switch.c,sem.c: Regenerate. - - * sim-if.c (sim_open): Don't allocate memory on top of any user - specified memory. - (h_gr_get,h_gr_set): Delete. - * sim-main.h (h_gr_get,h_gr_set): Delete. - * traps.c (m32r_trap): Replace calls to h_gr_[gs]et with - a_m32r_h_gr_[gs]et. - - * Makefile.in (INCLUDE_DEPS): Add include/opcode/cgen.h. - - * sim-if.c (sim_open): Open opcode table. - (sim_close): Close it. - -Tue Jul 28 13:06:19 1998 Doug Evans <devans@canuck.cygnus.com> - - Add support for new versions of mulwhi,mulwlo,macwhi,macwlo that - accept an accumulator choice. - * cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate. - -Fri Jul 24 13:00:29 1998 Doug Evans <devans@canuck.cygnus.com> - - * m32r.c: Include cgen-mem.h. - * traps.c (m32r_trap): Tweak for -Wall. - * m32rx.c: Include cgen-mem.h. - * semx.c: Regenerate, get -Wall cleanups. - -Tue Jul 21 16:53:10 1998 Doug Evans <devans@seba.cygnus.com> - - * cpu.h,extract.c: Regenerate. pc-rel calcs done on f_dispNN now. - * cpux.h,readx.c,semx.c: Ditto. - -Wed Jul 1 16:51:15 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in: cgen_maint -> CGEN_MAINT. - * configure.in: AC_SUBST cgen,cgendir. No longer look for guile. - * configure: Regenerate. - * arch.c,arch.h,cpuall.h: Regenerate. - * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. - * sem-switch.c,sem.c: Regenerate. - * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c,readx.c: Regenerate. - * semx.c: Regenerate. - * mloopx.in (icount): Moved here from genmloop.sh. - -Sat Jun 13 07:49:23 1998 Doug Evans <devans@fallis.cygnus.com> - - * m32r-sim.h (M32R_MISC_PROFILE): New members insn_cycles, cti_stall, - load_stall,biggest_cycles. - * m32r.c (m32r_model_mark_get_h_gr): Update. - (m32r_model_init_insn_cycles,m32r_model_update_insn_cycles): New fns. - (m32r_model_record_cti,m32r_model_record_cycles): New functions. - * mloop.in: Call cycle init/update fns. - * model.c: Regenerate. - * m32rx.c (m32rx_model_mark_get_h_gr): Update. - * mloopx.in: Call cycle init/update fns. - * modelx.c: Regenerate. - -Wed Jun 10 17:39:29 1998 Doug Evans <devans@canuck.cygnus.com> - - * traps.c: New file. Trap support moved here from sim-if.c. - * Makefile.in (SIM_OBJS): Add traps.o - * sim-if.c: Don't include targ-vals.h. - (sim_engine_illegal_insn): Moved to traps.c - * sim-main.h (SIM_CORE_SIGNAL): Define. - (m32r_core_signal): Declare. - * m32r-sim.h (m32r_trap): Declare. - - * devices.c (device_io_read_buffer): Handle cache purging via MCCR - register. - - * m32r-sim.h (M32R_MISC_PROFILE): Move here from sim-main.h. - (PROFILE_COUNT_SHORTINSNS,PROFILE_COUNT_LONGINSNS): New macros. - (TRAP_SYSCALL,TRAP_BREAKPOINT): New macros. - - * extract.c,sem-switch.c,sem.c: Regenerate. - * cpux.h,readx.c,semx.c: Regenerate. - -Wed May 20 00:10:40 1998 Doug Evans <devans@seba.cygnus.com> - - * m32r-sim.h (PROFILE_COUNT_PARINSNS): New macro. - * mloopx.in (extract): Set abuf.addr for proper fill nop counting. - (execute): Count parallel insns. - * sim-if.c (print_m32r_misc_cpu): Print count. - * sim-main.h (M32R_MISC_PROFILE): New member parallel_count. - - Zero bottom two bits of pc in jmp,jl insns. - * sem.c,sem-switch.c: Regenerate. - * semx.c: Regenerate. - -Tue May 19 16:45:33 1998 Doug Evans <devans@seba.cygnus.com> - - * sim-if.c (do_trap): Treat traps 2-15 as hardware does. - -Sat May 16 13:04:30 1998 Doug Evans <devans@seba.cygnus.com> - - * sim-if.c (sim_stop): Update call to @cpu@_engine_stop. - (sim_sync_stop): New function. - -Fri May 15 16:43:27 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in (devices.o): Add dependencies. - - * arch.h,cpu.c,cpu.h,cpuall.h: Regenerate. - * sem-switch.c,sem.c: Regenerate. - * mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}. - * cpux.c,cpux.h,modelx.c,semx.c: Regenerate. - * m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions. - * mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}. - Fix pc value passed to TRACE_INSN for second parallel insn. - -Thu May 7 02:51:35 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in (SIM_OBJS): Add sim-cpu.o. - -Wed May 6 14:51:39 1998 Doug Evans <devans@seba.cygnus.com> - - * arch.h,arch.c,cpu.h,cpuall.h: Regenerate, tweaks mostly. - * model.c: Ditto. Reorganize model/mach data. - * cpux.h: Ditto. - * modelx.c: Ditto. - - * Makefile.in (m32r.o,mloop.o,cpu.o,model.o): Add decode.h dependency. - (m32rx.o,mloopx.o,cpux.o,modelx.o): Add decodex.h dependency. - * decode.c,decode.h: Regenerate, introduces IDESC table. - * mloop.in (extract16,extract32): Add IDESC support. - Update names of semantic handler member names. - (execute): Ditto. Delete call to PROFILE_COUNT_INSN. - * decodex.c,decodex.h: Regenerate, introduces IDESC table. - * mloopx.in: Add IDESC support. - Update names of semantic handler member names. - Delete call to PROFILE_COUNT_INSN. - - * sem-switch.c: Regenerate. Redo computed goto label handling. - * sem.c: Regenerate. Call PROFILE_COUNT_INSN. - * readx.c: Regenerate. Redo computed goto label handling. - * semx.c: Regenerate. Call PROFILE_COUNT_INSN. Finish profiling - support. - - * m32r.c (m32r_fetch_register): Change result type and args to - conform to sim_fetch_register interface. - (m32r_store_register): Ditto for sim_store_register interface. - * m32rx.c (m32rx_fetch_register): Change result type and args to - conform to sim_fetch_register interface. - (m32rx_store_register): Ditto for sim_store_register interface. - - * sim-if.c (alloc_cpu): Delete. - (free_state): Uninstall modules here ... - (sim_open): ... and not here. Call sim_cpu_alloc_all. - Set default architecture/model if not specified. - (sim_fetch_register,sim_store_register): Rewrite. - - * sim-if.c (h_pc_get,h_pc_set): Delete. Renamed to sim_pc_[gs]et - and moved to common/sim-cpu.c. - (sim_create_inferior): Update. - (do_trap): Update. - * sim-main.h (h_pc_get,h_pc_set): Delete. - - * sim-main.h (sim_cia): Change to USI. - (sim_cpu): Move m32r_misc_profile before machine generated part. - -Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Apr 28 18:05:53 1998 Nick Clifton <nickc@cygnus.com> - - * model.c: Rebuilt. - * modelx.c: Rebuilt. - -Mon Apr 27 15:36:30 1998 Doug Evans <devans@seba.cygnus.com> - - * cpu.h,model.c,sem-switch.c,sem.c: Regenerated. Mostly comment - and variable renaming due to macro insn additions. - * mloop.in: Update to use CGEN_INSN_NUM. - * cpux.h,modelx.c,readx.c,semx.c: Regenerated. - * mloopx.in: Update to use CGEN_INSN_NUM. - -Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Sun Apr 26 15:20:05 1998 Tom Tromey <tromey@cygnus.com> - - * acconfig.h: New file. - * configure.in: Reverted change of Apr 24; use sinclude again. - -Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Fri Apr 24 11:19:26 1998 Tom Tromey <tromey@cygnus.com> - - * configure.in: Don't call sinclude. - -Mon Apr 20 16:12:35 1998 Doug Evans <devans@canuck.cygnus.com> - - * cpu.c,sem.c,sem-switch.c: Regenerate. From - - cgen/m32r.cpu (h-accum): Add attribute FUN-ACCESS. - * m32r.c (m32r_h_accum_get,m32r_h_accum_set): New functions. - #include cgen-ops.h. - * cpux.c,readx.c,semx.c: Regenerate. - * m32rx.c (m32r_h_accum_get,m32r_h_accum_set): New functions. - #include cgen-ops.h. Delete inclusion of several unnecessary headers. - (m32r_h_accums_get): Sign extend top 8 bits. - -Tue Apr 14 14:04:07 1998 Doug Evans <devans@canuck.cygnus.com> - - * semx.c: Regenerate. - -Fri Apr 10 18:22:41 1998 Doug Evans <devans@canuck.cygnus.com> - - * cpu.h,decode.c,decode.h,extract.c,sem.c,sem-switch.c: Regenerate. - * cpux.h,decodex.c,decodex.h,readx.c,semx.c: Regenerate. - -Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sat Mar 14 20:53:36 1998 Doug Evans <devans@seba.cygnus.com> - - * config.in (HAVE_FCNTL_H): Add. - * configure: Regenerate. - * Makefile.in (SIM_OBJS): Add devices.o. - * m32r-sim.h (m32r_devices): Renamed from m32r_mspr_device. - (UART_*): Define m32r serial port parameters. - (M32R_DEVICE_ADDR,M32R_DEVICE_LEN): Define. - * m32r.c (device_io_{read,write}_buffer,device_error): Move from here, - * devices.c: To here. - * sim-if.c: Don't include signal.h,sim-core.h. - (sim_open): Use M32R_DEVICE_{ADDR,LEN} in sim_core_attach call. - (sim_resume): Call sim_module_{resume,suspend}. - * m32r.c (m32r_h_cr_{get,set}): Use register number enums. - - * tconfig.in (SIM_HANDLES_LMA): Define. - - * sim-if.c (do_trap): Result is new pc. - Handle --environment=operating. - * sem-switch.c,sem.c: Regenerate. - * semx.c: Regenerate. - -Wed Mar 11 14:07:39 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (syscall_read_mem, syscall_write_mem): Replace - sim_core_*_map with read_map, write_map, exec_map resp. - -Wed Mar 4 11:36:51 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in (SIM_EXTRA_DEPS): Add cpu-opc.h. - (arch.o): Delete cpu-opc.h dependency. - (decode.o,model.o): Likewise. - (decodex.o,modelx.o): Likewise. - - * cpu.h,model.c,sem-switch.c,sem.c: Regenerate. - * cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate. - -Thu Feb 26 18:38:35 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Initialize PROFILE_INFO_CPU_CALLBACK. - - * sim-if.c (sim_info): Delete. - -Fri Feb 27 10:14:29 1998 Doug Evans <devans@canuck.cygnus.com> - - * mloopx.in: Fix handling of branch in parallel with another insn. - * semx.c: Regenerate. - -Mon Feb 23 13:30:46 1998 Doug Evans <devans@seba.cygnus.com> - - * sim-main.h: #include symcat.h. - * m32r-sim.h (BRANCH_NEW_PC): Delete current_cpu arg. - (NEW_PC_{BASE,SKIP,2,4,BRANCH_P}): New macros. - * cpu.[ch],decode.[ch],extract.c,model.c: Regenerate. - * sem.c,sem-switch.c: Regenerate. - * m32r-sim.h (SEM_NEXT_PC): Modify to handle parallel exec. - * mloopx.in: Rewrite. - * cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate. - -Mon Feb 23 12:27:52 1998 Nick Clifton <nickc@cygnus.com> - - * m32r.c (m32r_h_cr_set, m32r_h_cr_get): Shadow control register 6 - in the backup PC register. - * m32rx.c (m32r_h_cr_set, m32r_h_cr_get): Shadow control register 6 - in the backup PC register. - -Thu Feb 19 16:39:35 1998 Doug Evans <devans@canuck.cygnus.com> - - * m32r.c (do_lock,do_unlock): Delete. - * cpu.[ch],decode.[ch],extract.c,model.c: Regenerate. - * sem.c,sem-switch.c: Regenerate. - * cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate. - -Tue Feb 17 18:18:10 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in (M32R_OBJS): Add cpu.o. - (cpu.o): Add rule for. - (NL_TARGET): Define. - * configure.in: Add AC_CHECK_PROG(SCHEME). - * cpu.c: New file. - * cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate. - * sem-switch.c,sem.c: Regenerate. - * mloop.in (execute): Update call to semantic fn. - (M32RX_OBJS): Add cpux.o. - (cpux.o): Add rule for. - cpux.c: New file. - * cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate. - * m32rx.c (m32rx_h_accums_{get,set}): Rewrite. - (m32rx_h_cr_{get,set}): New functions. - (m32rx_h_accums_{get,set}): New functions. - * mloopx.in: Rewrite main loop. - - * m32r.c (do_trap): Move from here. - * sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support. - (sim_create_inferior): Use h_pc_set. - (h_pc_{get,set}): New functions. - (h_gr_{get,set}): New functions. - (syscall_{read,write}_mem): New functions. - * sim-main.h (h_{gr,pc}_{get,set}): Declare. - -Tue Feb 17 12:44:38 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_store_register, sim_fetch_register): Pass in - length parameter. Return -1. - (sim_create_inferior): Pass 4 sim_store_register. - -Wed Feb 11 19:53:48 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim-main.h (CIA_GET,CIA_SET): Provide dummy definitions for now. - - * decode.c, decode.h, sem.c, sem-switch.c, model.c: Regenerate. - * cpux.c, decodex.c, decodex.h, readx.c, semx.c, modelx.c: Regenerate. - -Mon Feb 9 19:41:54 1998 Doug Evans <devans@canuck.cygnus.com> - - * decode.c, sem.c: Regenerate. - * cpux.h, decodex.c, readx.c, semx.c: Regenerate. - * m32rx.c (m32rx_h_accums_set): New function. - (m32rx_model_mark_[gs]et_h_gr): New function. - * mloopx.in: Rewrite. - * Makefile.in (mloopx.o): Build with -parallel. - * sim-main.h (_sim_cpu): Delete member `par_exec'. - * tconfig.in (WITH_SEM_SWITCH_FULL): Define as 0 for m32rx. - -Thu Feb 5 12:44:31 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in (m32r.o): Depend on cpu.h - (extract.o): Pass -DSCACHE_P. - * mloop.in (extract{16,32}): Update call to m32r_decode. - * arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate. - * extract.c,model.c,sem-switch.c,sem.c: Regenerate. - * sim-main.h: #include "ansidecl.h". - Don't include cpu-opc.h, done by arch.h. - * Makefile.in (M32RX_OBJS): Build m32rx support now. - (m32rx.o): New rule. - * m32r-sim.h (m32rx_h_cr_[gs]et): Define. - * m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC. - (m32rx_h_accums_get): New function. - * mloopx.in: Update call to m32rx_decode. Rewrite exec loop. - * cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate. - -Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Thu Jan 29 11:22:00 1998 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (M32RX_OBJS): Comment out until m32rx port working. - * arch.h (HAVE_CPU_M32R{,X}): Delete, moved to m32r-opc.h. - * arch.c (machs): Check ifdef HAVE_CPU_FOO for each entry. - -Tue Jan 20 14:16:02 1998 Nick Clifton <nickc@cygnus.com> - - * cpux.h: Fix duplicate definition of h_accums field for - fmt_53_sadd structure. - -Tue Jan 20 01:42:17 1998 Doug Evans <devans@seba.cygnus.com> - - * Makefile.in: Add m32rx objs, and rules to build them. - * cpux.h, decodex.h, decodex.c, readx.c, semx.c, modelx.c: New files. - * m32rx.c, mloopx.in: New files. - -Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Mon Jan 19 14:13:40 1998 Doug Evans <devans@seba.cygnus.com> - - * arch.c, arch.h, cpuall.h: New files. - * arch-defs.h: Deleted. - * mloop.in: Renamed from mainloop.in. - * Makefile.in: Update. - * sem-ops.h: Deleted. - * mem-ops.h: Deleted. - (arch): Renamed from CPU. - * cpu.h: New file. - * decode.c: Redone. - * decode.h: Redone. - * extract.c: Redone. - * model.c: Redone. - * sem-switch.c: Redone. - * sem.c: Renamed from semantics.c, and redone. - * m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update. - (GETTWI,SETTWI,BRANCH_NEW_PC): Define. - * m32r.c (WANT_CPU,WANT_CPU_M32R): Define. - (m32r_{fetch,store}_register): New functions. - (model_mark_{get,set}_h_gr): Prefix with m32r_. - (m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_. - (h_cr_{get,set}): Prefix with m32r_. - (do_trap): Fetch state from current_cpu, not current_state. - Call sim_engine_halt instead of engine_halt. - * sim-if.c (alloc_cpu): New function. - (free_state): New function. - (sim_open): Call sim_state_alloc, and malloc space for selected cpu - type. Call sim_analyze_program. - (sim_create_inferior): Handle selected cpu type when setting PC. - (sim_resume): Handle m32rx. - (sim_stop_reason): Deleted. - (print_m32r_misc_cpu): Update. - (sim_{fetch,store}_register): Handle m32rx. - (sim_{read,write}): Deleted. - (sim_engine_illegal_insn): New function. - * sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h. - Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r. - Include cpux.h,decodex.h if m32rx. - (_sim_cpu): Include member appropriate cpu_data member for the cpu. - (M32R_MISC_PROFILE): Renamed from M32R_PROFILE. - (sim_state): Delete members core,events,halt_jmp_buf. - Change `cpu' member to be a pointer to the cpu's struct, rather than - record inside the state struct. - * tconfig.in (WITH_DEVICES): Define here. - (WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu. - -Fri Jan 16 12:16:56 1998 Nick Clifton <nickc@cygnus.com> - - * arch-defs.h (INSN_NAME): Fix typo. - -Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> - - * m32r-sim.h (MSPR_ADDR): New macro. - (m32r_mspr_device): Declare. - (struct _device): Define. - * m32r.c (m32r_mspr_device): New global. - (device_{io_{read,write}_buffer,error}): New functions. - * mem-ops.h (SETMEM*): Use sim_core_write_map, not read map. - * sim-if.c: Delete redundant inclusion of cpu-sim.h. - (sim_open): Attach device to handle MSPR register. - * sim-main.h (WITH_DEVICES): Define as 1. - Include cpu-sim.h. - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Dec 3 18:08:44 1997 Doug Evans <devans@canuck.cygnus.com> - - * configure.in (SIM_AC_OPTION_ENVIRONMENT): Call. - * configure: Regenerated. - -Wed Nov 19 12:17:08 1997 Doug Evans <devans@canuck.cygnus.com> - - * mem-ops.h: Rename SIM_SIG{ACCESS,ALIGN} to SIM_SIG{SEGV,BUS}. - * sim-if.c (sim_open): Call sim_config. - (sim_stop_reason): Update call to sim_signal_to_host. - -Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). - -Fri Oct 31 18:46:46 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Delete dead call to sim_core_attach. - -Mon Oct 27 12:43:54 1997 Doug Evans <devans@canuck.cygnus.com> - - * sem-ops.h (U{DIV,MOD}[BHSD]I): Use unsigned division. - -Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_SCACHE, - SIM_DEFAULT_MODEL): Delete, moved to common. - (SIM_EXTRA_CFLAGS): Update. - -Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure.in (sim_link_links): Configure non-strict memory - alignment. - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Wed Sep 17 17:44:40 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Allocate memory under sim-memopt module - using sim_do_commandf. - (sim_open): Set magic-number at the start. - (sim_do_command): Implement. - - * sim-main.h (sim_engine_halt): Map onto engine_halt. - -Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Fri Sep 5 10:21:48 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (SIM_OBJS): Add sim-memopt.o module. - -Thu Sep 4 10:30:02 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Pass zero modulo arg to sim_core_attach. - -Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Tue Aug 26 10:39:42 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_kill): Delete. - (sim_create_inferior): Add ABFD argument. - (sim_load): Move setting of PC from here. - (sim_create_inferior): To here. - (sim_load): Delete, use sim-hload.c instead. - - * Makefile.in (SIM_OBJS): Add sim-hload.o module. - -Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - * config.in: Ditto. - -Mon Aug 25 15:54:08 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Add ABFD argument. - -Tue Jul 22 10:16:16 1997 Doug Evans <dje@canuck.cygnus.com> - - * sim-main.h (M32R_DEFAULT_MEM_SIZE): New macro. - * sim-if.c (sim_open): Use it. - -Wed Jun 4 12:48:12 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-main.h (WITH_ENGINE): Disable the common engine for now. - -Tue May 27 14:15:44 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_read): Pass NULL cpu to sim_core_read_buffer. - (sim_write): Ditto for write. - - * m32r.c (do_trap): Ditto for read/write. - -Tue May 20 10:18:25 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Add callback argument. - (sim_set_callbacks, sim_callback): Delete. - (sim_load): Set STATE_LOADED_P. - -Mon May 19 12:55:42 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (SIM_OBJS): Link in sim-abort.o as a stub for - sim_engine_abort. - -Mon May 5 12:45:28 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * sim-if.c (sim_open): Update to reflect changes to core in - ../common/. - * mem-ops.h (GETMEMQI, GETMEMHI, GETMEMSI, GETMEMDI, GETMEMUQI, - GETMEMUHI, GETMEMUSI, GETMEMUDI, SETMEMQI, SETMEMHI, SETMEMSI, - SETMEMDI, SETMEMUQI, SETMEMUHI, SETMEMUSI, SETMEMUDI): Ditto. - -Sat May 3 08:38:55 1997 Doug Evans <dje@seba.cygnus.com> - - * decode.c (decode): Add computed goto support. - -Fri May 2 16:30:26 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * mem-ops.h: Stub additional core read/write arguments. - - * sim-main.h: Declare sim_cia - type SI. - (struct _sim_cpu): Move base type to end per common. - (struct _sim_state): Ditto. - -Thu May 1 11:15:34 1997 Doug Evans <dje@canuck.cygnus.com> - - Merge from branch into devo. CGEN generic files moved to common - directory. K&R C support is no longer provided. - -Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> - - * configure: Regenerated to track ../common/aclocal.m4 changes. - -Sat Apr 12 12:57:33 1997 Felix Lee <flee@yin.cygnus.com> - - * Makefile.in, seman-cache.c: new file, for wingdb build. - * sim-alloca.h: fixed for wingdb. - -Mon Apr 7 13:33:29 1997 Doug Evans <dje@seba.cygnus.com> - - * decode.c (*): m32r_cgen_insn_table renamed to ..._entries. - * mainloop.in: Use CGEN_INSN_INDEX instead of CGEN_INSN_TYPE. - * simdefs.h (INSN_NAME): m32r_cgen_insn_table renamed to ..._entries. - -Fri Apr 4 19:23:12 1997 Doug Evans <dje@canuck.cygnus.com> - - * cgen-utils.in (ex_illegal): Fill in abuf->length, abuf->addr. - (exc_illegal): Likewise. - * decode.c (decode_vars): Add decode_illegal. - * genmloop.sh: #include "cpu-opc.h". - * sem-switch.c (case_INSN_ILLEGAL): Declare. - (labels): Add case_INSN_ILLEGAL. - (SWITCH): Add INSN_ILLEGAL case. - -Wed Mar 26 12:34:00 1997 Doug Evans <dje@canuck.cygnus.com> - - * model.c (model_module): Use 0 not NULL. - - * genmloop.sh (sim_main_loop): Handle k&r c. - - * sem-switch.c: Regenerate to get k&r c support. - * semantics.c: Likewise. - - * m32r.c (ADD_{OV,CA}_SI,SUB_{OV,CA}_SI): Renamed to {ADD,SUB}[OC]FSI. - (ADDCSI,SUBCSI): New functions. - * sem-switch.c (addv,addv3,addx,subv,subx): Fix carry bit handling. - * semantics.c (addv,addv3,addx,subv,subx): Fix carry bit handling. - - * simcache.c (simcache_{install,init,uninstall}): Use - DECLARE_MODULE_INSTALL_HANDLER. - (simcache_option_handler): Use DECLARE_OPTION_HANDLER. - - * utils.c: #include "semops.h". - -Tue Mar 11 14:30:26 1997 Doug Evans <dje@seba.cygnus.com> - - * profile.c (profile_print_simcache): Fix thinko in printf text. - - * simdefs.h (struct argbuf): Add member to fmt_20 so it's not empty. - -Mon Mar 10 11:06:29 1997 Doug Evans <dje@seba.cygnus.com> - - * m32r.c (h_cr_get): Rewrite. - (h_cr_set): Rewrite. - * sem-switch.c (rte): bcarry renamed to bcond. - * semantics.c (rte): Likewise. - * simdefs.h (CPU_STATE): Likewise. - - * config.in (HAVE_SYS_TIME_H): Add. - * configure.in: Check for sys/time.h. - * configure: Regenerated. - * utils.c: Include sys/time.h if present. - - * common.c (sim_parse_args): Account for NULL terminating entry - in long_options table. - - * genmloop.sh (RUN_FAST_P): Don't run fast if tracing. - Always use cache if configured in. - * mainloop.in (do_extract_insn{16,32}): New functions. - (normal,fast): Call them. Handle starting in left slot. - * simcache.c (simcache_option_handler): Disallow -c0. - * sem-switch.c (TRACE_RESULT): Redefine so no tracing. - - * profile.c (profile_print_simcache): Fix percentage calc. - - * Makefile.in (INCLUDE_DEPS): Delete simcommon.h. - -Sun Mar 9 20:42:17 1997 Doug Evans <dje@seba.cygnus.com> - - * Makefile.in (COMMON_{PRE,POST}_CONFIG_FRAG): Add delimiters for. - (M32R_INCLUDE_DEPS): Use cpu-sim.h instead of m32r-sim.h. - Add mod-list.h. - (mrun.o): Don't depend on M32R_INCLUDE_DEPS. - (sim-if.o,m32r.o,utils.o): Likewise. - (common.o): Don't explicitly depend on mod-list.h. - (mainloop.c): Pass CPU to genmloop.sh. - (stamp-modules): Depend on configure. - (decode.o): Depend on decode,h, memops.h, semops.h, cpu-opc.h. - (extract.o): Depend on decode.h, memops.h, semops.h. - (semantics.o,seman-cache.o): Likewise. - (model.o,ops.o): Depend on memops.h. - (extr-cache.o): Disable building for the moment. - - * simcommon.h: Delete, move contents into cgen-sim.h. - * cgen-sim.h: Don't include ansidecl.h,bfd.h,simfns.h. - (UINT,CGEN_CAT3): Define. - ({extract,semantic}_fn_t): Renamed to {EXTRACT,SEMANTIC}_FN. - (decode_t): Renamed to DECODE. - - * simfns.h: Delete, contents moved to memops.h,semops.h. - * memops.h: New file. - * semops.h: New file. - * decode.h: Renamed from semantics.h. - - * sim-argv.h: New file. - * Makefile.in (memory.o,trace.o,profile.o,simcache.o,common): Add - dependency of sim-argv.h. - - * sim-alloca.h: New file. - * common.c: Include it. - * Makefile.in (common.o): Add dependency. - - * config.in (HAVE_TIME_H,HAVE_SYS_RESOURCE_H): Add. - (HAVE_GETRUSAGE,HAVE_TIME): Add. - * configure.in: sinclude ../common/aclocal.m4. - Check for headers time.h, sys/resource.h. - Check for functions time, getrusage. - (sim_link_{files,links}): Add link cpu-opc.h. - (sim_profile): Add simcache. - (SIM_AC_PROFILE): Add simcache, profile.o. - (simcache module): Delete extr-cache.o for now. - (--enable-sim-cache): Allow specification of default cache size. - * configure: Regenerated. - - * decode.c: #include cgen-sim.h,memops.h,semops.h,decode.h, - cpu-sim.h,cpu-opc.h. Don't include m32r-sim.h. - Regenerate. - - * extract.c: #include cgen-sim.h,decode.h,cpu-sim.h. - Don't include m32r-sim.h. - (*): Define/Undef FLD macro. Use it to reference ARGBUF. - Simplify profiling test with PROFILE_MODEL_P. - (mvfc,mvtc): Fix access of control registers. - * semantic.c: #include cgen-sim.h,memops.h,semops.h,decode.h,cpu-sim.h. - Don't include m32r-sim.h. - (*): Define/Undef FLD macro. Use it to reference ARGBUF. - Simplify profiling test with PROFILE_MODEL_P. - (mvfc,mvtc): Fix access of control registers. - - * sem-switch.c: New file, for GCC computed goto support. - - * genmloop.sh: Add #include's of bfd.h,callback.h,cgen-sim.h, - memops.h,semops.h,trace.h,cpu-sim.h. - (RUN_FAST_P): Change default to run fast if cache size > 0 - and not profiling. - (sim_main_loop): Record execution time. - Record instruction count even in fast mode. - (init): Allow cpu to provide init code in mainloop.in. - (FAST): Define as 0 or 1 depending on fast mode. - * mainloop.in (normal): Combine with fast case. - Add support for GCC computed gotos. Count simcache hits/misses. - (init): Initialize "switch" labels if GNUC. - - * cgen-utils.in: Don't include opcode/cgen.h. - Include cgen-sim.h, cpu-opc.h. - * common.c: Don't include simcommon.h,mod-list.h. Include cgen-sim.h. - * m32r-sim.h: Don't include mod-list.h - (RUN_FAST_P): Delete. - * m32r.c: Don't include profile.h. #include ansidecl.h,cgen-sim.h, - semops.h,memory.h,trace.h - (h_cr_get,h_cr_set): New functions. - * memory.c: #include cgen-sim.h,callback.h. - * ops.c: Don't include profile.h,m32r-sim.h. - Include cgen-sim.h,memops.h,cpu-sim.h. - (MEMOPS_DEFINE_INLINE): Renamed from SIMFNS_DEFINE_INLINE. - * trace.c: Include cgen-sim.h,cpu-opc.h. - * trace.h (trace_insn_{init,fini}): Declare. - - * model.c: Don't include signal.h,stdlib.h,m32r-sim.h. - Include cgen-sim.h,cpu-sim.h,cpu-opc.h. - Regenerate to get new insn aliases. - - * mrun.c: #include "ansidecl.h". - (STATE): Use struct sim_state instead. - - * profile.c: Surround #include <stdlib.h> with HAVE_STDLIB_H. - Don't include simcommon.h. Include cgen-sim.h,cpu-opc.h. - (PROFILE_{READ,WRITE}_MASK): Replace with PROFILE_MEMORY_MASK. - (profile_print_simcache): New function. - (profile_print): Call it. Print simulator speed stats. - * profile.h (PROFILE_{READ,WRITE}_MASK): Replace with - PROFILE_MEMORY_MASK. - (MODULE_PROFILE_SIMCACHE_P): Define. - (PROFILE_SIMCACHE_MASK): Define. - (PROFILE_COUNT): New members total_insn_count,exec_time. - New members simcache_hits,simcache_misses. - (PROFILE_SIMCACHE_{HITS,MISSES}): Define. - (PROFILE_MODEL_P): New macro. - (PROFILE_COUNT_SIMCACHE_{HIT,MISS}): New macros. - - * sim-if.c: Surround #include <stdlib.h> with HAVE_STDLIB_H. - Don't include simcommon.h,m32r-sim.h. Include cgen-sim.h,cpu-sim.h. - (sim_resume): Use USING_SIMCACHE_P instead of RUN_FAST_P. - (sim_info): Pass verbose to profile_print. - - * simcache.c: Include cgen-sim.h,callback.h. - (USING_SIMCACHE_P): Replace with SIMCACHE_P. - (simcache_option_handler): Ensure cache size at least 2. - Allow config time specification of default cache size. - * simcache.h (struct simcache): Support GCC computed gotos. - (SIMCACHE_DEFAULT_CACHE_SIZE): USe CONFIG_SIM_CACHE_SIZE if defined. - (USING_SIMCACHE_P): New macro. - - * simdefs.h: Don't include m32r-opc.h. - (CGEN_MAX_SIM_INSNS): Define. - (CPU_STATE): Regenerate. - (ARGBUF): Regenerate. - (extract,semantic handler decls): Delete, moved to decode.h. - - * tconfig.in: Don't include cgen-sim.h,m32r-sim.h. - (USE_SEM_SWITCH): Define. - - * utils.c: Include bfd.h,time.h,sys/resource.h. - (sim_time_get,sim_time_elapsed): New functions. - * cgen-sim.h (SIM_TIME,sim_time_get,sim_time_elapsed): Declare. - -Fri Jan 31 20:25:06 1997 Doug Evans <dje@canuck.cygnus.com> - - * configure.in (AC_CHECK_HEADERS): Handle i386-windows. - * configure: Regenerated. - * model.c: #include <stdlib.h>. - * simcache.c: #include "libiberty.h". - * simcommon.h (alloca): Handle i386-windows. - - * common.c: #include libiberty.h. - (sim_signal_to_host): Return 5 if wingdb. - -Mon Jan 27 15:22:49 1997 Doug Evans <dje@seba.cygnus.com> - - * configure.in (sim_cache): Enabled by default now, pass default - cache size to --enable-sim-cache. - * simcache.c (simcache_option_handler): Allow -c 0. - - * simdefs.h,simfns.h: Regenerate - * decode.c,extract.c,model.c,ops.c,semantics.c: Regenerate. - -Tue Jan 21 16:21:01 1997 Doug Evans <dje@seba.cygnus.com> - - Add model profiling support. - * configure.in: Handle --enable-sim-model. - (sim_profile): Add model. - * Makefile.in (model.o): Add rule. - * cgen-sim.h (UNIT,INSN_TIMING,MACH,MODEL): New types. - * extract.c (*): Add model profiling support. - * m32r.c (model_mark_{get,set}_h_gr): New functions. - (model_mark_{busy,unbusy}_reg): New functions. - * profile.c (profile_option_handler): Recognize --profile model. - (profile_print_model): New function. - (profile_print): Call it. - * profile.h (MODULE_profile_model,MODULE_PROFILE_MODEL_P): Define. - (PROFILE_MODEL_MASK,PROFILE_LABEL_WIDTH): Define. - (PROFILE_COUNT): New members cycle_count,cti_stall_count, - load_stall_count,taken_count,untaken_count. - * semantics.c (*): Add model profiling support. - * simcommon.h (struct sim_state): New members mach,model. - * simdefs.h (CPU_PROFILE,MODEL_TYPE,UNIT_TYPE): New type. - (MAX_MODELS,MAX_UNITS): Define. - * tconfig.in (STATE_EXTRA_MEMBERS): Add cpu_profile. - - * Makefile.in (INCLUDE_DEPS): Add $(SIM_MODULES_HDRS). - (stamp-modules): Depend on genmodlist.sh. - * common.c (standard_options): Add --max-insns. - (copy_argv): New function. - * tconfig.in (SIM_HAVE_MAX_INSNS): Define. - * genmloop.sh: Allow mainloop.in to contain support code. - * mainloop.in: Move do_insn16,do_insn32 here. - * m32r.c (do_trap): Handle SYS_argvlen,SYS_argv,SYS_read. - * sim-if.c (sim_open): Don't set max insn count. - (sim_create_inferior): Save argv,envp. - * simcommon.h (struct sim_state): New members argv,envp. - * simdefs.h ([GS]ETTWI,[GS]ETTUWI,[GS]ETTAI): Define. - ([GS]ETMEMWI,[GS]ETMEMUWI,[GS]ETMEMAI): Define. - (ARGBUF): New members h_gr_get, h_gr_set. - * trace.c (trace_insn_init,trace_insn_fini): New functions. - (trace_printf): Print to buffer, output later by trace_insn_fini. - * trace.h (TRACE_INSN_{INIT,FINI}): Define. - -Thu Dec 19 16:01:59 1996 Doug Evans <dje@canuck.cygnus.com> - - * configure.in (AC_FUNC_ALLOCA): Call. - * configure: Regenerate. - * config.h (HAVE_ALLOCA_H): Add. - * simcommon.h: Add alloca support. - (DECLARE_MODULE_INSTALL_HANDLER): Define. - (DECLARE_OPTION_HANDLER): Define. - (MEM_FN): Declare using PARAMS. - (DECLARE_MEM_FN): Define. - * trace.c (trace_result): Tweak for !STDC. - * cgen-sim.h (UDI_FN_SUPPORT): Define if ! HAVE_LONGLONG. - * cgen-utils.in (disasm_sprintf): Fix va_arg call in !STDC case. - * common.c (sim_print_help_fn): Use PARAMS. - (standard_option_handler): Fix decl for !STDC systems. - * memory.c: #include <stdio.h> - (mem_flat_{install,init,uninstall}): Fix decl for !STDC systems. - (mem_flat_{read,write},mem_flat_option_handler): Likewise. - * profile.c (profile_install): Likewise. - (profile_option_handler): Likewise. - -Thu Dec 19 11:06:19 1996 Doug Evans <dje@seba.cygnus.com> - - * semantics.c (*): Don't suffix big unsigned numbers with "U". - Prefix them with 0x instead. - - * cgen-sim.h (DI_FN_SUPPORT): Define if ! HAVE_LONGLONG. - (SLADI,SRADI,CONVSIDI,CONVDISI): Delete, moved to simfns.h. - * semantics.c (machi,maclo,macwhi,macwlo,mulhi,mullo): Implement. - (mulwhi,mulwlo,mvtachi,mvtaclo,rac,rach): Implement. - * simfns.h: Add decls for functional DI,UDI,SF,DF,XF,TF support. - Add support for boolean and/or. - * utils.c: Redo naming of DI functional support. - (ANDDI,ORDI,ADDDI,MULDI,GEDI,LEDI,CONVHIDI): New functions. - -Tue Dec 17 12:57:48 1996 Doug Evans <dje@seba.cygnus.com> - - * Directory created. diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in deleted file mode 100644 index 7f40a85..0000000 --- a/sim/m32r/Makefile.in +++ /dev/null @@ -1,145 +0,0 @@ -# Makefile template for Configure for the m32r simulator -# Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc. -# Contributed by Cygnus Support. -# -# This file is part of GDB, the GNU debugger. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -## COMMON_PRE_CONFIG_FRAG - -M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o -M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o - -CONFIG_DEVICES = dv-sockser.o -CONFIG_DEVICES = - -SIM_OBJS = \ - $(SIM_NEW_COMMON_OBJS) \ - sim-cpu.o \ - sim-hload.o \ - sim-hrw.o \ - sim-model.o \ - sim-reg.o \ - cgen-utils.o cgen-trace.o cgen-scache.o \ - cgen-run.o sim-reason.o sim-engine.o sim-stop.o \ - sim-if.o arch.o \ - $(M32R_OBJS) \ - $(M32RX_OBJS) \ - traps.o devices.o \ - $(CONFIG_DEVICES) - -# Extra headers included by sim-main.h. -SIM_EXTRA_DEPS = \ - $(CGEN_INCLUDE_DEPS) \ - arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h - -SIM_EXTRA_CFLAGS = - -SIM_RUN_OBJS = nrun.o -SIM_EXTRA_CLEAN = m32r-clean - -# This selects the m32r newlib/libgloss syscall definitions. -NL_TARGET = -DNL_TARGET_m32r - -## COMMON_POST_CONFIG_FRAG - -arch = m32r - -sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h - -arch.o: arch.c $(SIM_MAIN_DEPS) - -traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS) -devices.o: devices.c $(SIM_MAIN_DEPS) - -# M32R objs - -M32RBF_INCLUDE_DEPS = \ - $(CGEN_MAIN_CPU_DEPS) \ - cpu.h decode.h eng.h - -m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS) - -# FIXME: Use of `mono' is wip. -mloop.c eng.h: stamp-mloop -stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile - $(SHELL) $(srccom)/genmloop.sh \ - -mono -fast -pbb -switch sem-switch.c \ - -cpu m32rbf -infile $(srcdir)/mloop.in - $(SHELL) $(srcroot)/move-if-change eng.hin eng.h - $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c - touch stamp-mloop -mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS) - -cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS) -decode.o: decode.c $(M32RBF_INCLUDE_DEPS) -sem.o: sem.c $(M32RBF_INCLUDE_DEPS) -model.o: model.c $(M32RBF_INCLUDE_DEPS) - -# M32RX objs - -M32RXF_INCLUDE_DEPS = \ - $(CGEN_MAIN_CPU_DEPS) \ - cpux.h decodex.h engx.h - -m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS) - -# FIXME: Use of `mono' is wip. -mloopx.c engx.h: stamp-xmloop -stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile - $(SHELL) $(srccom)/genmloop.sh \ - -mono -no-fast -pbb -parallel-write -switch semx-switch.c \ - -cpu m32rxf -infile $(srcdir)/mloopx.in - $(SHELL) $(srcroot)/move-if-change eng.hin engx.h - $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c - touch stamp-xmloop -mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS) - -cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS) -decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS) -semx.o: semx.c $(M32RXF_INCLUDE_DEPS) -modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS) - -m32r-clean: - rm -f mloop.c eng.h stamp-mloop - rm -f mloopx.c engx.h stamp-xmloop - rm -f stamp-arch stamp-cpu stamp-xcpu - rm -f tmp-* - -# cgen support, enable with --enable-cgen-maint -CGEN_MAINT = ; @true -# The following line is commented in or out depending upon --enable-cgen-maint. -@CGEN_MAINT@CGEN_MAINT = - -stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu - $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \ - FLAGS="with-scache with-profile=fn" - touch stamp-arch -arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch - -stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=m32rbf mach=m32r SUFFIX= \ - FLAGS="with-scache with-profile=fn" \ - EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" - touch stamp-cpu -cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu - -stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu - $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \ - cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)" - touch stamp-xcpu -cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu diff --git a/sim/m32r/README b/sim/m32r/README deleted file mode 100644 index bbc3f50..0000000 --- a/sim/m32r/README +++ /dev/null @@ -1,14 +0,0 @@ -This is the m32r simulator directory. - -It is still work-in-progress. The current sources are reasonably -well tested and lots of features are in. However, there's lots -more yet to come. - -There are lots of machine generated files in the source directory! -They are only generated if you configure with --enable-cgen-maint, -similar in behaviour to Makefile.in, configure under automake/autoconf. - -For details on the generator, see ../../cgen. - -devo/cgen isn't part of the comp-tools module yet. -You'll need to check it out manually (also akin to automake/autoconf). diff --git a/sim/m32r/TODO b/sim/m32r/TODO deleted file mode 100644 index 263daac..0000000 --- a/sim/m32r/TODO +++ /dev/null @@ -1,9 +0,0 @@ -- header file dependencies revisit -- hooks cleanup -- testsuites -- FIXME's -- memory accesses still test if profiling is on even in fast mode -- fill nop counting done even in fast mode -- have semantic code use G/SET_H_FOO if not default [incl fun-access] -- have G/SET_H_FOO macros call function if fun-access -- --> can always use G/S_H_FOO macros diff --git a/sim/m32r/acconfig.h b/sim/m32r/acconfig.h deleted file mode 100644 index f9b87a1..0000000 --- a/sim/m32r/acconfig.h +++ /dev/null @@ -1,15 +0,0 @@ - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have catgets and don't want to use GNU gettext. */ -#undef HAVE_CATGETS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES diff --git a/sim/m32r/arch.c b/sim/m32r/arch.c deleted file mode 100644 index d6860c1..0000000 --- a/sim/m32r/arch.c +++ /dev/null @@ -1,38 +0,0 @@ -/* Simulator support for m32r. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#include "sim-main.h" -#include "bfd.h" - -const MACH *sim_machs[] = -{ -#ifdef HAVE_CPU_M32RBF - & m32r_mach, -#endif -#ifdef HAVE_CPU_M32RXF - & m32rx_mach, -#endif - 0 -}; - diff --git a/sim/m32r/arch.h b/sim/m32r/arch.h deleted file mode 100644 index 9521f44..0000000 --- a/sim/m32r/arch.h +++ /dev/null @@ -1,47 +0,0 @@ -/* Simulator header for m32r. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef M32R_ARCH_H -#define M32R_ARCH_H - -#define TARGET_BIG_ENDIAN 1 - -/* Enum declaration for model types. */ -typedef enum model_type { - MODEL_M32R_D, MODEL_TEST, MODEL_M32RX, MODEL_MAX -} MODEL_TYPE; - -#define MAX_MODELS ((int) MODEL_MAX) - -/* Enum declaration for unit types. */ -typedef enum unit_type { - UNIT_NONE, UNIT_M32R_D_U_STORE, UNIT_M32R_D_U_LOAD, UNIT_M32R_D_U_CTI - , UNIT_M32R_D_U_MAC, UNIT_M32R_D_U_CMP, UNIT_M32R_D_U_EXEC, UNIT_TEST_U_EXEC - , UNIT_M32RX_U_STORE, UNIT_M32RX_U_LOAD, UNIT_M32RX_U_CTI, UNIT_M32RX_U_MAC - , UNIT_M32RX_U_CMP, UNIT_M32RX_U_EXEC, UNIT_MAX -} UNIT_TYPE; - -#define MAX_UNITS (2) - -#endif /* M32R_ARCH_H */ diff --git a/sim/m32r/config.in b/sim/m32r/config.in deleted file mode 100644 index 9723b86..0000000 --- a/sim/m32r/config.in +++ /dev/null @@ -1,162 +0,0 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ - -/* Define if using alloca.c. */ -#undef C_ALLOCA - -/* Define to empty if the keyword does not work. */ -#undef const - -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ -#undef CRAY_STACKSEG_END - -/* Define if you have alloca, as a function or macro. */ -#undef HAVE_ALLOCA - -/* Define if you have <alloca.h> and it should be used (not on Ultrix). */ -#undef HAVE_ALLOCA_H - -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP - -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline - -/* Define to `long' if <sys/types.h> doesn't define. */ -#undef off_t - -/* Define if you need to in order for stat and other things to work. */ -#undef _POSIX_SOURCE - -/* Define as the return type of signal handlers (int or void). */ -#undef RETSIGTYPE - -/* Define to `unsigned' if <sys/types.h> doesn't define. */ -#undef size_t - -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION - -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS - -/* Define if your processor stores words with the most significant - byte first (like Motorola and SPARC, unlike Intel and VAX). */ -#undef WORDS_BIGENDIAN - -/* Define to 1 if NLS is requested. */ -#undef ENABLE_NLS - -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT - -/* Define as 1 if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT - -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT - -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY - -/* Define if you have the __setfpucw function. */ -#undef HAVE___SETFPUCW - -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT - -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD - -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE - -/* Define if you have the getrusage function. */ -#undef HAVE_GETRUSAGE - -/* Define if you have the munmap function. */ -#undef HAVE_MUNMAP - -/* Define if you have the putenv function. */ -#undef HAVE_PUTENV - -/* Define if you have the setenv function. */ -#undef HAVE_SETENV - -/* Define if you have the setlocale function. */ -#undef HAVE_SETLOCALE - -/* Define if you have the sigaction function. */ -#undef HAVE_SIGACTION - -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the time function. */ -#undef HAVE_TIME - -/* Define if you have the <argz.h> header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the <fcntl.h> header file. */ -#undef HAVE_FCNTL_H - -/* Define if you have the <fpu_control.h> header file. */ -#undef HAVE_FPU_CONTROL_H - -/* Define if you have the <limits.h> header file. */ -#undef HAVE_LIMITS_H - -/* Define if you have the <locale.h> header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the <malloc.h> header file. */ -#undef HAVE_MALLOC_H - -/* Define if you have the <nl_types.h> header file. */ -#undef HAVE_NL_TYPES_H - -/* Define if you have the <stdlib.h> header file. */ -#undef HAVE_STDLIB_H - -/* Define if you have the <string.h> header file. */ -#undef HAVE_STRING_H - -/* Define if you have the <strings.h> header file. */ -#undef HAVE_STRINGS_H - -/* Define if you have the <sys/param.h> header file. */ -#undef HAVE_SYS_PARAM_H - -/* Define if you have the <sys/resource.h> header file. */ -#undef HAVE_SYS_RESOURCE_H - -/* Define if you have the <sys/time.h> header file. */ -#undef HAVE_SYS_TIME_H - -/* Define if you have the <time.h> header file. */ -#undef HAVE_TIME_H - -/* Define if you have the <unistd.h> header file. */ -#undef HAVE_UNISTD_H - -/* Define if you have the <values.h> header file. */ -#undef HAVE_VALUES_H diff --git a/sim/m32r/configure b/sim/m32r/configure deleted file mode 100755 index 4a55bc1..0000000 --- a/sim/m32r/configure +++ /dev/null @@ -1,4341 +0,0 @@ -#! /bin/sh - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -sim_inline="-DDEFAULT_INLINE=0" - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -# This file is derived from `gettext.m4'. The difference is that the -# included macros assume Cygnus-style source and build trees. - -# Macro to add for using GNU gettext. -# Ulrich Drepper <drepper@cygnus.com>, 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 3 - - - - - -# Search path for a program which passes the given test. -# Ulrich Drepper <drepper@cygnus.com>, 1996. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - - - -# Check whether LC_MESSAGES is available in <locale.h>. -# Ulrich Drepper <drepper@cygnus.com>, 1995. -# -# This file file be copied and used freely without restrictions. It can -# be used in projects which are not available under the GNU Public License -# but which still want to provide support for the GNU gettext functionality. -# Please note that the actual code is *not* freely available. - -# serial 1 - - - - - - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.13 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; the Free Software Foundation -# gives unlimited permission to copy, distribute and modify it. - -# Defaults: -ac_help= -ac_default_prefix=/usr/local -# Any additions from configure.in: -ac_help="$ac_help - --disable-nls do not use Native Language Support" -ac_help="$ac_help - --with-included-gettext use the GNU gettext library included here" -ac_help="$ac_help - --enable-maintainer-mode Enable developer functionality." -ac_help="$ac_help - --enable-sim-bswap Use Host specific BSWAP instruction." -ac_help="$ac_help - --enable-sim-cflags=opts Extra CFLAGS for use in building simulator" -ac_help="$ac_help - --enable-sim-debug=opts Enable debugging flags" -ac_help="$ac_help - --enable-sim-stdio Specify whether to use stdio for console input/output." -ac_help="$ac_help - --enable-sim-trace=opts Enable tracing flags" -ac_help="$ac_help - --enable-sim-profile=opts Enable profiling flags" -ac_help="$ac_help - --enable-sim-endian=endian Specify target byte endian orientation." -ac_help="$ac_help - --enable-sim-alignment=align Specify strict, nonstrict or forced alignment of memory accesses." -ac_help="$ac_help - --enable-sim-hostendian=end Specify host byte endian orientation." -ac_help="$ac_help - --enable-sim-scache=size Specify simulator execution cache size." -ac_help="$ac_help - --enable-sim-default-model=model Specify default model to simulate." -ac_help="$ac_help - --enable-sim-environment=environment Specify mixed, user, virtual or operating environment." -ac_help="$ac_help - --enable-sim-inline=inlines Specify which functions should be inlined." -ac_help="$ac_help - --enable-cgen-maint[=DIR] build cgen generated files" - -# Initialize some variables set by options. -# The variables have the same names as the options, with -# dashes changed to underlines. -build=NONE -cache_file=./config.cache -exec_prefix=NONE -host=NONE -no_create= -nonopt=NONE -no_recursion= -prefix=NONE -program_prefix=NONE -program_suffix=NONE -program_transform_name=s,x,x, -silent= -site= -sitefile= -srcdir= -target=NONE -verbose= -x_includes=NONE -x_libraries=NONE -bindir='${exec_prefix}/bin' -sbindir='${exec_prefix}/sbin' -libexecdir='${exec_prefix}/libexec' -datadir='${prefix}/share' -sysconfdir='${prefix}/etc' -sharedstatedir='${prefix}/com' -localstatedir='${prefix}/var' -libdir='${exec_prefix}/lib' -includedir='${prefix}/include' -oldincludedir='/usr/include' -infodir='${prefix}/info' -mandir='${prefix}/man' - -# Initialize some other variables. -subdirs= -MFLAGS= MAKEFLAGS= -SHELL=${CONFIG_SHELL-/bin/sh} -# Maximum number of lines to put in a shell here document. -ac_max_here_lines=12 - -ac_prev= -for ac_option -do - - # If the previous option needs an argument, assign it. - if test -n "$ac_prev"; then - eval "$ac_prev=\$ac_option" - ac_prev= - continue - fi - - case "$ac_option" in - -*=*) ac_optarg=`echo "$ac_option" | sed 's/[-_a-zA-Z0-9]*=//'` ;; - *) ac_optarg= ;; - esac - - # Accept the important Cygnus configure options, so we can diagnose typos. - - case "$ac_option" in - - -bindir | --bindir | --bindi | --bind | --bin | --bi) - ac_prev=bindir ;; - -bindir=* | --bindir=* | --bindi=* | --bind=* | --bin=* | --bi=*) - bindir="$ac_optarg" ;; - - -build | --build | --buil | --bui | --bu) - ac_prev=build ;; - -build=* | --build=* | --buil=* | --bui=* | --bu=*) - build="$ac_optarg" ;; - - -cache-file | --cache-file | --cache-fil | --cache-fi \ - | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c) - ac_prev=cache_file ;; - -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \ - | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*) - cache_file="$ac_optarg" ;; - - -datadir | --datadir | --datadi | --datad | --data | --dat | --da) - ac_prev=datadir ;; - -datadir=* | --datadir=* | --datadi=* | --datad=* | --data=* | --dat=* \ - | --da=*) - datadir="$ac_optarg" ;; - - -disable-* | --disable-*) - ac_feature=`echo $ac_option|sed -e 's/-*disable-//'` - # Reject names that are not valid shell variable names. - if test -n "`echo $ac_feature| sed 's/[-a-zA-Z0-9_]//g'`"; then - { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; } - fi - ac_feature=`echo $ac_feature| sed 's/-/_/g'` - eval "enable_${ac_feature}=no" ;; - - -enable-* | --enable-*) - ac_feature=`echo $ac_option|sed -e 's/-*enable-//' -e 's/=.*//'` - # Reject names that are not valid shell variable names. - if test -n "`echo $ac_feature| sed 's/[-_a-zA-Z0-9]//g'`"; then - { echo "configure: error: $ac_feature: invalid feature name" 1>&2; exit 1; } - fi - ac_feature=`echo $ac_feature| sed 's/-/_/g'` - case "$ac_option" in - *=*) ;; - *) ac_optarg=yes ;; - esac - eval "enable_${ac_feature}='$ac_optarg'" ;; - - -exec-prefix | --exec_prefix | --exec-prefix | --exec-prefi \ - | --exec-pref | --exec-pre | --exec-pr | --exec-p | --exec- \ - | --exec | --exe | --ex) - ac_prev=exec_prefix ;; - -exec-prefix=* | --exec_prefix=* | --exec-prefix=* | --exec-prefi=* \ - | --exec-pref=* | --exec-pre=* | --exec-pr=* | --exec-p=* | --exec-=* \ - | --exec=* | --exe=* | --ex=*) - exec_prefix="$ac_optarg" ;; - - -gas | --gas | --ga | --g) - # Obsolete; use --with-gas. - with_gas=yes ;; - - -help | --help | --hel | --he) - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat << EOF -Usage: configure [options] [host] -Options: [defaults in brackets after descriptions] -Configuration: - --cache-file=FILE cache test results in FILE - --help print this message - --no-create do not create output files - --quiet, --silent do not print \`checking...' messages - --site-file=FILE use FILE as the site file - --version print the version of autoconf that created configure -Directory and file names: - --prefix=PREFIX install architecture-independent files in PREFIX - [$ac_default_prefix] - --exec-prefix=EPREFIX install architecture-dependent files in EPREFIX - [same as prefix] - --bindir=DIR user executables in DIR [EPREFIX/bin] - --sbindir=DIR system admin executables in DIR [EPREFIX/sbin] - --libexecdir=DIR program executables in DIR [EPREFIX/libexec] - --datadir=DIR read-only architecture-independent data in DIR - [PREFIX/share] - --sysconfdir=DIR read-only single-machine data in DIR [PREFIX/etc] - --sharedstatedir=DIR modifiable architecture-independent data in DIR - [PREFIX/com] - --localstatedir=DIR modifiable single-machine data in DIR [PREFIX/var] - --libdir=DIR object code libraries in DIR [EPREFIX/lib] - --includedir=DIR C header files in DIR [PREFIX/include] - --oldincludedir=DIR C header files for non-gcc in DIR [/usr/include] - --infodir=DIR info documentation in DIR [PREFIX/info] - --mandir=DIR man documentation in DIR [PREFIX/man] - --srcdir=DIR find the sources in DIR [configure dir or ..] - --program-prefix=PREFIX prepend PREFIX to installed program names - --program-suffix=SUFFIX append SUFFIX to installed program names - --program-transform-name=PROGRAM - run sed PROGRAM on installed program names -EOF - cat << EOF -Host type: - --build=BUILD configure for building on BUILD [BUILD=HOST] - --host=HOST configure for HOST [guessed] - --target=TARGET configure for TARGET [TARGET=HOST] -Features and packages: - --disable-FEATURE do not include FEATURE (same as --enable-FEATURE=no) - --enable-FEATURE[=ARG] include FEATURE [ARG=yes] - --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] - --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no) - --x-includes=DIR X include files are in DIR - --x-libraries=DIR X library files are in DIR -EOF - if test -n "$ac_help"; then - echo "--enable and --with options recognized:$ac_help" - fi - exit 0 ;; - - -host | --host | --hos | --ho) - ac_prev=host ;; - -host=* | --host=* | --hos=* | --ho=*) - host="$ac_optarg" ;; - - -includedir | --includedir | --includedi | --included | --include \ - | --includ | --inclu | --incl | --inc) - ac_prev=includedir ;; - -includedir=* | --includedir=* | --includedi=* | --included=* | --include=* \ - | --includ=* | --inclu=* | --incl=* | --inc=*) - includedir="$ac_optarg" ;; - - -infodir | --infodir | --infodi | --infod | --info | --inf) - ac_prev=infodir ;; - -infodir=* | --infodir=* | --infodi=* | --infod=* | --info=* | --inf=*) - infodir="$ac_optarg" ;; - - -libdir | --libdir | --libdi | --libd) - ac_prev=libdir ;; - -libdir=* | --libdir=* | --libdi=* | --libd=*) - libdir="$ac_optarg" ;; - - -libexecdir | --libexecdir | --libexecdi | --libexecd | --libexec \ - | --libexe | --libex | --libe) - ac_prev=libexecdir ;; - -libexecdir=* | --libexecdir=* | --libexecdi=* | --libexecd=* | --libexec=* \ - | --libexe=* | --libex=* | --libe=*) - libexecdir="$ac_optarg" ;; - - -localstatedir | --localstatedir | --localstatedi | --localstated \ - | --localstate | --localstat | --localsta | --localst \ - | --locals | --local | --loca | --loc | --lo) - ac_prev=localstatedir ;; - -localstatedir=* | --localstatedir=* | --localstatedi=* | --localstated=* \ - | --localstate=* | --localstat=* | --localsta=* | --localst=* \ - | --locals=* | --local=* | --loca=* | --loc=* | --lo=*) - localstatedir="$ac_optarg" ;; - - -mandir | --mandir | --mandi | --mand | --man | --ma | --m) - ac_prev=mandir ;; - -mandir=* | --mandir=* | --mandi=* | --mand=* | --man=* | --ma=* | --m=*) - mandir="$ac_optarg" ;; - - -nfp | --nfp | --nf) - # Obsolete; use --without-fp. - with_fp=no ;; - - -no-create | --no-create | --no-creat | --no-crea | --no-cre \ - | --no-cr | --no-c) - no_create=yes ;; - - -no-recursion | --no-recursion | --no-recursio | --no-recursi \ - | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) - no_recursion=yes ;; - - -oldincludedir | --oldincludedir | --oldincludedi | --oldincluded \ - | --oldinclude | --oldinclud | --oldinclu | --oldincl | --oldinc \ - | --oldin | --oldi | --old | --ol | --o) - ac_prev=oldincludedir ;; - -oldincludedir=* | --oldincludedir=* | --oldincludedi=* | --oldincluded=* \ - | --oldinclude=* | --oldinclud=* | --oldinclu=* | --oldincl=* | --oldinc=* \ - | --oldin=* | --oldi=* | --old=* | --ol=* | --o=*) - oldincludedir="$ac_optarg" ;; - - -prefix | --prefix | --prefi | --pref | --pre | --pr | --p) - ac_prev=prefix ;; - -prefix=* | --prefix=* | --prefi=* | --pref=* | --pre=* | --pr=* | --p=*) - prefix="$ac_optarg" ;; - - -program-prefix | --program-prefix | --program-prefi | --program-pref \ - | --program-pre | --program-pr | --program-p) - ac_prev=program_prefix ;; - -program-prefix=* | --program-prefix=* | --program-prefi=* \ - | --program-pref=* | --program-pre=* | --program-pr=* | --program-p=*) - program_prefix="$ac_optarg" ;; - - -program-suffix | --program-suffix | --program-suffi | --program-suff \ - | --program-suf | --program-su | --program-s) - ac_prev=program_suffix ;; - -program-suffix=* | --program-suffix=* | --program-suffi=* \ - | --program-suff=* | --program-suf=* | --program-su=* | --program-s=*) - program_suffix="$ac_optarg" ;; - - -program-transform-name | --program-transform-name \ - | --program-transform-nam | --program-transform-na \ - | --program-transform-n | --program-transform- \ - | --program-transform | --program-transfor \ - | --program-transfo | --program-transf \ - | --program-trans | --program-tran \ - | --progr-tra | --program-tr | --program-t) - ac_prev=program_transform_name ;; - -program-transform-name=* | --program-transform-name=* \ - | --program-transform-nam=* | --program-transform-na=* \ - | --program-transform-n=* | --program-transform-=* \ - | --program-transform=* | --program-transfor=* \ - | --program-transfo=* | --program-transf=* \ - | --program-trans=* | --program-tran=* \ - | --progr-tra=* | --program-tr=* | --program-t=*) - program_transform_name="$ac_optarg" ;; - - -q | -quiet | --quiet | --quie | --qui | --qu | --q \ - | -silent | --silent | --silen | --sile | --sil) - silent=yes ;; - - -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb) - ac_prev=sbindir ;; - -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \ - | --sbi=* | --sb=*) - sbindir="$ac_optarg" ;; - - -sharedstatedir | --sharedstatedir | --sharedstatedi \ - | --sharedstated | --sharedstate | --sharedstat | --sharedsta \ - | --sharedst | --shareds | --shared | --share | --shar \ - | --sha | --sh) - ac_prev=sharedstatedir ;; - -sharedstatedir=* | --sharedstatedir=* | --sharedstatedi=* \ - | --sharedstated=* | --sharedstate=* | --sharedstat=* | --sharedsta=* \ - | --sharedst=* | --shareds=* | --shared=* | --share=* | --shar=* \ - | --sha=* | --sh=*) - sharedstatedir="$ac_optarg" ;; - - -site | --site | --sit) - ac_prev=site ;; - -site=* | --site=* | --sit=*) - site="$ac_optarg" ;; - - -site-file | --site-file | --site-fil | --site-fi | --site-f) - ac_prev=sitefile ;; - -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*) - sitefile="$ac_optarg" ;; - - -srcdir | --srcdir | --srcdi | --srcd | --src | --sr) - ac_prev=srcdir ;; - -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*) - srcdir="$ac_optarg" ;; - - -sysconfdir | --sysconfdir | --sysconfdi | --sysconfd | --sysconf \ - | --syscon | --sysco | --sysc | --sys | --sy) - ac_prev=sysconfdir ;; - -sysconfdir=* | --sysconfdir=* | --sysconfdi=* | --sysconfd=* | --sysconf=* \ - | --syscon=* | --sysco=* | --sysc=* | --sys=* | --sy=*) - sysconfdir="$ac_optarg" ;; - - -target | --target | --targe | --targ | --tar | --ta | --t) - ac_prev=target ;; - -target=* | --target=* | --targe=* | --targ=* | --tar=* | --ta=* | --t=*) - target="$ac_optarg" ;; - - -v | -verbose | --verbose | --verbos | --verbo | --verb) - verbose=yes ;; - - -version | --version | --versio | --versi | --vers) - echo "configure generated by autoconf version 2.13" - exit 0 ;; - - -with-* | --with-*) - ac_package=`echo $ac_option|sed -e 's/-*with-//' -e 's/=.*//'` - # Reject names that are not valid shell variable names. - if test -n "`echo $ac_package| sed 's/[-_a-zA-Z0-9]//g'`"; then - { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; } - fi - ac_package=`echo $ac_package| sed 's/-/_/g'` - case "$ac_option" in - *=*) ;; - *) ac_optarg=yes ;; - esac - eval "with_${ac_package}='$ac_optarg'" ;; - - -without-* | --without-*) - ac_package=`echo $ac_option|sed -e 's/-*without-//'` - # Reject names that are not valid shell variable names. - if test -n "`echo $ac_package| sed 's/[-a-zA-Z0-9_]//g'`"; then - { echo "configure: error: $ac_package: invalid package name" 1>&2; exit 1; } - fi - ac_package=`echo $ac_package| sed 's/-/_/g'` - eval "with_${ac_package}=no" ;; - - --x) - # Obsolete; use --with-x. - with_x=yes ;; - - -x-includes | --x-includes | --x-include | --x-includ | --x-inclu \ - | --x-incl | --x-inc | --x-in | --x-i) - ac_prev=x_includes ;; - -x-includes=* | --x-includes=* | --x-include=* | --x-includ=* | --x-inclu=* \ - | --x-incl=* | --x-inc=* | --x-in=* | --x-i=*) - x_includes="$ac_optarg" ;; - - -x-libraries | --x-libraries | --x-librarie | --x-librari \ - | --x-librar | --x-libra | --x-libr | --x-lib | --x-li | --x-l) - ac_prev=x_libraries ;; - -x-libraries=* | --x-libraries=* | --x-librarie=* | --x-librari=* \ - | --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*) - x_libraries="$ac_optarg" ;; - - -*) { echo "configure: error: $ac_option: invalid option; use --help to show usage" 1>&2; exit 1; } - ;; - - *) - if test -n "`echo $ac_option| sed 's/[-a-z0-9.]//g'`"; then - echo "configure: warning: $ac_option: invalid host type" 1>&2 - fi - if test "x$nonopt" != xNONE; then - { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } - fi - nonopt="$ac_option" - ;; - - esac -done - -if test -n "$ac_prev"; then - { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; } -fi - -trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15 - -# File descriptor usage: -# 0 standard input -# 1 file creation -# 2 errors and warnings -# 3 some systems may open it to /dev/tty -# 4 used on the Kubota Titan -# 6 checking for... messages and results -# 5 compiler messages saved in config.log -if test "$silent" = yes; then - exec 6>/dev/null -else - exec 6>&1 -fi -exec 5>./config.log - -echo "\ -This file contains any messages produced by compilers while -running configure, to aid debugging if configure makes a mistake. -" 1>&5 - -# Strip out --no-create and --no-recursion so they do not pile up. -# Also quote any args containing shell metacharacters. -ac_configure_args= -for ac_arg -do - case "$ac_arg" in - -no-create | --no-create | --no-creat | --no-crea | --no-cre \ - | --no-cr | --no-c) ;; - -no-recursion | --no-recursion | --no-recursio | --no-recursi \ - | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;; - *" "*|*" "*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*) - ac_configure_args="$ac_configure_args '$ac_arg'" ;; - *) ac_configure_args="$ac_configure_args $ac_arg" ;; - esac -done - -# NLS nuisances. -# Only set these to C if already set. These must not be set unconditionally -# because not all systems understand e.g. LANG=C (notably SCO). -# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'! -# Non-C LC_CTYPE values break the ctype check. -if test "${LANG+set}" = set; then LANG=C; export LANG; fi -if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi -if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi -if test "${LC_CTYPE+set}" = set; then LC_CTYPE=C; export LC_CTYPE; fi - -# confdefs.h avoids OS command line length limits that DEFS can exceed. -rm -rf conftest* confdefs.h -# AIX cpp loses on an empty file, so make sure it contains at least a newline. -echo > confdefs.h - -# A filename unique to this package, relative to the directory that -# configure is in, which we can look for to find out if srcdir is correct. -ac_unique_file=Makefile.in - -# Find the source files, if location was not specified. -if test -z "$srcdir"; then - ac_srcdir_defaulted=yes - # Try the directory containing this script, then its parent. - ac_prog=$0 - ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'` - test "x$ac_confdir" = "x$ac_prog" && ac_confdir=. - srcdir=$ac_confdir - if test ! -r $srcdir/$ac_unique_file; then - srcdir=.. - fi -else - ac_srcdir_defaulted=no -fi -if test ! -r $srcdir/$ac_unique_file; then - if test "$ac_srcdir_defaulted" = yes; then - { echo "configure: error: can not find sources in $ac_confdir or .." 1>&2; exit 1; } - else - { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; } - fi -fi -srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'` - -# Prefer explicitly selected file to automatically selected ones. -if test -z "$sitefile"; then - if test -z "$CONFIG_SITE"; then - if test "x$prefix" != xNONE; then - CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" - else - CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" - fi - fi -else - CONFIG_SITE="$sitefile" -fi -for ac_site_file in $CONFIG_SITE; do - if test -r "$ac_site_file"; then - echo "loading site script $ac_site_file" - . "$ac_site_file" - fi -done - -if test -r "$cache_file"; then - echo "loading cache $cache_file" - . $cache_file -else - echo "creating cache $cache_file" - > $cache_file -fi - -ac_ext=c -# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. -ac_cpp='$CPP $CPPFLAGS' -ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' -ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' -cross_compiling=$ac_cv_prog_cc_cross - -ac_exeext= -ac_objext=o -if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then - # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu. - if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then - ac_n= ac_c=' -' ac_t=' ' - else - ac_n=-n ac_c= ac_t= - fi -else - ac_n= ac_c='\c' ac_t= -fi - - - -echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:695: checking how to run the C preprocessor" >&5 -# On Suns, sometimes $CPP names a directory. -if test -n "$CPP" && test -d "$CPP"; then - CPP= -fi -if test -z "$CPP"; then -if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - # This must be in double quotes, not single quotes, because CPP may get - # substituted into the Makefile and "${CC-cc}" will confuse make. - CPP="${CC-cc} -E" - # On the NeXT, cc -E runs the code through the compiler's parser, - # not just through cpp. - cat > conftest.$ac_ext <<EOF -#line 710 "configure" -#include "confdefs.h" -#include <assert.h> -Syntax Error -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:716: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - : -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - CPP="${CC-cc} -E -traditional-cpp" - cat > conftest.$ac_ext <<EOF -#line 727 "configure" -#include "confdefs.h" -#include <assert.h> -Syntax Error -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:733: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - : -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - CPP="${CC-cc} -nologo -E" - cat > conftest.$ac_ext <<EOF -#line 744 "configure" -#include "confdefs.h" -#include <assert.h> -Syntax Error -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:750: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - : -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - CPP=/lib/cpp -fi -rm -f conftest* -fi -rm -f conftest* -fi -rm -f conftest* - ac_cv_prog_CPP="$CPP" -fi - CPP="$ac_cv_prog_CPP" -else - ac_cv_prog_CPP="$CPP" -fi -echo "$ac_t""$CPP" 1>&6 - -echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 -echo "configure:775: checking whether ${MAKE-make} sets \${MAKE}" >&5 -set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` -if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftestmake <<\EOF -all: - @echo 'ac_maketemp="${MAKE}"' -EOF -# GNU make sometimes prints "make[1]: Entering...", which would confuse us. -eval `${MAKE-make} -f conftestmake 2>/dev/null | grep temp=` -if test -n "$ac_maketemp"; then - eval ac_cv_prog_make_${ac_make}_set=yes -else - eval ac_cv_prog_make_${ac_make}_set=no -fi -rm -f conftestmake -fi -if eval "test \"`echo '$ac_cv_prog_make_'${ac_make}_set`\" = yes"; then - echo "$ac_t""yes" 1>&6 - SET_MAKE= -else - echo "$ac_t""no" 1>&6 - SET_MAKE="MAKE=${MAKE-make}" -fi - -echo $ac_n "checking for POSIXized ISC""... $ac_c" 1>&6 -echo "configure:802: checking for POSIXized ISC" >&5 -if test -d /etc/conf/kconfig.d && - grep _POSIX_VERSION /usr/include/sys/unistd.h >/dev/null 2>&1 -then - echo "$ac_t""yes" 1>&6 - ISC=yes # If later tests want to check for ISC. - cat >> confdefs.h <<\EOF -#define _POSIX_SOURCE 1 -EOF - - if test "$GCC" = yes; then - CC="$CC -posix" - else - CC="$CC -Xp" - fi -else - echo "$ac_t""no" 1>&6 - ISC= -fi - -echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:823: checking for ANSI C header files" >&5 -if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 828 "configure" -#include "confdefs.h" -#include <stdlib.h> -#include <stdarg.h> -#include <string.h> -#include <float.h> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:836: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - ac_cv_header_stdc=yes -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_header_stdc=no -fi -rm -f conftest* - -if test $ac_cv_header_stdc = yes; then - # SunOS 4.x string.h does not declare mem*, contrary to ANSI. -cat > conftest.$ac_ext <<EOF -#line 853 "configure" -#include "confdefs.h" -#include <string.h> -EOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - egrep "memchr" >/dev/null 2>&1; then - : -else - rm -rf conftest* - ac_cv_header_stdc=no -fi -rm -f conftest* - -fi - -if test $ac_cv_header_stdc = yes; then - # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. -cat > conftest.$ac_ext <<EOF -#line 871 "configure" -#include "confdefs.h" -#include <stdlib.h> -EOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - egrep "free" >/dev/null 2>&1; then - : -else - rm -rf conftest* - ac_cv_header_stdc=no -fi -rm -f conftest* - -fi - -if test $ac_cv_header_stdc = yes; then - # /bin/cc in Irix-4.0.5 gets non-ANSI ctype macros unless using -ansi. -if test "$cross_compiling" = yes; then - : -else - cat > conftest.$ac_ext <<EOF -#line 892 "configure" -#include "confdefs.h" -#include <ctype.h> -#define ISLOWER(c) ('a' <= (c) && (c) <= 'z') -#define TOUPPER(c) (ISLOWER(c) ? 'A' + ((c) - 'a') : (c)) -#define XOR(e, f) (((e) && !(f)) || (!(e) && (f))) -int main () { int i; for (i = 0; i < 256; i++) -if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); -exit (0); } - -EOF -if { (eval echo configure:903: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null -then - : -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -fr conftest* - ac_cv_header_stdc=no -fi -rm -fr conftest* -fi - -fi -fi - -echo "$ac_t""$ac_cv_header_stdc" 1>&6 -if test $ac_cv_header_stdc = yes; then - cat >> confdefs.h <<\EOF -#define STDC_HEADERS 1 -EOF - -fi - -echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:927: checking for working const" >&5 -if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 932 "configure" -#include "confdefs.h" - -int main() { - -/* Ultrix mips cc rejects this. */ -typedef int charset[2]; const charset x; -/* SunOS 4.1.1 cc rejects this. */ -char const *const *ccp; -char **p; -/* NEC SVR4.0.2 mips cc rejects this. */ -struct point {int x, y;}; -static struct point const zero = {0,0}; -/* AIX XL C 1.02.0.0 rejects this. - It does not let you subtract one const X* pointer from another in an arm - of an if-expression whose if-part is not a constant expression */ -const char *g = "string"; -ccp = &g + (g ? g-g : 0); -/* HPUX 7.0 cc rejects these. */ -++ccp; -p = (char**) ccp; -ccp = (char const *const *) p; -{ /* SCO 3.2v4 cc rejects this. */ - char *t; - char const *s = 0 ? (char *) 0 : (char const *) 0; - - *t++ = 0; -} -{ /* Someone thinks the Sun supposedly-ANSI compiler will reject this. */ - int x[] = {25, 17}; - const int *foo = &x[0]; - ++foo; -} -{ /* Sun SC1.0 ANSI compiler rejects this -- but not the above. */ - typedef const int *iptr; - iptr p = 0; - ++p; -} -{ /* AIX XL C 1.02.0.0 rejects this saying - "k.c", line 2.27: 1506-025 (S) Operand must be a modifiable lvalue. */ - struct s { int j; const int *ap[3]; }; - struct s *b; b->j = 5; -} -{ /* ULTRIX-32 V3.1 (Rev 9) vcc rejects this */ - const int foo = 10; -} - -; return 0; } -EOF -if { (eval echo configure:981: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - ac_cv_c_const=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_c_const=no -fi -rm -f conftest* -fi - -echo "$ac_t""$ac_cv_c_const" 1>&6 -if test $ac_cv_c_const = no; then - cat >> confdefs.h <<\EOF -#define const -EOF - -fi - -echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:1002: checking for inline" >&5 -if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - ac_cv_c_inline=no -for ac_kw in inline __inline__ __inline; do - cat > conftest.$ac_ext <<EOF -#line 1009 "configure" -#include "confdefs.h" - -int main() { -} $ac_kw foo() { -; return 0; } -EOF -if { (eval echo configure:1016: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - ac_cv_c_inline=$ac_kw; break -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 -fi -rm -f conftest* -done - -fi - -echo "$ac_t""$ac_cv_c_inline" 1>&6 -case "$ac_cv_c_inline" in - inline | yes) ;; - no) cat >> confdefs.h <<\EOF -#define inline -EOF - ;; - *) cat >> confdefs.h <<EOF -#define inline $ac_cv_c_inline -EOF - ;; -esac - -echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:1042: checking for off_t" >&5 -if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1047 "configure" -#include "confdefs.h" -#include <sys/types.h> -#if STDC_HEADERS -#include <stdlib.h> -#include <stddef.h> -#endif -EOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - egrep "(^|[^a-zA-Z_0-9])off_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then - rm -rf conftest* - ac_cv_type_off_t=yes -else - rm -rf conftest* - ac_cv_type_off_t=no -fi -rm -f conftest* - -fi -echo "$ac_t""$ac_cv_type_off_t" 1>&6 -if test $ac_cv_type_off_t = no; then - cat >> confdefs.h <<\EOF -#define off_t long -EOF - -fi - -echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:1075: checking for size_t" >&5 -if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1080 "configure" -#include "confdefs.h" -#include <sys/types.h> -#if STDC_HEADERS -#include <stdlib.h> -#include <stddef.h> -#endif -EOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - egrep "(^|[^a-zA-Z_0-9])size_t[^a-zA-Z_0-9]" >/dev/null 2>&1; then - rm -rf conftest* - ac_cv_type_size_t=yes -else - rm -rf conftest* - ac_cv_type_size_t=no -fi -rm -f conftest* - -fi -echo "$ac_t""$ac_cv_type_size_t" 1>&6 -if test $ac_cv_type_size_t = no; then - cat >> confdefs.h <<\EOF -#define size_t unsigned -EOF - -fi - -# The Ultrix 4.2 mips builtin alloca declared by alloca.h only works -# for constant arguments. Useless! -echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:1110: checking for working alloca.h" >&5 -if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1115 "configure" -#include "confdefs.h" -#include <alloca.h> -int main() { -char *p = alloca(2 * sizeof(int)); -; return 0; } -EOF -if { (eval echo configure:1122: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - ac_cv_header_alloca_h=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_header_alloca_h=no -fi -rm -f conftest* -fi - -echo "$ac_t""$ac_cv_header_alloca_h" 1>&6 -if test $ac_cv_header_alloca_h = yes; then - cat >> confdefs.h <<\EOF -#define HAVE_ALLOCA_H 1 -EOF - -fi - -echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:1143: checking for alloca" >&5 -if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1148 "configure" -#include "confdefs.h" - -#ifdef __GNUC__ -# define alloca __builtin_alloca -#else -# ifdef _MSC_VER -# include <malloc.h> -# define alloca _alloca -# else -# if HAVE_ALLOCA_H -# include <alloca.h> -# else -# ifdef _AIX - #pragma alloca -# else -# ifndef alloca /* predefined by HP cc +Olibcalls */ -char *alloca (); -# endif -# endif -# endif -# endif -#endif - -int main() { -char *p = (char *) alloca(1); -; return 0; } -EOF -if { (eval echo configure:1176: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - ac_cv_func_alloca_works=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_func_alloca_works=no -fi -rm -f conftest* -fi - -echo "$ac_t""$ac_cv_func_alloca_works" 1>&6 -if test $ac_cv_func_alloca_works = yes; then - cat >> confdefs.h <<\EOF -#define HAVE_ALLOCA 1 -EOF - -fi - -if test $ac_cv_func_alloca_works = no; then - # The SVR3 libPW and SVR4 libucb both contain incompatible functions - # that cause trouble. Some versions do not even contain alloca or - # contain a buggy version. If you still want to use their alloca, - # use ar to extract alloca.o from them instead of compiling alloca.c. - ALLOCA=alloca.${ac_objext} - cat >> confdefs.h <<\EOF -#define C_ALLOCA 1 -EOF - - -echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:1208: checking whether alloca needs Cray hooks" >&5 -if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1213 "configure" -#include "confdefs.h" -#if defined(CRAY) && ! defined(CRAY2) -webecray -#else -wenotbecray -#endif - -EOF -if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | - egrep "webecray" >/dev/null 2>&1; then - rm -rf conftest* - ac_cv_os_cray=yes -else - rm -rf conftest* - ac_cv_os_cray=no -fi -rm -f conftest* - -fi - -echo "$ac_t""$ac_cv_os_cray" 1>&6 -if test $ac_cv_os_cray = yes; then -for ac_func in _getb67 GETB67 getb67; do - echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:1238: checking for $ac_func" >&5 -if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1243 "configure" -#include "confdefs.h" -/* System header to define __stub macros and hopefully few prototypes, - which can conflict with char $ac_func(); below. */ -#include <assert.h> -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char $ac_func(); - -int main() { - -/* The GNU C library defines this for functions which it implements - to always fail with ENOSYS. Some functions are actually named - something starting with __ and the normal name is an alias. */ -#if defined (__stub_$ac_func) || defined (__stub___$ac_func) -choke me -#else -$ac_func(); -#endif - -; return 0; } -EOF -if { (eval echo configure:1266: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_func_$ac_func=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_func_$ac_func=no" -fi -rm -f conftest* -fi - -if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then - echo "$ac_t""yes" 1>&6 - cat >> confdefs.h <<EOF -#define CRAY_STACKSEG_END $ac_func -EOF - - break -else - echo "$ac_t""no" 1>&6 -fi - -done -fi - -echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:1293: checking stack direction for C alloca" >&5 -if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test "$cross_compiling" = yes; then - ac_cv_c_stack_direction=0 -else - cat > conftest.$ac_ext <<EOF -#line 1301 "configure" -#include "confdefs.h" -find_stack_direction () -{ - static char *addr = 0; - auto char dummy; - if (addr == 0) - { - addr = &dummy; - return find_stack_direction (); - } - else - return (&dummy > addr) ? 1 : -1; -} -main () -{ - exit (find_stack_direction() < 0); -} -EOF -if { (eval echo configure:1320: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null -then - ac_cv_c_stack_direction=1 -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -fr conftest* - ac_cv_c_stack_direction=-1 -fi -rm -fr conftest* -fi - -fi - -echo "$ac_t""$ac_cv_c_stack_direction" 1>&6 -cat >> confdefs.h <<EOF -#define STACK_DIRECTION $ac_cv_c_stack_direction -EOF - -fi - -for ac_hdr in unistd.h -do -ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:1345: checking for $ac_hdr" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1350 "configure" -#include "confdefs.h" -#include <$ac_hdr> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:1355: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` - cat >> confdefs.h <<EOF -#define $ac_tr_hdr 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - -for ac_func in getpagesize -do -echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:1384: checking for $ac_func" >&5 -if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1389 "configure" -#include "confdefs.h" -/* System header to define __stub macros and hopefully few prototypes, - which can conflict with char $ac_func(); below. */ -#include <assert.h> -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char $ac_func(); - -int main() { - -/* The GNU C library defines this for functions which it implements - to always fail with ENOSYS. Some functions are actually named - something starting with __ and the normal name is an alias. */ -#if defined (__stub_$ac_func) || defined (__stub___$ac_func) -choke me -#else -$ac_func(); -#endif - -; return 0; } -EOF -if { (eval echo configure:1412: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_func_$ac_func=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_func_$ac_func=no" -fi -rm -f conftest* -fi - -if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` - cat >> confdefs.h <<EOF -#define $ac_tr_func 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - -echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:1437: checking for working mmap" >&5 -if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test "$cross_compiling" = yes; then - ac_cv_func_mmap_fixed_mapped=no -else - cat > conftest.$ac_ext <<EOF -#line 1445 "configure" -#include "confdefs.h" - -/* Thanks to Mike Haertel and Jim Avera for this test. - Here is a matrix of mmap possibilities: - mmap private not fixed - mmap private fixed at somewhere currently unmapped - mmap private fixed at somewhere already mapped - mmap shared not fixed - mmap shared fixed at somewhere currently unmapped - mmap shared fixed at somewhere already mapped - For private mappings, we should verify that changes cannot be read() - back from the file, nor mmap's back from the file at a different - address. (There have been systems where private was not correctly - implemented like the infamous i386 svr4.0, and systems where the - VM page cache was not coherent with the filesystem buffer cache - like early versions of FreeBSD and possibly contemporary NetBSD.) - For shared mappings, we should conversely verify that changes get - propogated back to all the places they're supposed to be. - - Grep wants private fixed already mapped. - The main things grep needs to know about mmap are: - * does it exist and is it safe to write into the mmap'd area - * how to use it (BSD variants) */ -#include <sys/types.h> -#include <fcntl.h> -#include <sys/mman.h> - -/* This mess was copied from the GNU getpagesize.h. */ -#ifndef HAVE_GETPAGESIZE -# ifdef HAVE_UNISTD_H -# include <unistd.h> -# endif - -/* Assume that all systems that can run configure have sys/param.h. */ -# ifndef HAVE_SYS_PARAM_H -# define HAVE_SYS_PARAM_H 1 -# endif - -# ifdef _SC_PAGESIZE -# define getpagesize() sysconf(_SC_PAGESIZE) -# else /* no _SC_PAGESIZE */ -# ifdef HAVE_SYS_PARAM_H -# include <sys/param.h> -# ifdef EXEC_PAGESIZE -# define getpagesize() EXEC_PAGESIZE -# else /* no EXEC_PAGESIZE */ -# ifdef NBPG -# define getpagesize() NBPG * CLSIZE -# ifndef CLSIZE -# define CLSIZE 1 -# endif /* no CLSIZE */ -# else /* no NBPG */ -# ifdef NBPC -# define getpagesize() NBPC -# else /* no NBPC */ -# ifdef PAGESIZE -# define getpagesize() PAGESIZE -# endif /* PAGESIZE */ -# endif /* no NBPC */ -# endif /* no NBPG */ -# endif /* no EXEC_PAGESIZE */ -# else /* no HAVE_SYS_PARAM_H */ -# define getpagesize() 8192 /* punt totally */ -# endif /* no HAVE_SYS_PARAM_H */ -# endif /* no _SC_PAGESIZE */ - -#endif /* no HAVE_GETPAGESIZE */ - -#ifdef __cplusplus -extern "C" { void *malloc(unsigned); } -#else -char *malloc(); -#endif - -int -main() -{ - char *data, *data2, *data3; - int i, pagesize; - int fd; - - pagesize = getpagesize(); - - /* - * First, make a file with some known garbage in it. - */ - data = malloc(pagesize); - if (!data) - exit(1); - for (i = 0; i < pagesize; ++i) - *(data + i) = rand(); - umask(0); - fd = creat("conftestmmap", 0600); - if (fd < 0) - exit(1); - if (write(fd, data, pagesize) != pagesize) - exit(1); - close(fd); - - /* - * Next, try to mmap the file at a fixed address which - * already has something else allocated at it. If we can, - * also make sure that we see the same garbage. - */ - fd = open("conftestmmap", O_RDWR); - if (fd < 0) - exit(1); - data2 = malloc(2 * pagesize); - if (!data2) - exit(1); - data2 += (pagesize - ((int) data2 & (pagesize - 1))) & (pagesize - 1); - if (data2 != mmap(data2, pagesize, PROT_READ | PROT_WRITE, - MAP_PRIVATE | MAP_FIXED, fd, 0L)) - exit(1); - for (i = 0; i < pagesize; ++i) - if (*(data + i) != *(data2 + i)) - exit(1); - - /* - * Finally, make sure that changes to the mapped area - * do not percolate back to the file as seen by read(). - * (This is a bug on some variants of i386 svr4.0.) - */ - for (i = 0; i < pagesize; ++i) - *(data2 + i) = *(data2 + i) + 1; - data3 = malloc(pagesize); - if (!data3) - exit(1); - if (read(fd, data3, pagesize) != pagesize) - exit(1); - for (i = 0; i < pagesize; ++i) - if (*(data + i) != *(data3 + i)) - exit(1); - close(fd); - unlink("conftestmmap"); - exit(0); -} - -EOF -if { (eval echo configure:1585: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null -then - ac_cv_func_mmap_fixed_mapped=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -fr conftest* - ac_cv_func_mmap_fixed_mapped=no -fi -rm -fr conftest* -fi - -fi - -echo "$ac_t""$ac_cv_func_mmap_fixed_mapped" 1>&6 -if test $ac_cv_func_mmap_fixed_mapped = yes; then - cat >> confdefs.h <<\EOF -#define HAVE_MMAP 1 -EOF - -fi - -echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 -echo "configure:1608: checking for Cygwin environment" >&5 -if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1613 "configure" -#include "confdefs.h" - -int main() { - -#ifndef __CYGWIN__ -#define __CYGWIN__ __CYGWIN32__ -#endif -return __CYGWIN__; -; return 0; } -EOF -if { (eval echo configure:1624: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - ac_cv_cygwin=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_cygwin=no -fi -rm -f conftest* -rm -f conftest* -fi - -echo "$ac_t""$ac_cv_cygwin" 1>&6 -CYGWIN= -test "$ac_cv_cygwin" = yes && CYGWIN=yes -echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 -echo "configure:1641: checking for mingw32 environment" >&5 -if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 1646 "configure" -#include "confdefs.h" - -int main() { -return __MINGW32__; -; return 0; } -EOF -if { (eval echo configure:1653: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - ac_cv_mingw32=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_mingw32=no -fi -rm -f conftest* -rm -f conftest* -fi - -echo "$ac_t""$ac_cv_mingw32" 1>&6 -MINGW32= -test "$ac_cv_mingw32" = yes && MINGW32=yes - -# autoconf.info says this should be called right after AC_INIT. - - -ac_aux_dir= -for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do - if test -f $ac_dir/install-sh; then - ac_aux_dir=$ac_dir - ac_install_sh="$ac_aux_dir/install-sh -c" - break - elif test -f $ac_dir/install.sh; then - ac_aux_dir=$ac_dir - ac_install_sh="$ac_aux_dir/install.sh -c" - break - fi -done -if test -z "$ac_aux_dir"; then - { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; } -fi -ac_config_guess=$ac_aux_dir/config.guess -ac_config_sub=$ac_aux_dir/config.sub -ac_configure=$ac_aux_dir/configure # This should be Cygnus configure. - - -# Do some error checking and defaulting for the host and target type. -# The inputs are: -# configure --host=HOST --target=TARGET --build=BUILD NONOPT -# -# The rules are: -# 1. You are not allowed to specify --host, --target, and nonopt at the -# same time. -# 2. Host defaults to nonopt. -# 3. If nonopt is not specified, then host defaults to the current host, -# as determined by config.guess. -# 4. Target and build default to nonopt. -# 5. If nonopt is not specified, then target and build default to host. - -# The aliases save the names the user supplied, while $host etc. -# will get canonicalized. -case $host---$target---$nonopt in -NONE---*---* | *---NONE---* | *---*---NONE) ;; -*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;; -esac - - -# Make sure we can run config.sub. -if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then : -else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } -fi - -echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:1720: checking host system type" >&5 - -host_alias=$host -case "$host_alias" in -NONE) - case $nonopt in - NONE) - if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then : - else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; } - fi ;; - *) host_alias=$nonopt ;; - esac ;; -esac - -host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias` -host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` -host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` -host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` -echo "$ac_t""$host" 1>&6 - -echo $ac_n "checking target system type""... $ac_c" 1>&6 -echo "configure:1741: checking target system type" >&5 - -target_alias=$target -case "$target_alias" in -NONE) - case $nonopt in - NONE) target_alias=$host_alias ;; - *) target_alias=$nonopt ;; - esac ;; -esac - -target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias` -target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` -target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` -target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` -echo "$ac_t""$target" 1>&6 - -echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:1759: checking build system type" >&5 - -build_alias=$build -case "$build_alias" in -NONE) - case $nonopt in - NONE) build_alias=$host_alias ;; - *) build_alias=$nonopt ;; - esac ;; -esac - -build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias` -build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'` -build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'` -build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` -echo "$ac_t""$build" 1>&6 - -test "$host_alias" != "$target_alias" && - test "$program_prefix$program_suffix$program_transform_name" = \ - NONENONEs,x,x, && - program_prefix=${target_alias}- - -if test "$program_transform_name" = s,x,x,; then - program_transform_name= -else - # Double any \ or $. echo might interpret backslashes. - cat <<\EOF_SED > conftestsed -s,\\,\\\\,g; s,\$,$$,g -EOF_SED - program_transform_name="`echo $program_transform_name|sed -f conftestsed`" - rm -f conftestsed -fi -test "$program_prefix" != NONE && - program_transform_name="s,^,${program_prefix},; $program_transform_name" -# Use a double $ so make ignores it. -test "$program_suffix" != NONE && - program_transform_name="s,\$\$,${program_suffix},; $program_transform_name" - -# sed with no file args requires a program. -test "$program_transform_name" = "" && program_transform_name="s,x,x," - -# Extract the first word of "gcc", so it can be a program name with args. -set dummy gcc; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1803: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. -else - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" - ac_dummy="$PATH" - for ac_dir in $ac_dummy; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - ac_cv_prog_CC="gcc" - break - fi - done - IFS="$ac_save_ifs" -fi -fi -CC="$ac_cv_prog_CC" -if test -n "$CC"; then - echo "$ac_t""$CC" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - -if test -z "$CC"; then - # Extract the first word of "cc", so it can be a program name with args. -set dummy cc; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1833: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. -else - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" - ac_prog_rejected=no - ac_dummy="$PATH" - for ac_dir in $ac_dummy; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - if test "$ac_dir/$ac_word" = "/usr/ucb/cc"; then - ac_prog_rejected=yes - continue - fi - ac_cv_prog_CC="cc" - break - fi - done - IFS="$ac_save_ifs" -if test $ac_prog_rejected = yes; then - # We found a bogon in the path, so make sure we never use it. - set dummy $ac_cv_prog_CC - shift - if test $# -gt 0; then - # We chose a different compiler from the bogus one. - # However, it has the same basename, so the bogon will be chosen - # first if we set CC to just the basename; use the full file name. - shift - set dummy "$ac_dir/$ac_word" "$@" - shift - ac_cv_prog_CC="$@" - fi -fi -fi -fi -CC="$ac_cv_prog_CC" -if test -n "$CC"; then - echo "$ac_t""$CC" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - if test -z "$CC"; then - case "`uname -s`" in - *win32* | *WIN32*) - # Extract the first word of "cl", so it can be a program name with args. -set dummy cl; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1884: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test -n "$CC"; then - ac_cv_prog_CC="$CC" # Let the user override the test. -else - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" - ac_dummy="$PATH" - for ac_dir in $ac_dummy; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - ac_cv_prog_CC="cl" - break - fi - done - IFS="$ac_save_ifs" -fi -fi -CC="$ac_cv_prog_CC" -if test -n "$CC"; then - echo "$ac_t""$CC" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - ;; - esac - fi - test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; } -fi - -echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:1916: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 - -ac_ext=c -# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. -ac_cpp='$CPP $CPPFLAGS' -ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' -ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' -cross_compiling=$ac_cv_prog_cc_cross - -cat > conftest.$ac_ext << EOF - -#line 1927 "configure" -#include "confdefs.h" - -main(){return(0);} -EOF -if { (eval echo configure:1932: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - ac_cv_prog_cc_works=yes - # If we can't run a trivial program, we are probably using a cross compiler. - if (./conftest; exit) 2>/dev/null; then - ac_cv_prog_cc_cross=no - else - ac_cv_prog_cc_cross=yes - fi -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - ac_cv_prog_cc_works=no -fi -rm -fr conftest* -ac_ext=c -# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. -ac_cpp='$CPP $CPPFLAGS' -ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5' -ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5' -cross_compiling=$ac_cv_prog_cc_cross - -echo "$ac_t""$ac_cv_prog_cc_works" 1>&6 -if test $ac_cv_prog_cc_works = no; then - { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } -fi -echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:1958: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 -echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 -cross_compiling=$ac_cv_prog_cc_cross - -echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:1963: checking whether we are using GNU C" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.c <<EOF -#ifdef __GNUC__ - yes; -#endif -EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1972: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then - ac_cv_prog_gcc=yes -else - ac_cv_prog_gcc=no -fi -fi - -echo "$ac_t""$ac_cv_prog_gcc" 1>&6 - -if test $ac_cv_prog_gcc = yes; then - GCC=yes -else - GCC= -fi - -ac_test_CFLAGS="${CFLAGS+set}" -ac_save_CFLAGS="$CFLAGS" -CFLAGS= -echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:1991: checking whether ${CC-cc} accepts -g" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - echo 'void f(){}' > conftest.c -if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then - ac_cv_prog_cc_g=yes -else - ac_cv_prog_cc_g=no -fi -rm -f conftest* - -fi - -echo "$ac_t""$ac_cv_prog_cc_g" 1>&6 -if test "$ac_test_CFLAGS" = set; then - CFLAGS="$ac_save_CFLAGS" -elif test $ac_cv_prog_cc_g = yes; then - if test "$GCC" = yes; then - CFLAGS="-g -O2" - else - CFLAGS="-g" - fi -else - if test "$GCC" = yes; then - CFLAGS="-O2" - else - CFLAGS= - fi -fi - -# Find a good install program. We prefer a C program (faster), -# so one script is as good as another. But avoid the broken or -# incompatible versions: -# SysV /etc/install, /usr/sbin/install -# SunOS /usr/etc/install -# IRIX /sbin/install -# AIX /bin/install -# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag -# AFS /usr/afsws/bin/install, which mishandles nonexistent args -# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" -# ./install, which can be erroneously created by make from ./install.sh. -echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:2034: checking for a BSD compatible install" >&5 -if test -z "$INSTALL"; then -if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - IFS="${IFS= }"; ac_save_IFS="$IFS"; IFS=":" - for ac_dir in $PATH; do - # Account for people who put trailing slashes in PATH elements. - case "$ac_dir/" in - /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;; - *) - # OSF1 and SCO ODT 3.0 have their own names for install. - # Don't use installbsd from OSF since it installs stuff as root - # by default. - for ac_prog in ginstall scoinst install; do - if test -f $ac_dir/$ac_prog; then - if test $ac_prog = install && - grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then - # AIX install. It has an incompatible calling convention. - : - else - ac_cv_path_install="$ac_dir/$ac_prog -c" - break 2 - fi - fi - done - ;; - esac - done - IFS="$ac_save_IFS" - -fi - if test "${ac_cv_path_install+set}" = set; then - INSTALL="$ac_cv_path_install" - else - # As a last resort, use the slow shell script. We don't cache a - # path for INSTALL within a source directory, because that will - # break other packages using the cache if that directory is - # removed, or if the path is relative. - INSTALL="$ac_install_sh" - fi -fi -echo "$ac_t""$INSTALL" 1>&6 - -# Use test -z because SunOS4 sh mishandles braces in ${var-val}. -# It thinks the first close brace ends the variable substitution. -test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}' - -test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' - -test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' - - -# Put a plausible default for CC_FOR_BUILD in Makefile. -if test "x$cross_compiling" = "xno"; then - CC_FOR_BUILD='$(CC)' -else - CC_FOR_BUILD=gcc -fi - - - - -AR=${AR-ar} - -# Extract the first word of "ranlib", so it can be a program name with args. -set dummy ranlib; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2102: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test -n "$RANLIB"; then - ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. -else - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" - ac_dummy="$PATH" - for ac_dir in $ac_dummy; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - ac_cv_prog_RANLIB="ranlib" - break - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":" -fi -fi -RANLIB="$ac_cv_prog_RANLIB" -if test -n "$RANLIB"; then - echo "$ac_t""$RANLIB" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - -ALL_LINGUAS= - - for ac_hdr in argz.h limits.h locale.h nl_types.h malloc.h string.h \ -unistd.h values.h sys/param.h -do -ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:2137: checking for $ac_hdr" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2142 "configure" -#include "confdefs.h" -#include <$ac_hdr> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2147: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` - cat >> confdefs.h <<EOF -#define $ac_tr_hdr 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - - for ac_func in getcwd munmap putenv setenv setlocale strchr strcasecmp \ -__argz_count __argz_stringify __argz_next -do -echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2177: checking for $ac_func" >&5 -if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2182 "configure" -#include "confdefs.h" -/* System header to define __stub macros and hopefully few prototypes, - which can conflict with char $ac_func(); below. */ -#include <assert.h> -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char $ac_func(); - -int main() { - -/* The GNU C library defines this for functions which it implements - to always fail with ENOSYS. Some functions are actually named - something starting with __ and the normal name is an alias. */ -#if defined (__stub_$ac_func) || defined (__stub___$ac_func) -choke me -#else -$ac_func(); -#endif - -; return 0; } -EOF -if { (eval echo configure:2205: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_func_$ac_func=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_func_$ac_func=no" -fi -rm -f conftest* -fi - -if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` - cat >> confdefs.h <<EOF -#define $ac_tr_func 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - - - if test "${ac_cv_func_stpcpy+set}" != "set"; then - for ac_func in stpcpy -do -echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2234: checking for $ac_func" >&5 -if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2239 "configure" -#include "confdefs.h" -/* System header to define __stub macros and hopefully few prototypes, - which can conflict with char $ac_func(); below. */ -#include <assert.h> -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char $ac_func(); - -int main() { - -/* The GNU C library defines this for functions which it implements - to always fail with ENOSYS. Some functions are actually named - something starting with __ and the normal name is an alias. */ -#if defined (__stub_$ac_func) || defined (__stub___$ac_func) -choke me -#else -$ac_func(); -#endif - -; return 0; } -EOF -if { (eval echo configure:2262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_func_$ac_func=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_func_$ac_func=no" -fi -rm -f conftest* -fi - -if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` - cat >> confdefs.h <<EOF -#define $ac_tr_func 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - - fi - if test "${ac_cv_func_stpcpy}" = "yes"; then - cat >> confdefs.h <<\EOF -#define HAVE_STPCPY 1 -EOF - - fi - - if test $ac_cv_header_locale_h = yes; then - echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:2296: checking for LC_MESSAGES" >&5 -if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2301 "configure" -#include "confdefs.h" -#include <locale.h> -int main() { -return LC_MESSAGES -; return 0; } -EOF -if { (eval echo configure:2308: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - am_cv_val_LC_MESSAGES=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - am_cv_val_LC_MESSAGES=no -fi -rm -f conftest* -fi - -echo "$ac_t""$am_cv_val_LC_MESSAGES" 1>&6 - if test $am_cv_val_LC_MESSAGES = yes; then - cat >> confdefs.h <<\EOF -#define HAVE_LC_MESSAGES 1 -EOF - - fi - fi - echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:2329: checking whether NLS is requested" >&5 - # Check whether --enable-nls or --disable-nls was given. -if test "${enable_nls+set}" = set; then - enableval="$enable_nls" - USE_NLS=$enableval -else - USE_NLS=yes -fi - - echo "$ac_t""$USE_NLS" 1>&6 - - - USE_INCLUDED_LIBINTL=no - - if test "$USE_NLS" = "yes"; then - cat >> confdefs.h <<\EOF -#define ENABLE_NLS 1 -EOF - - echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:2349: checking whether included gettext is requested" >&5 - # Check whether --with-included-gettext or --without-included-gettext was given. -if test "${with_included_gettext+set}" = set; then - withval="$with_included_gettext" - nls_cv_force_use_gnu_gettext=$withval -else - nls_cv_force_use_gnu_gettext=no -fi - - echo "$ac_t""$nls_cv_force_use_gnu_gettext" 1>&6 - - nls_cv_use_gnu_gettext="$nls_cv_force_use_gnu_gettext" - if test "$nls_cv_force_use_gnu_gettext" != "yes"; then - nls_cv_header_intl= - nls_cv_header_libgt= - CATOBJEXT=NONE - - ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:2368: checking for libintl.h" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2373 "configure" -#include "confdefs.h" -#include <libintl.h> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2378: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:2395: checking for gettext in libc" >&5 -if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2400 "configure" -#include "confdefs.h" -#include <libintl.h> -int main() { -return (int) gettext ("") -; return 0; } -EOF -if { (eval echo configure:2407: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - gt_cv_func_gettext_libc=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - gt_cv_func_gettext_libc=no -fi -rm -f conftest* -fi - -echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 - - if test "$gt_cv_func_gettext_libc" != "yes"; then - echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:2423: checking for bindtextdomain in -lintl" >&5 -ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` -if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - ac_save_LIBS="$LIBS" -LIBS="-lintl $LIBS" -cat > conftest.$ac_ext <<EOF -#line 2431 "configure" -#include "confdefs.h" -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char bindtextdomain(); - -int main() { -bindtextdomain() -; return 0; } -EOF -if { (eval echo configure:2442: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_lib_$ac_lib_var=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_lib_$ac_lib_var=no" -fi -rm -f conftest* -LIBS="$ac_save_LIBS" - -fi -if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then - echo "$ac_t""yes" 1>&6 - echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:2458: checking for gettext in libintl" >&5 -if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2463 "configure" -#include "confdefs.h" - -int main() { -return (int) gettext ("") -; return 0; } -EOF -if { (eval echo configure:2470: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - gt_cv_func_gettext_libintl=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - gt_cv_func_gettext_libintl=no -fi -rm -f conftest* -fi - -echo "$ac_t""$gt_cv_func_gettext_libintl" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - fi - - if test "$gt_cv_func_gettext_libc" = "yes" \ - || test "$gt_cv_func_gettext_libintl" = "yes"; then - cat >> confdefs.h <<\EOF -#define HAVE_GETTEXT 1 -EOF - - # Extract the first word of "msgfmt", so it can be a program name with args. -set dummy msgfmt; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2498: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - case "$MSGFMT" in - /*) - ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" - for ac_dir in $PATH; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then - ac_cv_path_MSGFMT="$ac_dir/$ac_word" - break - fi - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="no" - ;; -esac -fi -MSGFMT="$ac_cv_path_MSGFMT" -if test -n "$MSGFMT"; then - echo "$ac_t""$MSGFMT" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - if test "$MSGFMT" != "no"; then - for ac_func in dcgettext -do -echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:2532: checking for $ac_func" >&5 -if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2537 "configure" -#include "confdefs.h" -/* System header to define __stub macros and hopefully few prototypes, - which can conflict with char $ac_func(); below. */ -#include <assert.h> -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char $ac_func(); - -int main() { - -/* The GNU C library defines this for functions which it implements - to always fail with ENOSYS. Some functions are actually named - something starting with __ and the normal name is an alias. */ -#if defined (__stub_$ac_func) || defined (__stub___$ac_func) -choke me -#else -$ac_func(); -#endif - -; return 0; } -EOF -if { (eval echo configure:2560: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_func_$ac_func=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_func_$ac_func=no" -fi -rm -f conftest* -fi - -if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` - cat >> confdefs.h <<EOF -#define $ac_tr_func 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - - # Extract the first word of "gmsgfmt", so it can be a program name with args. -set dummy gmsgfmt; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2587: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - case "$GMSGFMT" in - /*) - ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path. - ;; - ?:/*) - ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" - ac_dummy="$PATH" - for ac_dir in $ac_dummy; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - ac_cv_path_GMSGFMT="$ac_dir/$ac_word" - break - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT" - ;; -esac -fi -GMSGFMT="$ac_cv_path_GMSGFMT" -if test -n "$GMSGFMT"; then - echo "$ac_t""$GMSGFMT" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - # Extract the first word of "xgettext", so it can be a program name with args. -set dummy xgettext; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2623: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - case "$XGETTEXT" in - /*) - ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" - for ac_dir in $PATH; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - if test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"; then - ac_cv_path_XGETTEXT="$ac_dir/$ac_word" - break - fi - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":" - ;; -esac -fi -XGETTEXT="$ac_cv_path_XGETTEXT" -if test -n "$XGETTEXT"; then - echo "$ac_t""$XGETTEXT" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - cat > conftest.$ac_ext <<EOF -#line 2655 "configure" -#include "confdefs.h" - -int main() { -extern int _nl_msg_cat_cntr; - return _nl_msg_cat_cntr -; return 0; } -EOF -if { (eval echo configure:2663: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - CATOBJEXT=.gmo - DATADIRNAME=share -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - CATOBJEXT=.mo - DATADIRNAME=lib -fi -rm -f conftest* - INSTOBJEXT=.mo - fi - fi - -else - echo "$ac_t""no" 1>&6 -fi - - - - if test "$CATOBJEXT" = "NONE"; then - nls_cv_use_gnu_gettext=yes - fi - fi - - if test "$nls_cv_use_gnu_gettext" = "yes"; then - INTLOBJS="\$(GETTOBJS)" - # Extract the first word of "msgfmt", so it can be a program name with args. -set dummy msgfmt; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2695: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - case "$MSGFMT" in - /*) - ac_cv_path_MSGFMT="$MSGFMT" # Let the user override the test with a path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" - for ac_dir in $PATH; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - if test -z "`$ac_dir/$ac_word -h 2>&1 | grep 'dv '`"; then - ac_cv_path_MSGFMT="$ac_dir/$ac_word" - break - fi - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_path_MSGFMT" && ac_cv_path_MSGFMT="msgfmt" - ;; -esac -fi -MSGFMT="$ac_cv_path_MSGFMT" -if test -n "$MSGFMT"; then - echo "$ac_t""$MSGFMT" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - # Extract the first word of "gmsgfmt", so it can be a program name with args. -set dummy gmsgfmt; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2729: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - case "$GMSGFMT" in - /*) - ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a path. - ;; - ?:/*) - ac_cv_path_GMSGFMT="$GMSGFMT" # Let the user override the test with a dos path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS=":" - ac_dummy="$PATH" - for ac_dir in $ac_dummy; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - ac_cv_path_GMSGFMT="$ac_dir/$ac_word" - break - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_path_GMSGFMT" && ac_cv_path_GMSGFMT="$MSGFMT" - ;; -esac -fi -GMSGFMT="$ac_cv_path_GMSGFMT" -if test -n "$GMSGFMT"; then - echo "$ac_t""$GMSGFMT" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - # Extract the first word of "xgettext", so it can be a program name with args. -set dummy xgettext; ac_word=$2 -echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2765: checking for $ac_word" >&5 -if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - case "$XGETTEXT" in - /*) - ac_cv_path_XGETTEXT="$XGETTEXT" # Let the user override the test with a path. - ;; - *) - IFS="${IFS= }"; ac_save_ifs="$IFS"; IFS="${IFS}:" - for ac_dir in $PATH; do - test -z "$ac_dir" && ac_dir=. - if test -f $ac_dir/$ac_word; then - if test -z "`$ac_dir/$ac_word -h 2>&1 | grep '(HELP)'`"; then - ac_cv_path_XGETTEXT="$ac_dir/$ac_word" - break - fi - fi - done - IFS="$ac_save_ifs" - test -z "$ac_cv_path_XGETTEXT" && ac_cv_path_XGETTEXT=":" - ;; -esac -fi -XGETTEXT="$ac_cv_path_XGETTEXT" -if test -n "$XGETTEXT"; then - echo "$ac_t""$XGETTEXT" 1>&6 -else - echo "$ac_t""no" 1>&6 -fi - - - USE_INCLUDED_LIBINTL=yes - CATOBJEXT=.gmo - INSTOBJEXT=.mo - DATADIRNAME=share - INTLDEPS='$(top_builddir)/../intl/libintl.a' - INTLLIBS=$INTLDEPS - LIBS=`echo $LIBS | sed -e 's/-lintl//'` - nls_cv_header_intl=libintl.h - nls_cv_header_libgt=libgettext.h - fi - - if test "$XGETTEXT" != ":"; then - if $XGETTEXT --omit-header /dev/null 2> /dev/null; then - : ; - else - echo "$ac_t""found xgettext programs is not GNU xgettext; ignore it" 1>&6 - XGETTEXT=":" - fi - fi - - # We need to process the po/ directory. - POSUB=po - else - DATADIRNAME=share - nls_cv_header_intl=libintl.h - nls_cv_header_libgt=libgettext.h - fi - - # If this is used in GNU gettext we have to set USE_NLS to `yes' - # because some of the sources are only built for this goal. - if test "$PACKAGE" = gettext; then - USE_NLS=yes - USE_INCLUDED_LIBINTL=yes - fi - - for lang in $ALL_LINGUAS; do - GMOFILES="$GMOFILES $lang.gmo" - POFILES="$POFILES $lang.po" - done - - - - - - - - - - - - - - - if test "x$CATOBJEXT" != "x"; then - if test "x$ALL_LINGUAS" = "x"; then - LINGUAS= - else - echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:2855: checking for catalogs to be installed" >&5 - NEW_LINGUAS= - for lang in ${LINGUAS=$ALL_LINGUAS}; do - case "$ALL_LINGUAS" in - *$lang*) NEW_LINGUAS="$NEW_LINGUAS $lang" ;; - esac - done - LINGUAS=$NEW_LINGUAS - echo "$ac_t""$LINGUAS" 1>&6 - fi - - if test -n "$LINGUAS"; then - for lang in $LINGUAS; do CATALOGS="$CATALOGS $lang$CATOBJEXT"; done - fi - fi - - if test $ac_cv_header_locale_h = yes; then - INCLUDE_LOCALE_H="#include <locale.h>" - else - INCLUDE_LOCALE_H="\ -/* The system does not provide the header <locale.h>. Take care yourself. */" - fi - - - if test -f $srcdir/po2tbl.sed.in; then - if test "$CATOBJEXT" = ".cat"; then - ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:2883: checking for linux/version.h" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2888 "configure" -#include "confdefs.h" -#include <linux/version.h> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2893: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - msgformat=linux -else - echo "$ac_t""no" 1>&6 -msgformat=xopen -fi - - - sed -e '/^#/d' $srcdir/$msgformat-msg.sed > po2msg.sed - fi - sed -e '/^#.*[^\\]$/d' -e '/^#$/d' \ - $srcdir/po2tbl.sed.in > po2tbl.sed - fi - - if test "$PACKAGE" = "gettext"; then - GT_NO="#NO#" - GT_YES= - else - GT_NO= - GT_YES="#YES#" - fi - - - - MKINSTALLDIRS="\$(srcdir)/../../mkinstalldirs" - - - l= - - - if test -d $srcdir/po; then - test -d po || mkdir po - if test "x$srcdir" != "x."; then - if test "x`echo $srcdir | sed 's@/.*@@'`" = "x"; then - posrcprefix="$srcdir/" - else - posrcprefix="../$srcdir/" - fi - else - posrcprefix="../" - fi - rm -f po/POTFILES - sed -e "/^#/d" -e "/^\$/d" -e "s,.*, $posrcprefix& \\\\," -e "\$s/\(.*\) \\\\/\1/" \ - < $srcdir/po/POTFILES.in > po/POTFILES - fi - - -# Check for common headers. -# FIXME: Seems to me this can cause problems for i386-windows hosts. -# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*. -for ac_hdr in stdlib.h string.h strings.h unistd.h time.h -do -ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:2962: checking for $ac_hdr" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 2967 "configure" -#include "confdefs.h" -#include <$ac_hdr> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2972: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` - cat >> confdefs.h <<EOF -#define $ac_tr_hdr 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - -for ac_hdr in sys/time.h sys/resource.h -do -ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3002: checking for $ac_hdr" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 3007 "configure" -#include "confdefs.h" -#include <$ac_hdr> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3012: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` - cat >> confdefs.h <<EOF -#define $ac_tr_hdr 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - -for ac_hdr in fcntl.h fpu_control.h -do -ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3042: checking for $ac_hdr" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 3047 "configure" -#include "confdefs.h" -#include <$ac_hdr> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3052: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` - cat >> confdefs.h <<EOF -#define $ac_tr_hdr 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - -for ac_hdr in dlfcn.h errno.h sys/stat.h -do -ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` -echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3082: checking for $ac_hdr" >&5 -if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 3087 "configure" -#include "confdefs.h" -#include <$ac_hdr> -EOF -ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3092: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } -ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` -if test -z "$ac_err"; then - rm -rf conftest* - eval "ac_cv_header_$ac_safe=yes" -else - echo "$ac_err" >&5 - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_header_$ac_safe=no" -fi -rm -f conftest* -fi -if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'` - cat >> confdefs.h <<EOF -#define $ac_tr_hdr 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - -for ac_func in getrusage time sigaction __setfpucw -do -echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3121: checking for $ac_func" >&5 -if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 3126 "configure" -#include "confdefs.h" -/* System header to define __stub macros and hopefully few prototypes, - which can conflict with char $ac_func(); below. */ -#include <assert.h> -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char $ac_func(); - -int main() { - -/* The GNU C library defines this for functions which it implements - to always fail with ENOSYS. Some functions are actually named - something starting with __ and the normal name is an alias. */ -#if defined (__stub_$ac_func) || defined (__stub___$ac_func) -choke me -#else -$ac_func(); -#endif - -; return 0; } -EOF -if { (eval echo configure:3149: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_func_$ac_func=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_func_$ac_func=no" -fi -rm -f conftest* -fi - -if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'` - cat >> confdefs.h <<EOF -#define $ac_tr_func 1 -EOF - -else - echo "$ac_t""no" 1>&6 -fi -done - - -# Check for socket libraries -echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6 -echo "configure:3176: checking for bind in -lsocket" >&5 -ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'` -if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - ac_save_LIBS="$LIBS" -LIBS="-lsocket $LIBS" -cat > conftest.$ac_ext <<EOF -#line 3184 "configure" -#include "confdefs.h" -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char bind(); - -int main() { -bind() -; return 0; } -EOF -if { (eval echo configure:3195: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_lib_$ac_lib_var=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_lib_$ac_lib_var=no" -fi -rm -f conftest* -LIBS="$ac_save_LIBS" - -fi -if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \ - -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'` - cat >> confdefs.h <<EOF -#define $ac_tr_lib 1 -EOF - - LIBS="-lsocket $LIBS" - -else - echo "$ac_t""no" 1>&6 -fi - -echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6 -echo "configure:3223: checking for gethostbyname in -lnsl" >&5 -ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'` -if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - ac_save_LIBS="$LIBS" -LIBS="-lnsl $LIBS" -cat > conftest.$ac_ext <<EOF -#line 3231 "configure" -#include "confdefs.h" -/* Override any gcc2 internal prototype to avoid an error. */ -/* We use char because int might match the return type of a gcc2 - builtin and then its argument prototype would still apply. */ -char gethostbyname(); - -int main() { -gethostbyname() -; return 0; } -EOF -if { (eval echo configure:3242: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then - rm -rf conftest* - eval "ac_cv_lib_$ac_lib_var=yes" -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - eval "ac_cv_lib_$ac_lib_var=no" -fi -rm -f conftest* -LIBS="$ac_save_LIBS" - -fi -if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then - echo "$ac_t""yes" 1>&6 - ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \ - -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'` - cat >> confdefs.h <<EOF -#define $ac_tr_lib 1 -EOF - - LIBS="-lnsl $LIBS" - -else - echo "$ac_t""no" 1>&6 -fi - - -. ${srcdir}/../../bfd/configure.host - - - -USE_MAINTAINER_MODE=no -# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. -if test "${enable_maintainer_mode+set}" = set; then - enableval="$enable_maintainer_mode" - case "${enableval}" in - yes) MAINT="" USE_MAINTAINER_MODE=yes ;; - no) MAINT="#" ;; - *) { echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;; -esac -if test x"$silent" != x"yes" && test x"$MAINT" = x""; then - echo "Setting maintainer mode" 6>&1 -fi -else - MAINT="#" -fi - - - -# Check whether --enable-sim-bswap or --disable-sim-bswap was given. -if test "${enable_sim_bswap+set}" = set; then - enableval="$enable_sim_bswap" - case "${enableval}" in - yes) sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";; - no) sim_bswap="-DWITH_BSWAP=0";; - *) { echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";; -esac -if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then - echo "Setting bswap flags = $sim_bswap" 6>&1 -fi -else - sim_bswap="" -fi - - - -# Check whether --enable-sim-cflags or --disable-sim-cflags was given. -if test "${enable_sim_cflags+set}" = set; then - enableval="$enable_sim_cflags" - case "${enableval}" in - yes) sim_cflags="-O2 -fomit-frame-pointer";; - trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";; - no) sim_cflags="";; - *) sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;; -esac -if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then - echo "Setting sim cflags = $sim_cflags" 6>&1 -fi -else - sim_cflags="" -fi - - - -# Check whether --enable-sim-debug or --disable-sim-debug was given. -if test "${enable_sim_debug+set}" = set; then - enableval="$enable_sim_debug" - case "${enableval}" in - yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";; - no) sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";; - *) sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";; -esac -if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then - echo "Setting sim debug = $sim_debug" 6>&1 -fi -else - sim_debug="" -fi - - - -# Check whether --enable-sim-stdio or --disable-sim-stdio was given. -if test "${enable_sim_stdio+set}" = set; then - enableval="$enable_sim_stdio" - case "${enableval}" in - yes) sim_stdio="-DWITH_STDIO=DO_USE_STDIO";; - no) sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";; - *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";; -esac -if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then - echo "Setting stdio flags = $sim_stdio" 6>&1 -fi -else - sim_stdio="" -fi - - - -# Check whether --enable-sim-trace or --disable-sim-trace was given. -if test "${enable_sim_trace+set}" = set; then - enableval="$enable_sim_trace" - case "${enableval}" in - yes) sim_trace="-DTRACE=1 -DWITH_TRACE=-1";; - no) sim_trace="-DTRACE=0 -DWITH_TRACE=0";; - [-0-9]*) - sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";; - [a-z]*) - sim_trace="" - for x in `echo "$enableval" | sed -e "s/,/ /g"`; do - if test x"$sim_trace" = x; then - sim_trace="-DWITH_TRACE='(TRACE_$x" - else - sim_trace="${sim_trace}|TRACE_$x" - fi - done - sim_trace="$sim_trace)'" ;; -esac -if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then - echo "Setting sim trace = $sim_trace" 6>&1 -fi -else - sim_trace="" -fi - - - -# Check whether --enable-sim-profile or --disable-sim-profile was given. -if test "${enable_sim_profile+set}" = set; then - enableval="$enable_sim_profile" - case "${enableval}" in - yes) sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";; - no) sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";; - [-0-9]*) - sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";; - [a-z]*) - sim_profile="" - for x in `echo "$enableval" | sed -e "s/,/ /g"`; do - if test x"$sim_profile" = x; then - sim_profile="-DWITH_PROFILE='(PROFILE_$x" - else - sim_profile="${sim_profile}|PROFILE_$x" - fi - done - sim_profile="$sim_profile)'" ;; -esac -if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then - echo "Setting sim profile = $sim_profile" 6>&1 -fi -else - sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1" -fi - - - -echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6 -echo "configure:3418: checking return type of signal handlers" >&5 -if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - cat > conftest.$ac_ext <<EOF -#line 3423 "configure" -#include "confdefs.h" -#include <sys/types.h> -#include <signal.h> -#ifdef signal -#undef signal -#endif -#ifdef __cplusplus -extern "C" void (*signal (int, void (*)(int)))(int); -#else -void (*signal ()) (); -#endif - -int main() { -int i; -; return 0; } -EOF -if { (eval echo configure:3440: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - ac_cv_type_signal=void -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_type_signal=int -fi -rm -f conftest* -fi - -echo "$ac_t""$ac_cv_type_signal" 1>&6 -cat >> confdefs.h <<EOF -#define RETSIGTYPE $ac_cv_type_signal -EOF - - - - - -echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:3462: checking for executable suffix" >&5 -if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - if test "$CYGWIN" = yes || test "$MINGW32" = yes; then - ac_cv_exeext=.exe -else - rm -f conftest* - echo 'int main () { return 0; }' > conftest.$ac_ext - ac_cv_exeext= - if { (eval echo configure:3472: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then - for file in conftest.*; do - case $file in - *.c | *.o | *.obj | *.ilk | *.pdb) ;; - *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; - esac - done - else - { echo "configure: error: installation or configuration problem: compiler cannot create executables." 1>&2; exit 1; } - fi - rm -f conftest* - test x"${ac_cv_exeext}" = x && ac_cv_exeext=no -fi -fi - -EXEEXT="" -test x"${ac_cv_exeext}" != xno && EXEEXT=${ac_cv_exeext} -echo "$ac_t""${ac_cv_exeext}" 1>&6 -ac_exeext=$EXEEXT - - -sim_link_files= -sim_link_links= - -sim_link_links=tconfig.h -if test -f ${srcdir}/tconfig.in -then - sim_link_files=tconfig.in -else - sim_link_files=../common/tconfig.in -fi - -# targ-vals.def points to the libc macro description file. -case "${target}" in -*-*-*) TARG_VALS_DEF=../common/nltvals.def ;; -esac -sim_link_files="${sim_link_files} ${TARG_VALS_DEF}" -sim_link_links="${sim_link_links} targ-vals.def" - - - - -wire_endian="BIG_ENDIAN" -default_endian="" -# Check whether --enable-sim-endian or --disable-sim-endian was given. -if test "${enable_sim_endian+set}" = set; then - enableval="$enable_sim_endian" - case "${enableval}" in - b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BIG_ENDIAN";; - l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=LITTLE_ENDIAN";; - yes) if test x"$wire_endian" != x; then - sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}" - else - if test x"$default_endian" != x; then - sim_endian="-DWITH_TARGET_BYTE_ORDER=${default_endian}" - else - echo "No hard-wired endian for target $target" 1>&6 - sim_endian="-DWITH_TARGET_BYTE_ORDER=0" - fi - fi;; - no) if test x"$default_endian" != x; then - sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}" - else - if test x"$wire_endian" != x; then - sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${wire_endian}" - else - echo "No default endian for target $target" 1>&6 - sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=0" - fi - fi;; - *) { echo "configure: error: "Unknown value $enableval for --enable-sim-endian"" 1>&2; exit 1; }; sim_endian="";; -esac -if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then - echo "Setting endian flags = $sim_endian" 6>&1 -fi -else - if test x"$default_endian" != x; then - sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=${default_endian}" -else - if test x"$wire_endian" != x; then - sim_endian="-DWITH_TARGET_BYTE_ORDER=${wire_endian}" - else - sim_endian= - fi -fi -fi - -wire_alignment="STRICT_ALIGNMENT" -default_alignment="" - -# Check whether --enable-sim-alignment or --disable-sim-alignment was given. -if test "${enable_sim_alignment+set}" = set; then - enableval="$enable_sim_alignment" - case "${enableval}" in - strict | STRICT) sim_alignment="-DWITH_ALIGNMENT=STRICT_ALIGNMENT";; - nonstrict | NONSTRICT) sim_alignment="-DWITH_ALIGNMENT=NONSTRICT_ALIGNMENT";; - forced | FORCED) sim_alignment="-DWITH_ALIGNMENT=FORCED_ALIGNMENT";; - yes) if test x"$wire_alignment" != x; then - sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}" - else - if test x"$default_alignment" != x; then - sim_alignment="-DWITH_ALIGNMENT=${default_alignment}" - else - echo "No hard-wired alignment for target $target" 1>&6 - sim_alignment="-DWITH_ALIGNMENT=0" - fi - fi;; - no) if test x"$default_alignment" != x; then - sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}" - else - if test x"$wire_alignment" != x; then - sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${wire_alignment}" - else - echo "No default alignment for target $target" 1>&6 - sim_alignment="-DWITH_DEFAULT_ALIGNMENT=0" - fi - fi;; - *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-alignment"" 1>&2; exit 1; }; sim_alignment="";; -esac -if test x"$silent" != x"yes" && test x"$sim_alignment" != x""; then - echo "Setting alignment flags = $sim_alignment" 6>&1 -fi -else - if test x"$default_alignment" != x; then - sim_alignment="-DWITH_DEFAULT_ALIGNMENT=${default_alignment}" -else - if test x"$wire_alignment" != x; then - sim_alignment="-DWITH_ALIGNMENT=${wire_alignment}" - else - sim_alignment= - fi -fi -fi - - -# Check whether --enable-sim-hostendian or --disable-sim-hostendian was given. -if test "${enable_sim_hostendian+set}" = set; then - enableval="$enable_sim_hostendian" - case "${enableval}" in - no) sim_hostendian="-DWITH_HOST_BYTE_ORDER=0";; - b*|B*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN";; - l*|L*) sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN";; - *) { echo "configure: error: "Unknown value $enableval for --enable-sim-hostendian"" 1>&2; exit 1; }; sim_hostendian="";; -esac -if test x"$silent" != x"yes" && test x"$sim_hostendian" != x""; then - echo "Setting hostendian flags = $sim_hostendian" 6>&1 -fi -else - -if test "x$cross_compiling" = "xno"; then - echo $ac_n "checking whether byte ordering is bigendian""... $ac_c" 1>&6 -echo "configure:3623: checking whether byte ordering is bigendian" >&5 -if eval "test \"`echo '$''{'ac_cv_c_bigendian'+set}'`\" = set"; then - echo $ac_n "(cached) $ac_c" 1>&6 -else - ac_cv_c_bigendian=unknown -# See if sys/param.h defines the BYTE_ORDER macro. -cat > conftest.$ac_ext <<EOF -#line 3630 "configure" -#include "confdefs.h" -#include <sys/types.h> -#include <sys/param.h> -int main() { - -#if !BYTE_ORDER || !BIG_ENDIAN || !LITTLE_ENDIAN - bogus endian macros -#endif -; return 0; } -EOF -if { (eval echo configure:3641: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - # It does; now see whether it defined to BIG_ENDIAN or not. -cat > conftest.$ac_ext <<EOF -#line 3645 "configure" -#include "confdefs.h" -#include <sys/types.h> -#include <sys/param.h> -int main() { - -#if BYTE_ORDER != BIG_ENDIAN - not big endian -#endif -; return 0; } -EOF -if { (eval echo configure:3656: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then - rm -rf conftest* - ac_cv_c_bigendian=yes -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -rf conftest* - ac_cv_c_bigendian=no -fi -rm -f conftest* -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 -fi -rm -f conftest* -if test $ac_cv_c_bigendian = unknown; then -if test "$cross_compiling" = yes; then - { echo "configure: error: can not run test program while cross compiling" 1>&2; exit 1; } -else - cat > conftest.$ac_ext <<EOF -#line 3676 "configure" -#include "confdefs.h" -main () { - /* Are we little or big endian? From Harbison&Steele. */ - union - { - long l; - char c[sizeof (long)]; - } u; - u.l = 1; - exit (u.c[sizeof (long) - 1] == 1); -} -EOF -if { (eval echo configure:3689: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null -then - ac_cv_c_bigendian=no -else - echo "configure: failed program was:" >&5 - cat conftest.$ac_ext >&5 - rm -fr conftest* - ac_cv_c_bigendian=yes -fi -rm -fr conftest* -fi - -fi -fi - -echo "$ac_t""$ac_cv_c_bigendian" 1>&6 -if test $ac_cv_c_bigendian = yes; then - cat >> confdefs.h <<\EOF -#define WORDS_BIGENDIAN 1 -EOF - -fi - - if test $ac_cv_c_bigendian = yes; then - sim_hostendian="-DWITH_HOST_BYTE_ORDER=BIG_ENDIAN" - else - sim_hostendian="-DWITH_HOST_BYTE_ORDER=LITTLE_ENDIAN" - fi -else - sim_hostendian="-DWITH_HOST_BYTE_ORDER=0" -fi -fi - - -default_sim_scache="16384" -# Check whether --enable-sim-scache or --disable-sim-scache was given. -if test "${enable_sim_scache+set}" = set; then - enableval="$enable_sim_scache" - case "${enableval}" in - yes) sim_scache="-DWITH_SCACHE=${default_sim_scache}";; - no) sim_scache="-DWITH_SCACHE=0" ;; - [0-9]*) sim_scache="-DWITH_SCACHE=${enableval}";; - *) { echo "configure: error: "Bad value $enableval passed to --enable-sim-scache"" 1>&2; exit 1; }; - sim_scache="";; -esac -if test x"$silent" != x"yes" && test x"$sim_scache" != x""; then - echo "Setting scache size = $sim_scache" 6>&1 -fi -else - sim_scache="-DWITH_SCACHE=${default_sim_scache}" -fi - - - -default_sim_default_model="m32r/d" -# Check whether --enable-sim-default-model or --disable-sim-default-model was given. -if test "${enable_sim_default_model+set}" = set; then - enableval="$enable_sim_default_model" - case "${enableval}" in - yes|no) { echo "configure: error: "Missing argument to --enable-sim-default-model"" 1>&2; exit 1; };; - *) sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";; -esac -if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then - echo "Setting default model = $sim_default_model" 6>&1 -fi -else - sim_default_model="-DWITH_DEFAULT_MODEL='\"${default_sim_default_model}\"'" -fi - - - -# Check whether --enable-sim-environment or --disable-sim-environment was given. -if test "${enable_sim_environment+set}" = set; then - enableval="$enable_sim_environment" - case "${enableval}" in - all | ALL) sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT";; - user | USER) sim_environment="-DWITH_ENVIRONMENT=USER_ENVIRONMENT";; - virtual | VIRTUAL) sim_environment="-DWITH_ENVIRONMENT=VIRTUAL_ENVIRONMENT";; - operating | OPERATING) sim_environment="-DWITH_ENVIRONMENT=OPERATING_ENVIRONMENT";; - *) { echo "configure: error: "Unknown value $enableval passed to --enable-sim-environment"" 1>&2; exit 1; }; - sim_environment="";; -esac -if test x"$silent" != x"yes" && test x"$sim_environment" != x""; then - echo "Setting sim environment = $sim_environment" 6>&1 -fi -else - sim_environment="-DWITH_ENVIRONMENT=ALL_ENVIRONMENT" -fi - - -default_sim_inline="" -# Check whether --enable-sim-inline or --disable-sim-inline was given. -if test "${enable_sim_inline+set}" = set; then - enableval="$enable_sim_inline" - sim_inline="" -case "$enableval" in - no) sim_inline="-DDEFAULT_INLINE=0";; - 0) sim_inline="-DDEFAULT_INLINE=0";; - yes | 2) sim_inline="-DDEFAULT_INLINE=ALL_C_INLINE";; - 1) sim_inline="-DDEFAULT_INLINE=INLINE_LOCALS";; - *) for x in `echo "$enableval" | sed -e "s/,/ /g"`; do - new_flag="" - case "$x" in - *_INLINE=*) new_flag="-D$x";; - *=*) new_flag=`echo "$x" | sed -e "s/=/_INLINE=/" -e "s/^/-D/"`;; - *_INLINE) new_flag="-D$x=ALL_C_INLINE";; - *) new_flag="-D$x""_INLINE=ALL_C_INLINE";; - esac - if test x"$sim_inline" = x""; then - sim_inline="$new_flag" - else - sim_inline="$sim_inline $new_flag" - fi - done;; -esac -if test x"$silent" != x"yes" && test x"$sim_inline" != x""; then - echo "Setting inline flags = $sim_inline" 6>&1 -fi -else - -if test "x$cross_compiling" = "xno"; then - if test x"$GCC" != "x" -a x"${default_sim_inline}" != "x" ; then - sim_inline="${default_sim_inline}" - if test x"$silent" != x"yes"; then - echo "Setting inline flags = $sim_inline" 6>&1 - fi - else - sim_inline="" - fi -else - sim_inline="-DDEFAULT_INLINE=0" -fi -fi - - -cgen_maint=no -cgen=guile -cgendir='$(srcdir)/../../cgen' -# Check whether --enable-cgen-maint or --disable-cgen-maint was given. -if test "${enable_cgen_maint+set}" = set; then - enableval="$enable_cgen_maint" - case "${enableval}" in - yes) cgen_maint=yes ;; - no) cgen_maint=no ;; - *) - # argument is cgen install directory (not implemented yet). - # Having a `share' directory might be more appropriate for the .scm, - # .cpu, etc. files. - cgendir=${cgen_maint}/lib/cgen - cgen=guile - ;; -esac -fi -if test x${cgen_maint} != xno ; then - CGEN_MAINT='' -else - CGEN_MAINT='#' -fi - - - - - - - -trap '' 1 2 15 -cat > confcache <<\EOF -# This file is a shell script that caches the results of configure -# tests run on this system so they can be shared between configure -# scripts and configure runs. It is not useful on other systems. -# If it contains results you don't want to keep, you may remove or edit it. -# -# By default, configure uses ./config.cache as the cache file, -# creating it if it does not exist already. You can give configure -# the --cache-file=FILE option to use a different cache file; that is -# what configure does when it calls configure scripts in -# subdirectories, so they share the cache. -# Giving --cache-file=/dev/null disables caching, for debugging configure. -# config.status only pays attention to the cache file if you give it the -# --recheck option to rerun configure. -# -EOF -# The following way of writing the cache mishandles newlines in values, -# but we know of no workaround that is simple, portable, and efficient. -# So, don't put newlines in cache variables' values. -# Ultrix sh set writes to stderr and can't be redirected directly, -# and sets the high bit in the cache file unless we assign to the vars. -(set) 2>&1 | - case `(ac_space=' '; set | grep ac_space) 2>&1` in - *ac_space=\ *) - # `set' does not quote correctly, so add quotes (double-quote substitution - # turns \\\\ into \\, and sed turns \\ into \). - sed -n \ - -e "s/'/'\\\\''/g" \ - -e "s/^\\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\\)=\\(.*\\)/\\1=\${\\1='\\2'}/p" - ;; - *) - # `set' quotes correctly as required by POSIX, so do not add quotes. - sed -n -e 's/^\([a-zA-Z0-9_]*_cv_[a-zA-Z0-9_]*\)=\(.*\)/\1=${\1=\2}/p' - ;; - esac >> confcache -if cmp -s $cache_file confcache; then - : -else - if test -w $cache_file; then - echo "updating cache $cache_file" - cat confcache > $cache_file - else - echo "not updating unwritable cache $cache_file" - fi -fi -rm -f confcache - -trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15 - -test "x$prefix" = xNONE && prefix=$ac_default_prefix -# Let make expand exec_prefix. -test "x$exec_prefix" = xNONE && exec_prefix='${prefix}' - -# Any assignment to VPATH causes Sun make to only execute -# the first set of double-colon rules, so remove it if not needed. -# If there is a colon in the path, we need to keep it. -if test "x$srcdir" = x.; then - ac_vpsub='/^[ ]*VPATH[ ]*=[^:]*$/d' -fi - -trap 'rm -f $CONFIG_STATUS conftest*; exit 1' 1 2 15 - -DEFS=-DHAVE_CONFIG_H - -# Without the "./", some shells look in PATH for config.status. -: ${CONFIG_STATUS=./config.status} - -echo creating $CONFIG_STATUS -rm -f $CONFIG_STATUS -cat > $CONFIG_STATUS <<EOF -#! /bin/sh -# Generated automatically by configure. -# Run this file to recreate the current configuration. -# This directory was configured as follows, -# on host `(hostname || uname -n) 2>/dev/null | sed 1q`: -# -# $0 $ac_configure_args -# -# Compiler output produced by configure, useful for debugging -# configure, is in ./config.log if it exists. - -ac_cs_usage="Usage: $CONFIG_STATUS [--recheck] [--version] [--help]" -for ac_option -do - case "\$ac_option" in - -recheck | --recheck | --rechec | --reche | --rech | --rec | --re | --r) - echo "running \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion" - exec \${CONFIG_SHELL-/bin/sh} $0 $ac_configure_args --no-create --no-recursion ;; - -version | --version | --versio | --versi | --vers | --ver | --ve | --v) - echo "$CONFIG_STATUS generated by autoconf version 2.13" - exit 0 ;; - -help | --help | --hel | --he | --h) - echo "\$ac_cs_usage"; exit 0 ;; - *) echo "\$ac_cs_usage"; exit 1 ;; - esac -done - -ac_given_srcdir=$srcdir -ac_given_INSTALL="$INSTALL" - -trap 'rm -fr `echo "Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in config.h:config.in" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15 -EOF -cat >> $CONFIG_STATUS <<EOF - -# Protect against being on the right side of a sed subst in config.status. -sed 's/%@/@@/; s/@%/@@/; s/%g\$/@g/; /@g\$/s/[\\\\&%]/\\\\&/g; - s/@@/%@/; s/@@/@%/; s/@g\$/%g/' > conftest.subs <<\\CEOF -$ac_vpsub -$extrasub -s%@sim_environment@%$sim_environment%g -s%@sim_alignment@%$sim_alignment%g -s%@sim_assert@%$sim_assert%g -s%@sim_bitsize@%$sim_bitsize%g -s%@sim_endian@%$sim_endian%g -s%@sim_hostendian@%$sim_hostendian%g -s%@sim_float@%$sim_float%g -s%@sim_scache@%$sim_scache%g -s%@sim_default_model@%$sim_default_model%g -s%@sim_hw_cflags@%$sim_hw_cflags%g -s%@sim_hw_objs@%$sim_hw_objs%g -s%@sim_hw@%$sim_hw%g -s%@sim_inline@%$sim_inline%g -s%@sim_packages@%$sim_packages%g -s%@sim_regparm@%$sim_regparm%g -s%@sim_reserved_bits@%$sim_reserved_bits%g -s%@sim_smp@%$sim_smp%g -s%@sim_stdcall@%$sim_stdcall%g -s%@sim_xor_endian@%$sim_xor_endian%g -s%@WARN_CFLAGS@%$WARN_CFLAGS%g -s%@WERROR_CFLAGS@%$WERROR_CFLAGS%g -s%@SHELL@%$SHELL%g -s%@CFLAGS@%$CFLAGS%g -s%@CPPFLAGS@%$CPPFLAGS%g -s%@CXXFLAGS@%$CXXFLAGS%g -s%@FFLAGS@%$FFLAGS%g -s%@DEFS@%$DEFS%g -s%@LDFLAGS@%$LDFLAGS%g -s%@LIBS@%$LIBS%g -s%@exec_prefix@%$exec_prefix%g -s%@prefix@%$prefix%g -s%@program_transform_name@%$program_transform_name%g -s%@bindir@%$bindir%g -s%@sbindir@%$sbindir%g -s%@libexecdir@%$libexecdir%g -s%@datadir@%$datadir%g -s%@sysconfdir@%$sysconfdir%g -s%@sharedstatedir@%$sharedstatedir%g -s%@localstatedir@%$localstatedir%g -s%@libdir@%$libdir%g -s%@includedir@%$includedir%g -s%@oldincludedir@%$oldincludedir%g -s%@infodir@%$infodir%g -s%@mandir@%$mandir%g -s%@host@%$host%g -s%@host_alias@%$host_alias%g -s%@host_cpu@%$host_cpu%g -s%@host_vendor@%$host_vendor%g -s%@host_os@%$host_os%g -s%@target@%$target%g -s%@target_alias@%$target_alias%g -s%@target_cpu@%$target_cpu%g -s%@target_vendor@%$target_vendor%g -s%@target_os@%$target_os%g -s%@build@%$build%g -s%@build_alias@%$build_alias%g -s%@build_cpu@%$build_cpu%g -s%@build_vendor@%$build_vendor%g -s%@build_os@%$build_os%g -s%@CC@%$CC%g -s%@INSTALL_PROGRAM@%$INSTALL_PROGRAM%g -s%@INSTALL_SCRIPT@%$INSTALL_SCRIPT%g -s%@INSTALL_DATA@%$INSTALL_DATA%g -s%@CC_FOR_BUILD@%$CC_FOR_BUILD%g -s%@HDEFINES@%$HDEFINES%g -s%@AR@%$AR%g -s%@RANLIB@%$RANLIB%g -s%@SET_MAKE@%$SET_MAKE%g -s%@CPP@%$CPP%g -s%@ALLOCA@%$ALLOCA%g -s%@USE_NLS@%$USE_NLS%g -s%@MSGFMT@%$MSGFMT%g -s%@GMSGFMT@%$GMSGFMT%g -s%@XGETTEXT@%$XGETTEXT%g -s%@USE_INCLUDED_LIBINTL@%$USE_INCLUDED_LIBINTL%g -s%@CATALOGS@%$CATALOGS%g -s%@CATOBJEXT@%$CATOBJEXT%g -s%@DATADIRNAME@%$DATADIRNAME%g -s%@GMOFILES@%$GMOFILES%g -s%@INSTOBJEXT@%$INSTOBJEXT%g -s%@INTLDEPS@%$INTLDEPS%g -s%@INTLLIBS@%$INTLLIBS%g -s%@INTLOBJS@%$INTLOBJS%g -s%@POFILES@%$POFILES%g -s%@POSUB@%$POSUB%g -s%@INCLUDE_LOCALE_H@%$INCLUDE_LOCALE_H%g -s%@GT_NO@%$GT_NO%g -s%@GT_YES@%$GT_YES%g -s%@MKINSTALLDIRS@%$MKINSTALLDIRS%g -s%@l@%$l%g -s%@MAINT@%$MAINT%g -s%@sim_bswap@%$sim_bswap%g -s%@sim_cflags@%$sim_cflags%g -s%@sim_debug@%$sim_debug%g -s%@sim_stdio@%$sim_stdio%g -s%@sim_trace@%$sim_trace%g -s%@sim_profile@%$sim_profile%g -s%@EXEEXT@%$EXEEXT%g -s%@CGEN_MAINT@%$CGEN_MAINT%g -s%@cgendir@%$cgendir%g -s%@cgen@%$cgen%g - -CEOF -EOF - -cat >> $CONFIG_STATUS <<\EOF - -# Split the substitutions into bite-sized pieces for seds with -# small command number limits, like on Digital OSF/1 and HP-UX. -ac_max_sed_cmds=90 # Maximum number of lines to put in a sed script. -ac_file=1 # Number of current file. -ac_beg=1 # First line for current file. -ac_end=$ac_max_sed_cmds # Line after last line for current file. -ac_more_lines=: -ac_sed_cmds="" -while $ac_more_lines; do - if test $ac_beg -gt 1; then - sed "1,${ac_beg}d; ${ac_end}q" conftest.subs > conftest.s$ac_file - else - sed "${ac_end}q" conftest.subs > conftest.s$ac_file - fi - if test ! -s conftest.s$ac_file; then - ac_more_lines=false - rm -f conftest.s$ac_file - else - if test -z "$ac_sed_cmds"; then - ac_sed_cmds="sed -f conftest.s$ac_file" - else - ac_sed_cmds="$ac_sed_cmds | sed -f conftest.s$ac_file" - fi - ac_file=`expr $ac_file + 1` - ac_beg=$ac_end - ac_end=`expr $ac_end + $ac_max_sed_cmds` - fi -done -if test -z "$ac_sed_cmds"; then - ac_sed_cmds=cat -fi -EOF - -cat >> $CONFIG_STATUS <<EOF - -CONFIG_FILES=\${CONFIG_FILES-"Makefile.sim:Makefile.in Make-common.sim:../common/Make-common.in .gdbinit:../common/gdbinit.in"} -EOF -cat >> $CONFIG_STATUS <<\EOF -for ac_file in .. $CONFIG_FILES; do if test "x$ac_file" != x..; then - # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in". - case "$ac_file" in - *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'` - ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;; - *) ac_file_in="${ac_file}.in" ;; - esac - - # Adjust a relative srcdir, top_srcdir, and INSTALL for subdirectories. - - # Remove last slash and all that follows it. Not all systems have dirname. - ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'` - if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then - # The file is in a subdirectory. - test ! -d "$ac_dir" && mkdir "$ac_dir" - ac_dir_suffix="/`echo $ac_dir|sed 's%^\./%%'`" - # A "../" for each directory in $ac_dir_suffix. - ac_dots=`echo $ac_dir_suffix|sed 's%/[^/]*%../%g'` - else - ac_dir_suffix= ac_dots= - fi - - case "$ac_given_srcdir" in - .) srcdir=. - if test -z "$ac_dots"; then top_srcdir=. - else top_srcdir=`echo $ac_dots|sed 's%/$%%'`; fi ;; - /*) srcdir="$ac_given_srcdir$ac_dir_suffix"; top_srcdir="$ac_given_srcdir" ;; - *) # Relative path. - srcdir="$ac_dots$ac_given_srcdir$ac_dir_suffix" - top_srcdir="$ac_dots$ac_given_srcdir" ;; - esac - - case "$ac_given_INSTALL" in - [/$]*) INSTALL="$ac_given_INSTALL" ;; - *) INSTALL="$ac_dots$ac_given_INSTALL" ;; - esac - - echo creating "$ac_file" - rm -f "$ac_file" - configure_input="Generated automatically from `echo $ac_file_in|sed 's%.*/%%'` by configure." - case "$ac_file" in - *Makefile*) ac_comsub="1i\\ -# $configure_input" ;; - *) ac_comsub= ;; - esac - - ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"` - sed -e "$ac_comsub -s%@configure_input@%$configure_input%g -s%@srcdir@%$srcdir%g -s%@top_srcdir@%$top_srcdir%g -s%@INSTALL@%$INSTALL%g -" $ac_file_inputs | (eval "$ac_sed_cmds") > $ac_file -fi; done -rm -f conftest.s* - -# These sed commands are passed to sed as "A NAME B NAME C VALUE D", where -# NAME is the cpp macro being defined and VALUE is the value it is being given. -# -# ac_d sets the value in "#define NAME VALUE" lines. -ac_dA='s%^\([ ]*\)#\([ ]*define[ ][ ]*\)' -ac_dB='\([ ][ ]*\)[^ ]*%\1#\2' -ac_dC='\3' -ac_dD='%g' -# ac_u turns "#undef NAME" with trailing blanks into "#define NAME VALUE". -ac_uA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)' -ac_uB='\([ ]\)%\1#\2define\3' -ac_uC=' ' -ac_uD='\4%g' -# ac_e turns "#undef NAME" without trailing blanks into "#define NAME VALUE". -ac_eA='s%^\([ ]*\)#\([ ]*\)undef\([ ][ ]*\)' -ac_eB='$%\1#\2define\3' -ac_eC=' ' -ac_eD='%g' - -if test "${CONFIG_HEADERS+set}" != set; then -EOF -cat >> $CONFIG_STATUS <<EOF - CONFIG_HEADERS="config.h:config.in" -EOF -cat >> $CONFIG_STATUS <<\EOF -fi -for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then - # Support "outfile[:infile[:infile...]]", defaulting infile="outfile.in". - case "$ac_file" in - *:*) ac_file_in=`echo "$ac_file"|sed 's%[^:]*:%%'` - ac_file=`echo "$ac_file"|sed 's%:.*%%'` ;; - *) ac_file_in="${ac_file}.in" ;; - esac - - echo creating $ac_file - - rm -f conftest.frag conftest.in conftest.out - ac_file_inputs=`echo $ac_file_in|sed -e "s%^%$ac_given_srcdir/%" -e "s%:% $ac_given_srcdir/%g"` - cat $ac_file_inputs > conftest.in - -EOF - -# Transform confdefs.h into a sed script conftest.vals that substitutes -# the proper values into config.h.in to produce config.h. And first: -# Protect against being on the right side of a sed subst in config.status. -# Protect against being in an unquoted here document in config.status. -rm -f conftest.vals -cat > conftest.hdr <<\EOF -s/[\\&%]/\\&/g -s%[\\$`]%\\&%g -s%#define \([A-Za-z_][A-Za-z0-9_]*\) *\(.*\)%${ac_dA}\1${ac_dB}\1${ac_dC}\2${ac_dD}%gp -s%ac_d%ac_u%gp -s%ac_u%ac_e%gp -EOF -sed -n -f conftest.hdr confdefs.h > conftest.vals -rm -f conftest.hdr - -# This sed command replaces #undef with comments. This is necessary, for -# example, in the case of _POSIX_SOURCE, which is predefined and required -# on some systems where configure will not decide to define it. -cat >> conftest.vals <<\EOF -s%^[ ]*#[ ]*undef[ ][ ]*[a-zA-Z_][a-zA-Z_0-9]*%/* & */% -EOF - -# Break up conftest.vals because some shells have a limit on -# the size of here documents, and old seds have small limits too. - -rm -f conftest.tail -while : -do - ac_lines=`grep -c . conftest.vals` - # grep -c gives empty output for an empty file on some AIX systems. - if test -z "$ac_lines" || test "$ac_lines" -eq 0; then break; fi - # Write a limited-size here document to conftest.frag. - echo ' cat > conftest.frag <<CEOF' >> $CONFIG_STATUS - sed ${ac_max_here_lines}q conftest.vals >> $CONFIG_STATUS - echo 'CEOF - sed -f conftest.frag conftest.in > conftest.out - rm -f conftest.in - mv conftest.out conftest.in -' >> $CONFIG_STATUS - sed 1,${ac_max_here_lines}d conftest.vals > conftest.tail - rm -f conftest.vals - mv conftest.tail conftest.vals -done -rm -f conftest.vals - -cat >> $CONFIG_STATUS <<\EOF - rm -f conftest.frag conftest.h - echo "/* $ac_file. Generated automatically by configure. */" > conftest.h - cat conftest.in >> conftest.h - rm -f conftest.in - if cmp -s $ac_file conftest.h 2>/dev/null; then - echo "$ac_file is unchanged" - rm -f conftest.h - else - # Remove last slash and all that follows it. Not all systems have dirname. - ac_dir=`echo $ac_file|sed 's%/[^/][^/]*$%%'` - if test "$ac_dir" != "$ac_file" && test "$ac_dir" != .; then - # The file is in a subdirectory. - test ! -d "$ac_dir" && mkdir "$ac_dir" - fi - rm -f $ac_file - mv conftest.h $ac_file - fi -fi; done - -EOF - -cat >> $CONFIG_STATUS <<EOF -ac_sources="$sim_link_files" -ac_dests="$sim_link_links" -EOF - -cat >> $CONFIG_STATUS <<\EOF -srcdir=$ac_given_srcdir -while test -n "$ac_sources"; do - set $ac_dests; ac_dest=$1; shift; ac_dests=$* - set $ac_sources; ac_source=$1; shift; ac_sources=$* - - echo "linking $srcdir/$ac_source to $ac_dest" - - if test ! -r $srcdir/$ac_source; then - { echo "configure: error: $srcdir/$ac_source: File not found" 1>&2; exit 1; } - fi - rm -f $ac_dest - - # Make relative symlinks. - # Remove last slash and all that follows it. Not all systems have dirname. - ac_dest_dir=`echo $ac_dest|sed 's%/[^/][^/]*$%%'` - if test "$ac_dest_dir" != "$ac_dest" && test "$ac_dest_dir" != .; then - # The dest file is in a subdirectory. - test ! -d "$ac_dest_dir" && mkdir "$ac_dest_dir" - ac_dest_dir_suffix="/`echo $ac_dest_dir|sed 's%^\./%%'`" - # A "../" for each directory in $ac_dest_dir_suffix. - ac_dots=`echo $ac_dest_dir_suffix|sed 's%/[^/]*%../%g'` - else - ac_dest_dir_suffix= ac_dots= - fi - - case "$srcdir" in - [/$]*) ac_rel_source="$srcdir/$ac_source" ;; - *) ac_rel_source="$ac_dots$srcdir/$ac_source" ;; - esac - - # Make a symlink if possible; otherwise try a hard link. - if ln -s $ac_rel_source $ac_dest 2>/dev/null || - ln $srcdir/$ac_source $ac_dest; then : - else - { echo "configure: error: can not link $ac_dest to $srcdir/$ac_source" 1>&2; exit 1; } - fi -done -EOF -cat >> $CONFIG_STATUS <<EOF - -EOF -cat >> $CONFIG_STATUS <<\EOF -case "x$CONFIG_FILES" in - xMakefile*) - echo "Merging Makefile.sim+Make-common.sim into Makefile ..." - rm -f Makesim1.tmp Makesim2.tmp Makefile - sed -n -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ p' <Make-common.sim >Makesim1.tmp - sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp - sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \ - -e '/^## COMMON_POST_/ r Makesim2.tmp' \ - <Makefile.sim >Makefile - rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp - ;; - esac - case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac - -exit 0 -EOF -chmod +x $CONFIG_STATUS -rm -fr confdefs* $ac_clean_files -test "$no_create" = yes || ${CONFIG_SHELL-/bin/sh} $CONFIG_STATUS || exit 1 - - diff --git a/sim/m32r/configure.in b/sim/m32r/configure.in deleted file mode 100644 index f598f29..0000000 --- a/sim/m32r/configure.in +++ /dev/null @@ -1,17 +0,0 @@ -dnl Process this file with autoconf to produce a configure script. -sinclude(../common/aclocal.m4) -AC_PREREQ(2.5)dnl -AC_INIT(Makefile.in) - -SIM_AC_COMMON - -SIM_AC_OPTION_ENDIAN(BIG_ENDIAN) -SIM_AC_OPTION_ALIGNMENT(STRICT_ALIGNMENT) -SIM_AC_OPTION_HOSTENDIAN -SIM_AC_OPTION_SCACHE(16384) -SIM_AC_OPTION_DEFAULT_MODEL(m32r/d) -SIM_AC_OPTION_ENVIRONMENT -SIM_AC_OPTION_INLINE() -SIM_AC_OPTION_CGEN_MAINT - -SIM_AC_OUTPUT diff --git a/sim/m32r/cpu.c b/sim/m32r/cpu.c deleted file mode 100644 index d93943d..0000000 --- a/sim/m32r/cpu.c +++ /dev/null @@ -1,181 +0,0 @@ -/* Misc. support for CPU family m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rbf -#define WANT_CPU_M32RBF - -#include "sim-main.h" -#include "cgen-ops.h" - -/* Get the value of h-pc. */ - -USI -m32rbf_h_pc_get (SIM_CPU *current_cpu) -{ - return CPU (h_pc); -} - -/* Set a value for h-pc. */ - -void -m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval) -{ - CPU (h_pc) = newval; -} - -/* Get the value of h-gr. */ - -SI -m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_gr[regno]); -} - -/* Set a value for h-gr. */ - -void -m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_gr[regno]) = newval; -} - -/* Get the value of h-cr. */ - -USI -m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_CR (regno); -} - -/* Set a value for h-cr. */ - -void -m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval) -{ - SET_H_CR (regno, newval); -} - -/* Get the value of h-accum. */ - -DI -m32rbf_h_accum_get (SIM_CPU *current_cpu) -{ - return GET_H_ACCUM (); -} - -/* Set a value for h-accum. */ - -void -m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval) -{ - SET_H_ACCUM (newval); -} - -/* Get the value of h-cond. */ - -BI -m32rbf_h_cond_get (SIM_CPU *current_cpu) -{ - return CPU (h_cond); -} - -/* Set a value for h-cond. */ - -void -m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_cond) = newval; -} - -/* Get the value of h-psw. */ - -UQI -m32rbf_h_psw_get (SIM_CPU *current_cpu) -{ - return GET_H_PSW (); -} - -/* Set a value for h-psw. */ - -void -m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_PSW (newval); -} - -/* Get the value of h-bpsw. */ - -UQI -m32rbf_h_bpsw_get (SIM_CPU *current_cpu) -{ - return CPU (h_bpsw); -} - -/* Set a value for h-bpsw. */ - -void -m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval) -{ - CPU (h_bpsw) = newval; -} - -/* Get the value of h-bbpsw. */ - -UQI -m32rbf_h_bbpsw_get (SIM_CPU *current_cpu) -{ - return CPU (h_bbpsw); -} - -/* Set a value for h-bbpsw. */ - -void -m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval) -{ - CPU (h_bbpsw) = newval; -} - -/* Get the value of h-lock. */ - -BI -m32rbf_h_lock_get (SIM_CPU *current_cpu) -{ - return CPU (h_lock); -} - -/* Set a value for h-lock. */ - -void -m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_lock) = newval; -} - -/* Record trace results for INSN. */ - -void -m32rbf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, - int *indices, TRACE_RECORD *tr) -{ -} diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h deleted file mode 100644 index 6f9a3ff..0000000 --- a/sim/m32r/cpu.h +++ /dev/null @@ -1,638 +0,0 @@ -/* CPU family header for m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CPU_M32RBF_H -#define CPU_M32RBF_H - -/* Maximum number of instructions that are fetched at a time. - This is for LIW type instructions sets (e.g. m32r). */ -#define MAX_LIW_INSNS 2 - -/* Maximum number of instructions that can be executed in parallel. */ -#define MAX_PARALLEL_INSNS 1 - -/* CPU state information. */ -typedef struct { - /* Hardware elements. */ - struct { - /* program counter */ - USI h_pc; -#define GET_H_PC() CPU (h_pc) -#define SET_H_PC(x) (CPU (h_pc) = (x)) - /* general registers */ - SI h_gr[16]; -#define GET_H_GR(a1) CPU (h_gr)[a1] -#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x)) - /* control registers */ - USI h_cr[16]; -#define GET_H_CR(index) m32rbf_h_cr_get_handler (current_cpu, index) -#define SET_H_CR(index, x) \ -do { \ -m32rbf_h_cr_set_handler (current_cpu, (index), (x));\ -;} while (0) - /* accumulator */ - DI h_accum; -#define GET_H_ACCUM() m32rbf_h_accum_get_handler (current_cpu) -#define SET_H_ACCUM(x) \ -do { \ -m32rbf_h_accum_set_handler (current_cpu, (x));\ -;} while (0) - /* condition bit */ - BI h_cond; -#define GET_H_COND() CPU (h_cond) -#define SET_H_COND(x) (CPU (h_cond) = (x)) - /* psw part of psw */ - UQI h_psw; -#define GET_H_PSW() m32rbf_h_psw_get_handler (current_cpu) -#define SET_H_PSW(x) \ -do { \ -m32rbf_h_psw_set_handler (current_cpu, (x));\ -;} while (0) - /* backup psw */ - UQI h_bpsw; -#define GET_H_BPSW() CPU (h_bpsw) -#define SET_H_BPSW(x) (CPU (h_bpsw) = (x)) - /* backup bpsw */ - UQI h_bbpsw; -#define GET_H_BBPSW() CPU (h_bbpsw) -#define SET_H_BBPSW(x) (CPU (h_bbpsw) = (x)) - /* lock */ - BI h_lock; -#define GET_H_LOCK() CPU (h_lock) -#define SET_H_LOCK(x) (CPU (h_lock) = (x)) - } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) -} M32RBF_CPU_DATA; - -/* Cover fns for register access. */ -USI m32rbf_h_pc_get (SIM_CPU *); -void m32rbf_h_pc_set (SIM_CPU *, USI); -SI m32rbf_h_gr_get (SIM_CPU *, UINT); -void m32rbf_h_gr_set (SIM_CPU *, UINT, SI); -USI m32rbf_h_cr_get (SIM_CPU *, UINT); -void m32rbf_h_cr_set (SIM_CPU *, UINT, USI); -DI m32rbf_h_accum_get (SIM_CPU *); -void m32rbf_h_accum_set (SIM_CPU *, DI); -BI m32rbf_h_cond_get (SIM_CPU *); -void m32rbf_h_cond_set (SIM_CPU *, BI); -UQI m32rbf_h_psw_get (SIM_CPU *); -void m32rbf_h_psw_set (SIM_CPU *, UQI); -UQI m32rbf_h_bpsw_get (SIM_CPU *); -void m32rbf_h_bpsw_set (SIM_CPU *, UQI); -UQI m32rbf_h_bbpsw_get (SIM_CPU *); -void m32rbf_h_bbpsw_set (SIM_CPU *, UQI); -BI m32rbf_h_lock_get (SIM_CPU *); -void m32rbf_h_lock_set (SIM_CPU *, BI); - -/* These must be hand-written. */ -extern CPUREG_FETCH_FN m32rbf_fetch_register; -extern CPUREG_STORE_FN m32rbf_store_register; - -typedef struct { - UINT h_gr; -} MODEL_M32R_D_DATA; - -typedef struct { - int empty; -} MODEL_TEST_DATA; - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - UINT f_uimm4; - } sfmt_trap; - struct { /* */ - IADDR i_disp24; - unsigned char out_h_gr_SI_14; - } sfmt_bl24; - struct { /* */ - IADDR i_disp8; - unsigned char out_h_gr_SI_14; - } sfmt_bl8; - struct { /* */ - SI* i_dr; - UINT f_hi16; - UINT f_r1; - unsigned char out_dr; - } sfmt_seth; - struct { /* */ - ADDR i_uimm24; - SI* i_dr; - UINT f_r1; - unsigned char out_dr; - } sfmt_ld24; - struct { /* */ - SI* i_sr; - UINT f_r2; - unsigned char in_sr; - unsigned char out_h_gr_SI_14; - } sfmt_jl; - struct { /* */ - SI* i_dr; - UINT f_r1; - UINT f_uimm5; - unsigned char in_dr; - unsigned char out_dr; - } sfmt_slli; - struct { /* */ - SI* i_dr; - INT f_simm8; - UINT f_r1; - unsigned char in_dr; - unsigned char out_dr; - } sfmt_addi; - struct { /* */ - SI* i_src1; - SI* i_src2; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_src2; - } sfmt_st_plus; - struct { /* */ - SI* i_src1; - SI* i_src2; - INT f_simm16; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - } sfmt_st_d; - struct { /* */ - SI* i_dr; - SI* i_sr; - UINT f_r1; - UINT f_r2; - unsigned char in_sr; - unsigned char out_dr; - unsigned char out_sr; - } sfmt_ld_plus; - struct { /* */ - IADDR i_disp16; - SI* i_src1; - SI* i_src2; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - } sfmt_beq; - struct { /* */ - SI* i_dr; - SI* i_sr; - UINT f_r1; - UINT f_r2; - UINT f_uimm16; - unsigned char in_sr; - unsigned char out_dr; - } sfmt_and3; - struct { /* */ - SI* i_dr; - SI* i_sr; - INT f_simm16; - UINT f_r1; - UINT f_r2; - unsigned char in_sr; - unsigned char out_dr; - } sfmt_add3; - struct { /* */ - SI* i_dr; - SI* i_sr; - UINT f_r1; - UINT f_r2; - unsigned char in_dr; - unsigned char in_sr; - unsigned char out_dr; - } sfmt_add; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_ADD_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_ADD_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_ADD3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_ADD3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_AND3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_uimm16; \ - unsigned int length; -#define EXTRACT_IFMT_AND3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_OR3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_uimm16; \ - unsigned int length; -#define EXTRACT_IFMT_OR3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_ADDI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - INT f_simm8; \ - unsigned int length; -#define EXTRACT_IFMT_ADDI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_ADDV3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_ADDV3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_BC8_VARS \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp8; \ - unsigned int length; -#define EXTRACT_IFMT_BC8_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ - -#define EXTRACT_IFMT_BC24_VARS \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp24; \ - unsigned int length; -#define EXTRACT_IFMT_BC24_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ - -#define EXTRACT_IFMT_BEQ_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - SI f_disp16; \ - unsigned int length; -#define EXTRACT_IFMT_BEQ_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ - -#define EXTRACT_IFMT_BEQZ_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - SI f_disp16; \ - unsigned int length; -#define EXTRACT_IFMT_BEQZ_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ - -#define EXTRACT_IFMT_CMP_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_CMP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_CMPI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_CMPI_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_DIV_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_DIV_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_JL_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_JL_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LD24_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_uimm24; \ - unsigned int length; -#define EXTRACT_IFMT_LD24_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \ - -#define EXTRACT_IFMT_LDI16_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_LDI16_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_MVFACHI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MVFACHI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MVFC_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MVFC_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MVTACHI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MVTACHI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MVTC_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MVTC_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_NOP_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_NOP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_SETH_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_hi16; \ - unsigned int length; -#define EXTRACT_IFMT_SETH_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_SLLI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_shift_op2; \ - UINT f_uimm5; \ - unsigned int length; -#define EXTRACT_IFMT_SLLI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \ - f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \ - -#define EXTRACT_IFMT_ST_D_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_ST_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_TRAP_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_uimm4; \ - unsigned int length; -#define EXTRACT_IFMT_TRAP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -/* Collection of various things for the trace handler to use. */ - -typedef struct trace_record { - IADDR pc; - /* FIXME:wip */ -} TRACE_RECORD; - -#endif /* CPU_M32RBF_H */ diff --git a/sim/m32r/cpuall.h b/sim/m32r/cpuall.h deleted file mode 100644 index 0c16b21..0000000 --- a/sim/m32r/cpuall.h +++ /dev/null @@ -1,74 +0,0 @@ -/* Simulator CPU header for m32r. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef M32R_CPUALL_H -#define M32R_CPUALL_H - -/* Include files for each cpu family. */ - -#ifdef WANT_CPU_M32RBF -#include "eng.h" -#include "cgen-engine.h" -#include "cpu.h" -#include "decode.h" -#endif - -#ifdef WANT_CPU_M32RXF -#include "engx.h" -#include "cgen-engine.h" -#include "cpux.h" -#include "decodex.h" -#endif - -extern const MACH m32r_mach; -extern const MACH m32rx_mach; - -#ifndef WANT_CPU -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ -}; -#endif - -#ifndef WANT_CPU -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; -#endif - -#endif /* M32R_CPUALL_H */ diff --git a/sim/m32r/cpux.c b/sim/m32r/cpux.c deleted file mode 100644 index 054828b..0000000 --- a/sim/m32r/cpux.c +++ /dev/null @@ -1,197 +0,0 @@ -/* Misc. support for CPU family m32rxf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rxf -#define WANT_CPU_M32RXF - -#include "sim-main.h" -#include "cgen-ops.h" - -/* Get the value of h-pc. */ - -USI -m32rxf_h_pc_get (SIM_CPU *current_cpu) -{ - return CPU (h_pc); -} - -/* Set a value for h-pc. */ - -void -m32rxf_h_pc_set (SIM_CPU *current_cpu, USI newval) -{ - CPU (h_pc) = newval; -} - -/* Get the value of h-gr. */ - -SI -m32rxf_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - return CPU (h_gr[regno]); -} - -/* Set a value for h-gr. */ - -void -m32rxf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - CPU (h_gr[regno]) = newval; -} - -/* Get the value of h-cr. */ - -USI -m32rxf_h_cr_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_CR (regno); -} - -/* Set a value for h-cr. */ - -void -m32rxf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval) -{ - SET_H_CR (regno, newval); -} - -/* Get the value of h-accum. */ - -DI -m32rxf_h_accum_get (SIM_CPU *current_cpu) -{ - return GET_H_ACCUM (); -} - -/* Set a value for h-accum. */ - -void -m32rxf_h_accum_set (SIM_CPU *current_cpu, DI newval) -{ - SET_H_ACCUM (newval); -} - -/* Get the value of h-accums. */ - -DI -m32rxf_h_accums_get (SIM_CPU *current_cpu, UINT regno) -{ - return GET_H_ACCUMS (regno); -} - -/* Set a value for h-accums. */ - -void -m32rxf_h_accums_set (SIM_CPU *current_cpu, UINT regno, DI newval) -{ - SET_H_ACCUMS (regno, newval); -} - -/* Get the value of h-cond. */ - -BI -m32rxf_h_cond_get (SIM_CPU *current_cpu) -{ - return CPU (h_cond); -} - -/* Set a value for h-cond. */ - -void -m32rxf_h_cond_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_cond) = newval; -} - -/* Get the value of h-psw. */ - -UQI -m32rxf_h_psw_get (SIM_CPU *current_cpu) -{ - return GET_H_PSW (); -} - -/* Set a value for h-psw. */ - -void -m32rxf_h_psw_set (SIM_CPU *current_cpu, UQI newval) -{ - SET_H_PSW (newval); -} - -/* Get the value of h-bpsw. */ - -UQI -m32rxf_h_bpsw_get (SIM_CPU *current_cpu) -{ - return CPU (h_bpsw); -} - -/* Set a value for h-bpsw. */ - -void -m32rxf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval) -{ - CPU (h_bpsw) = newval; -} - -/* Get the value of h-bbpsw. */ - -UQI -m32rxf_h_bbpsw_get (SIM_CPU *current_cpu) -{ - return CPU (h_bbpsw); -} - -/* Set a value for h-bbpsw. */ - -void -m32rxf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval) -{ - CPU (h_bbpsw) = newval; -} - -/* Get the value of h-lock. */ - -BI -m32rxf_h_lock_get (SIM_CPU *current_cpu) -{ - return CPU (h_lock); -} - -/* Set a value for h-lock. */ - -void -m32rxf_h_lock_set (SIM_CPU *current_cpu, BI newval) -{ - CPU (h_lock) = newval; -} - -/* Record trace results for INSN. */ - -void -m32rxf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, - int *indices, TRACE_RECORD *tr) -{ -} diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h deleted file mode 100644 index 2d5cab4..0000000 --- a/sim/m32r/cpux.h +++ /dev/null @@ -1,970 +0,0 @@ -/* CPU family header for m32rxf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CPU_M32RXF_H -#define CPU_M32RXF_H - -/* Maximum number of instructions that are fetched at a time. - This is for LIW type instructions sets (e.g. m32r). */ -#define MAX_LIW_INSNS 2 - -/* Maximum number of instructions that can be executed in parallel. */ -#define MAX_PARALLEL_INSNS 2 - -/* CPU state information. */ -typedef struct { - /* Hardware elements. */ - struct { - /* program counter */ - USI h_pc; -#define GET_H_PC() CPU (h_pc) -#define SET_H_PC(x) (CPU (h_pc) = (x)) - /* general registers */ - SI h_gr[16]; -#define GET_H_GR(a1) CPU (h_gr)[a1] -#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x)) - /* control registers */ - USI h_cr[16]; -#define GET_H_CR(index) m32rxf_h_cr_get_handler (current_cpu, index) -#define SET_H_CR(index, x) \ -do { \ -m32rxf_h_cr_set_handler (current_cpu, (index), (x));\ -;} while (0) - /* accumulator */ - DI h_accum; -#define GET_H_ACCUM() m32rxf_h_accum_get_handler (current_cpu) -#define SET_H_ACCUM(x) \ -do { \ -m32rxf_h_accum_set_handler (current_cpu, (x));\ -;} while (0) - /* accumulators */ - DI h_accums[2]; -#define GET_H_ACCUMS(index) m32rxf_h_accums_get_handler (current_cpu, index) -#define SET_H_ACCUMS(index, x) \ -do { \ -m32rxf_h_accums_set_handler (current_cpu, (index), (x));\ -;} while (0) - /* condition bit */ - BI h_cond; -#define GET_H_COND() CPU (h_cond) -#define SET_H_COND(x) (CPU (h_cond) = (x)) - /* psw part of psw */ - UQI h_psw; -#define GET_H_PSW() m32rxf_h_psw_get_handler (current_cpu) -#define SET_H_PSW(x) \ -do { \ -m32rxf_h_psw_set_handler (current_cpu, (x));\ -;} while (0) - /* backup psw */ - UQI h_bpsw; -#define GET_H_BPSW() CPU (h_bpsw) -#define SET_H_BPSW(x) (CPU (h_bpsw) = (x)) - /* backup bpsw */ - UQI h_bbpsw; -#define GET_H_BBPSW() CPU (h_bbpsw) -#define SET_H_BBPSW(x) (CPU (h_bbpsw) = (x)) - /* lock */ - BI h_lock; -#define GET_H_LOCK() CPU (h_lock) -#define SET_H_LOCK(x) (CPU (h_lock) = (x)) - } hardware; -#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware) -} M32RXF_CPU_DATA; - -/* Cover fns for register access. */ -USI m32rxf_h_pc_get (SIM_CPU *); -void m32rxf_h_pc_set (SIM_CPU *, USI); -SI m32rxf_h_gr_get (SIM_CPU *, UINT); -void m32rxf_h_gr_set (SIM_CPU *, UINT, SI); -USI m32rxf_h_cr_get (SIM_CPU *, UINT); -void m32rxf_h_cr_set (SIM_CPU *, UINT, USI); -DI m32rxf_h_accum_get (SIM_CPU *); -void m32rxf_h_accum_set (SIM_CPU *, DI); -DI m32rxf_h_accums_get (SIM_CPU *, UINT); -void m32rxf_h_accums_set (SIM_CPU *, UINT, DI); -BI m32rxf_h_cond_get (SIM_CPU *); -void m32rxf_h_cond_set (SIM_CPU *, BI); -UQI m32rxf_h_psw_get (SIM_CPU *); -void m32rxf_h_psw_set (SIM_CPU *, UQI); -UQI m32rxf_h_bpsw_get (SIM_CPU *); -void m32rxf_h_bpsw_set (SIM_CPU *, UQI); -UQI m32rxf_h_bbpsw_get (SIM_CPU *); -void m32rxf_h_bbpsw_set (SIM_CPU *, UQI); -BI m32rxf_h_lock_get (SIM_CPU *); -void m32rxf_h_lock_set (SIM_CPU *, BI); - -/* These must be hand-written. */ -extern CPUREG_FETCH_FN m32rxf_fetch_register; -extern CPUREG_STORE_FN m32rxf_store_register; - -typedef struct { - int empty; -} MODEL_M32RX_DATA; - -/* Instruction argument buffer. */ - -union sem_fields { - struct { /* no operands */ - int empty; - } fmt_empty; - struct { /* */ - UINT f_uimm4; - } sfmt_trap; - struct { /* */ - IADDR i_disp24; - unsigned char out_h_gr_SI_14; - } sfmt_bl24; - struct { /* */ - IADDR i_disp8; - unsigned char out_h_gr_SI_14; - } sfmt_bl8; - struct { /* */ - SI f_imm1; - UINT f_accd; - UINT f_accs; - } sfmt_rac_dsi; - struct { /* */ - SI* i_dr; - UINT f_hi16; - UINT f_r1; - unsigned char out_dr; - } sfmt_seth; - struct { /* */ - SI* i_src1; - UINT f_accs; - UINT f_r1; - unsigned char in_src1; - } sfmt_mvtachi_a; - struct { /* */ - SI* i_dr; - UINT f_accs; - UINT f_r1; - unsigned char out_dr; - } sfmt_mvfachi_a; - struct { /* */ - ADDR i_uimm24; - SI* i_dr; - UINT f_r1; - unsigned char out_dr; - } sfmt_ld24; - struct { /* */ - SI* i_sr; - UINT f_r2; - unsigned char in_sr; - unsigned char out_h_gr_SI_14; - } sfmt_jl; - struct { /* */ - SI* i_dr; - UINT f_r1; - UINT f_uimm5; - unsigned char in_dr; - unsigned char out_dr; - } sfmt_slli; - struct { /* */ - SI* i_dr; - INT f_simm8; - UINT f_r1; - unsigned char in_dr; - unsigned char out_dr; - } sfmt_addi; - struct { /* */ - SI* i_src1; - SI* i_src2; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - unsigned char out_src2; - } sfmt_st_plus; - struct { /* */ - SI* i_src1; - SI* i_src2; - INT f_simm16; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - } sfmt_st_d; - struct { /* */ - SI* i_src1; - SI* i_src2; - UINT f_acc; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - } sfmt_machi_a; - struct { /* */ - SI* i_dr; - SI* i_sr; - UINT f_r1; - UINT f_r2; - unsigned char in_sr; - unsigned char out_dr; - unsigned char out_sr; - } sfmt_ld_plus; - struct { /* */ - IADDR i_disp16; - SI* i_src1; - SI* i_src2; - UINT f_r1; - UINT f_r2; - unsigned char in_src1; - unsigned char in_src2; - } sfmt_beq; - struct { /* */ - SI* i_dr; - SI* i_sr; - UINT f_r1; - UINT f_r2; - UINT f_uimm16; - unsigned char in_sr; - unsigned char out_dr; - } sfmt_and3; - struct { /* */ - SI* i_dr; - SI* i_sr; - INT f_simm16; - UINT f_r1; - UINT f_r2; - unsigned char in_sr; - unsigned char out_dr; - } sfmt_add3; - struct { /* */ - SI* i_dr; - SI* i_sr; - UINT f_r1; - UINT f_r2; - unsigned char in_dr; - unsigned char in_sr; - unsigned char out_dr; - } sfmt_add; -#if WITH_SCACHE_PBB - /* Writeback handler. */ - struct { - /* Pointer to argbuf entry for insn whose results need writing back. */ - const struct argbuf *abuf; - } write; - /* x-before handler */ - struct { - /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/ - int first_p; - } before; - /* x-after handler */ - struct { - int empty; - } after; - /* This entry is used to terminate each pbb. */ - struct { - /* Number of insns in pbb. */ - int insn_count; - /* Next pbb to execute. */ - SCACHE *next; - SCACHE *branch_target; - } chain; -#endif -}; - -/* The ARGBUF struct. */ -struct argbuf { - /* These are the baseclass definitions. */ - IADDR addr; - const IDESC *idesc; - char trace_p; - char profile_p; - /* ??? Temporary hack for skip insns. */ - char skip_count; - char unused; - /* cpu specific data follows */ - union sem semantic; - int written; - union sem_fields fields; -}; - -/* A cached insn. - - ??? SCACHE used to contain more than just argbuf. We could delete the - type entirely and always just use ARGBUF, but for future concerns and as - a level of abstraction it is left in. */ - -struct scache { - struct argbuf argbuf; -}; - -/* Macros to simplify extraction, reading and semantic code. - These define and assign the local vars that contain the insn's fields. */ - -#define EXTRACT_IFMT_EMPTY_VARS \ - unsigned int length; -#define EXTRACT_IFMT_EMPTY_CODE \ - length = 0; \ - -#define EXTRACT_IFMT_ADD_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_ADD_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_ADD3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_ADD3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_AND3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_uimm16; \ - unsigned int length; -#define EXTRACT_IFMT_AND3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_OR3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_uimm16; \ - unsigned int length; -#define EXTRACT_IFMT_OR3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_ADDI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - INT f_simm8; \ - unsigned int length; -#define EXTRACT_IFMT_ADDI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \ - -#define EXTRACT_IFMT_ADDV3_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_ADDV3_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_BC8_VARS \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp8; \ - unsigned int length; -#define EXTRACT_IFMT_BC8_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \ - -#define EXTRACT_IFMT_BC24_VARS \ - UINT f_op1; \ - UINT f_r1; \ - SI f_disp24; \ - unsigned int length; -#define EXTRACT_IFMT_BC24_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \ - -#define EXTRACT_IFMT_BEQ_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - SI f_disp16; \ - unsigned int length; -#define EXTRACT_IFMT_BEQ_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ - -#define EXTRACT_IFMT_BEQZ_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - SI f_disp16; \ - unsigned int length; -#define EXTRACT_IFMT_BEQZ_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \ - -#define EXTRACT_IFMT_CMP_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_CMP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_CMPI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_CMPI_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_CMPZ_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_CMPZ_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_DIV_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_DIV_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_JC_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_JC_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_LD24_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_uimm24; \ - unsigned int length; -#define EXTRACT_IFMT_LD24_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \ - -#define EXTRACT_IFMT_LDI16_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_LDI16_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_MACHI_A_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_acc; \ - UINT f_op23; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MACHI_A_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1); \ - f_op23 = EXTRACT_MSB0_UINT (insn, 16, 9, 3); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MVFACHI_A_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_accs; \ - UINT f_op3; \ - unsigned int length; -#define EXTRACT_IFMT_MVFACHI_A_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 14, 2); \ - -#define EXTRACT_IFMT_MVFC_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MVFC_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_MVTACHI_A_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_accs; \ - UINT f_op3; \ - unsigned int length; -#define EXTRACT_IFMT_MVTACHI_A_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \ - f_op3 = EXTRACT_MSB0_UINT (insn, 16, 14, 2); \ - -#define EXTRACT_IFMT_MVTC_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_MVTC_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_NOP_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - unsigned int length; -#define EXTRACT_IFMT_NOP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_RAC_DSI_VARS \ - UINT f_op1; \ - UINT f_accd; \ - UINT f_bits67; \ - UINT f_op2; \ - UINT f_accs; \ - UINT f_bit14; \ - SI f_imm1; \ - unsigned int length; -#define EXTRACT_IFMT_RAC_DSI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_accd = EXTRACT_MSB0_UINT (insn, 16, 4, 2); \ - f_bits67 = EXTRACT_MSB0_UINT (insn, 16, 6, 2); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \ - f_bit14 = EXTRACT_MSB0_UINT (insn, 16, 14, 1); \ - f_imm1 = ((EXTRACT_MSB0_UINT (insn, 16, 15, 1)) + (1)); \ - -#define EXTRACT_IFMT_SETH_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_hi16; \ - unsigned int length; -#define EXTRACT_IFMT_SETH_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_SLLI_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_shift_op2; \ - UINT f_uimm5; \ - unsigned int length; -#define EXTRACT_IFMT_SLLI_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \ - f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \ - -#define EXTRACT_IFMT_ST_D_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - INT f_simm16; \ - unsigned int length; -#define EXTRACT_IFMT_ST_D_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \ - -#define EXTRACT_IFMT_TRAP_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_uimm4; \ - unsigned int length; -#define EXTRACT_IFMT_TRAP_CODE \ - length = 2; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \ - f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \ - -#define EXTRACT_IFMT_SATB_VARS \ - UINT f_op1; \ - UINT f_r1; \ - UINT f_op2; \ - UINT f_r2; \ - UINT f_uimm16; \ - unsigned int length; -#define EXTRACT_IFMT_SATB_CODE \ - length = 4; \ - f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \ - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \ - f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \ - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \ - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \ - -/* Queued output values of an instruction. */ - -struct parexec { - union { - struct { /* empty sformat for unspecified field list */ - int empty; - } sfmt_empty; - struct { /* e.g. add $dr,$sr */ - SI dr; - } sfmt_add; - struct { /* e.g. add3 $dr,$sr,$hash$slo16 */ - SI dr; - } sfmt_add3; - struct { /* e.g. and3 $dr,$sr,$uimm16 */ - SI dr; - } sfmt_and3; - struct { /* e.g. or3 $dr,$sr,$hash$ulo16 */ - SI dr; - } sfmt_or3; - struct { /* e.g. addi $dr,$simm8 */ - SI dr; - } sfmt_addi; - struct { /* e.g. addv $dr,$sr */ - BI condbit; - SI dr; - } sfmt_addv; - struct { /* e.g. addv3 $dr,$sr,$simm16 */ - BI condbit; - SI dr; - } sfmt_addv3; - struct { /* e.g. addx $dr,$sr */ - BI condbit; - SI dr; - } sfmt_addx; - struct { /* e.g. bc.s $disp8 */ - USI pc; - } sfmt_bc8; - struct { /* e.g. bc.l $disp24 */ - USI pc; - } sfmt_bc24; - struct { /* e.g. beq $src1,$src2,$disp16 */ - USI pc; - } sfmt_beq; - struct { /* e.g. beqz $src2,$disp16 */ - USI pc; - } sfmt_beqz; - struct { /* e.g. bl.s $disp8 */ - SI h_gr_SI_14; - USI pc; - } sfmt_bl8; - struct { /* e.g. bl.l $disp24 */ - SI h_gr_SI_14; - USI pc; - } sfmt_bl24; - struct { /* e.g. bcl.s $disp8 */ - SI h_gr_SI_14; - USI pc; - } sfmt_bcl8; - struct { /* e.g. bcl.l $disp24 */ - SI h_gr_SI_14; - USI pc; - } sfmt_bcl24; - struct { /* e.g. bra.s $disp8 */ - USI pc; - } sfmt_bra8; - struct { /* e.g. bra.l $disp24 */ - USI pc; - } sfmt_bra24; - struct { /* e.g. cmp $src1,$src2 */ - BI condbit; - } sfmt_cmp; - struct { /* e.g. cmpi $src2,$simm16 */ - BI condbit; - } sfmt_cmpi; - struct { /* e.g. cmpz $src2 */ - BI condbit; - } sfmt_cmpz; - struct { /* e.g. div $dr,$sr */ - SI dr; - } sfmt_div; - struct { /* e.g. jc $sr */ - USI pc; - } sfmt_jc; - struct { /* e.g. jl $sr */ - SI h_gr_SI_14; - USI pc; - } sfmt_jl; - struct { /* e.g. jmp $sr */ - USI pc; - } sfmt_jmp; - struct { /* e.g. ld $dr,@$sr */ - SI dr; - } sfmt_ld; - struct { /* e.g. ld $dr,@($slo16,$sr) */ - SI dr; - } sfmt_ld_d; - struct { /* e.g. ldb $dr,@$sr */ - SI dr; - } sfmt_ldb; - struct { /* e.g. ldb $dr,@($slo16,$sr) */ - SI dr; - } sfmt_ldb_d; - struct { /* e.g. ldh $dr,@$sr */ - SI dr; - } sfmt_ldh; - struct { /* e.g. ldh $dr,@($slo16,$sr) */ - SI dr; - } sfmt_ldh_d; - struct { /* e.g. ld $dr,@$sr+ */ - SI dr; - SI sr; - } sfmt_ld_plus; - struct { /* e.g. ld24 $dr,$uimm24 */ - SI dr; - } sfmt_ld24; - struct { /* e.g. ldi8 $dr,$simm8 */ - SI dr; - } sfmt_ldi8; - struct { /* e.g. ldi16 $dr,$hash$slo16 */ - SI dr; - } sfmt_ldi16; - struct { /* e.g. lock $dr,@$sr */ - SI dr; - BI h_lock_BI; - } sfmt_lock; - struct { /* e.g. machi $src1,$src2,$acc */ - DI acc; - } sfmt_machi_a; - struct { /* e.g. mulhi $src1,$src2,$acc */ - DI acc; - } sfmt_mulhi_a; - struct { /* e.g. mv $dr,$sr */ - SI dr; - } sfmt_mv; - struct { /* e.g. mvfachi $dr,$accs */ - SI dr; - } sfmt_mvfachi_a; - struct { /* e.g. mvfc $dr,$scr */ - SI dr; - } sfmt_mvfc; - struct { /* e.g. mvtachi $src1,$accs */ - DI accs; - } sfmt_mvtachi_a; - struct { /* e.g. mvtc $sr,$dcr */ - USI dcr; - } sfmt_mvtc; - struct { /* e.g. nop */ - int empty; - } sfmt_nop; - struct { /* e.g. rac $accd,$accs,$imm1 */ - DI accd; - } sfmt_rac_dsi; - struct { /* e.g. rte */ - UQI h_bpsw_UQI; - USI h_cr_USI_6; - UQI h_psw_UQI; - USI pc; - } sfmt_rte; - struct { /* e.g. seth $dr,$hash$hi16 */ - SI dr; - } sfmt_seth; - struct { /* e.g. sll3 $dr,$sr,$simm16 */ - SI dr; - } sfmt_sll3; - struct { /* e.g. slli $dr,$uimm5 */ - SI dr; - } sfmt_slli; - struct { /* e.g. st $src1,@$src2 */ - SI h_memory_SI_src2; - USI h_memory_SI_src2_idx; - } sfmt_st; - struct { /* e.g. st $src1,@($slo16,$src2) */ - SI h_memory_SI_add__DFLT_src2_slo16; - USI h_memory_SI_add__DFLT_src2_slo16_idx; - } sfmt_st_d; - struct { /* e.g. stb $src1,@$src2 */ - QI h_memory_QI_src2; - USI h_memory_QI_src2_idx; - } sfmt_stb; - struct { /* e.g. stb $src1,@($slo16,$src2) */ - QI h_memory_QI_add__DFLT_src2_slo16; - USI h_memory_QI_add__DFLT_src2_slo16_idx; - } sfmt_stb_d; - struct { /* e.g. sth $src1,@$src2 */ - HI h_memory_HI_src2; - USI h_memory_HI_src2_idx; - } sfmt_sth; - struct { /* e.g. sth $src1,@($slo16,$src2) */ - HI h_memory_HI_add__DFLT_src2_slo16; - USI h_memory_HI_add__DFLT_src2_slo16_idx; - } sfmt_sth_d; - struct { /* e.g. st $src1,@+$src2 */ - SI h_memory_SI_new_src2; - USI h_memory_SI_new_src2_idx; - SI src2; - } sfmt_st_plus; - struct { /* e.g. trap $uimm4 */ - UQI h_bbpsw_UQI; - UQI h_bpsw_UQI; - USI h_cr_USI_14; - USI h_cr_USI_6; - UQI h_psw_UQI; - SI pc; - } sfmt_trap; - struct { /* e.g. unlock $src1,@$src2 */ - BI h_lock_BI; - SI h_memory_SI_src2; - USI h_memory_SI_src2_idx; - } sfmt_unlock; - struct { /* e.g. satb $dr,$sr */ - SI dr; - } sfmt_satb; - struct { /* e.g. sat $dr,$sr */ - SI dr; - } sfmt_sat; - struct { /* e.g. sadd */ - DI h_accums_DI_0; - } sfmt_sadd; - struct { /* e.g. macwu1 $src1,$src2 */ - DI h_accums_DI_1; - } sfmt_macwu1; - struct { /* e.g. msblo $src1,$src2 */ - DI accum; - } sfmt_msblo; - struct { /* e.g. mulwu1 $src1,$src2 */ - DI h_accums_DI_1; - } sfmt_mulwu1; - struct { /* e.g. sc */ - int empty; - } sfmt_sc; - } operands; - /* For conditionally written operands, bitmask of which ones were. */ - int written; -}; - -/* Collection of various things for the trace handler to use. */ - -typedef struct trace_record { - IADDR pc; - /* FIXME:wip */ -} TRACE_RECORD; - -#endif /* CPU_M32RXF_H */ diff --git a/sim/m32r/decode.c b/sim/m32r/decode.c deleted file mode 100644 index 83c3a38..0000000 --- a/sim/m32r/decode.c +++ /dev/null @@ -1,2008 +0,0 @@ -/* Simulator instruction decoder for m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rbf -#define WANT_CPU_M32RBF - -#include "sim-main.h" -#include "sim-assert.h" - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC m32rbf_insn_data[M32RBF_INSN_UNLOCK + 1]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem m32rbf_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, - { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, - { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, - { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, - { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, - { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, - { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, - { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, - { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, - { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, - { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, - { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, - { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, - { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, - { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, - { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, - { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, - { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, - { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, - { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, - { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, - { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, - { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, - { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, - { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, - { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, - { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, - { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, - { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, - { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, - { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, - { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, - { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, - { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, - { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, - { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, - { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, - { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, - { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, - { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, - { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, - { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, - { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LDB }, - { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LDB_D }, - { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LDH }, - { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LDH_D }, - { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LDB }, - { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LDB_D }, - { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LDH }, - { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LDH_D }, - { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, - { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, - { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, - { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, - { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, - { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, - { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, - { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, - { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, - { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, - { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, - { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, - { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, - { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, - { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, - { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, - { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, - { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, - { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, - { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, - { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, - { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, - { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, - { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, - { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, - { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, - { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, - { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, - { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, - { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, - { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, - { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, - { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, - { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, - { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, - { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, - { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, - { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, - { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, - { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, - { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, - { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, - { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, - { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, - { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, - { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, - { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, - { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, - { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, - { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, - { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, -}; - -static const struct insn_sem m32rbf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -m32rbf_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = sizeof (m32rbf_insn_data) / sizeof (IDESC); - IDESC *table = m32rbf_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & m32rbf_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - M32RBF_INSN_TYPE itype; - - { - CGEN_INSN_INT insn = base_insn; - - { - unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_SUBV;goto extract_sfmt_addv; - case 1 : itype = M32RBF_INSN_SUBX;goto extract_sfmt_addx; - case 2 : itype = M32RBF_INSN_SUB;goto extract_sfmt_add; - case 3 : itype = M32RBF_INSN_NEG;goto extract_sfmt_mv; - case 4 : itype = M32RBF_INSN_CMP;goto extract_sfmt_cmp; - case 5 : itype = M32RBF_INSN_CMPU;goto extract_sfmt_cmp; - case 8 : itype = M32RBF_INSN_ADDV;goto extract_sfmt_addv; - case 9 : itype = M32RBF_INSN_ADDX;goto extract_sfmt_addx; - case 10 : itype = M32RBF_INSN_ADD;goto extract_sfmt_add; - case 11 : itype = M32RBF_INSN_NOT;goto extract_sfmt_mv; - case 12 : itype = M32RBF_INSN_AND;goto extract_sfmt_add; - case 13 : itype = M32RBF_INSN_XOR;goto extract_sfmt_add; - case 14 : itype = M32RBF_INSN_OR;goto extract_sfmt_add; - case 16 : itype = M32RBF_INSN_SRL;goto extract_sfmt_add; - case 18 : itype = M32RBF_INSN_SRA;goto extract_sfmt_add; - case 20 : itype = M32RBF_INSN_SLL;goto extract_sfmt_add; - case 22 : itype = M32RBF_INSN_MUL;goto extract_sfmt_add; - case 24 : itype = M32RBF_INSN_MV;goto extract_sfmt_mv; - case 25 : itype = M32RBF_INSN_MVFC;goto extract_sfmt_mvfc; - case 26 : itype = M32RBF_INSN_MVTC;goto extract_sfmt_mvtc; - case 28 : - { - unsigned int val = (((insn >> 8) & (1 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_JL;goto extract_sfmt_jl; - case 1 : itype = M32RBF_INSN_JMP;goto extract_sfmt_jmp; - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 29 : itype = M32RBF_INSN_RTE;goto extract_sfmt_rte; - case 31 : itype = M32RBF_INSN_TRAP;goto extract_sfmt_trap; - case 32 : itype = M32RBF_INSN_STB;goto extract_sfmt_stb; - case 34 : itype = M32RBF_INSN_STH;goto extract_sfmt_sth; - case 36 : itype = M32RBF_INSN_ST;goto extract_sfmt_st; - case 37 : itype = M32RBF_INSN_UNLOCK;goto extract_sfmt_unlock; - case 38 : itype = M32RBF_INSN_ST_PLUS;goto extract_sfmt_st_plus; - case 39 : itype = M32RBF_INSN_ST_MINUS;goto extract_sfmt_st_plus; - case 40 : itype = M32RBF_INSN_LDB;goto extract_sfmt_ldb; - case 41 : itype = M32RBF_INSN_LDUB;goto extract_sfmt_ldb; - case 42 : itype = M32RBF_INSN_LDH;goto extract_sfmt_ldh; - case 43 : itype = M32RBF_INSN_LDUH;goto extract_sfmt_ldh; - case 44 : itype = M32RBF_INSN_LD;goto extract_sfmt_ld; - case 45 : itype = M32RBF_INSN_LOCK;goto extract_sfmt_lock; - case 46 : itype = M32RBF_INSN_LD_PLUS;goto extract_sfmt_ld_plus; - case 48 : itype = M32RBF_INSN_MULHI;goto extract_sfmt_mulhi; - case 49 : itype = M32RBF_INSN_MULLO;goto extract_sfmt_mulhi; - case 50 : itype = M32RBF_INSN_MULWHI;goto extract_sfmt_mulhi; - case 51 : itype = M32RBF_INSN_MULWLO;goto extract_sfmt_mulhi; - case 52 : itype = M32RBF_INSN_MACHI;goto extract_sfmt_machi; - case 53 : itype = M32RBF_INSN_MACLO;goto extract_sfmt_machi; - case 54 : itype = M32RBF_INSN_MACWHI;goto extract_sfmt_machi; - case 55 : itype = M32RBF_INSN_MACWLO;goto extract_sfmt_machi; - case 64 : /* fall through */ - case 65 : /* fall through */ - case 66 : /* fall through */ - case 67 : /* fall through */ - case 68 : /* fall through */ - case 69 : /* fall through */ - case 70 : /* fall through */ - case 71 : /* fall through */ - case 72 : /* fall through */ - case 73 : /* fall through */ - case 74 : /* fall through */ - case 75 : /* fall through */ - case 76 : /* fall through */ - case 77 : /* fall through */ - case 78 : /* fall through */ - case 79 : itype = M32RBF_INSN_ADDI;goto extract_sfmt_addi; - case 80 : /* fall through */ - case 81 : itype = M32RBF_INSN_SRLI;goto extract_sfmt_slli; - case 82 : /* fall through */ - case 83 : itype = M32RBF_INSN_SRAI;goto extract_sfmt_slli; - case 84 : /* fall through */ - case 85 : itype = M32RBF_INSN_SLLI;goto extract_sfmt_slli; - case 87 : - { - unsigned int val = (((insn >> 0) & (1 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_MVTACHI;goto extract_sfmt_mvtachi; - case 1 : itype = M32RBF_INSN_MVTACLO;goto extract_sfmt_mvtachi; - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 88 : itype = M32RBF_INSN_RACH;goto extract_sfmt_rac; - case 89 : itype = M32RBF_INSN_RAC;goto extract_sfmt_rac; - case 95 : - { - unsigned int val = (((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_MVFACHI;goto extract_sfmt_mvfachi; - case 1 : itype = M32RBF_INSN_MVFACLO;goto extract_sfmt_mvfachi; - case 2 : itype = M32RBF_INSN_MVFACMI;goto extract_sfmt_mvfachi; - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 96 : /* fall through */ - case 97 : /* fall through */ - case 98 : /* fall through */ - case 99 : /* fall through */ - case 100 : /* fall through */ - case 101 : /* fall through */ - case 102 : /* fall through */ - case 103 : /* fall through */ - case 104 : /* fall through */ - case 105 : /* fall through */ - case 106 : /* fall through */ - case 107 : /* fall through */ - case 108 : /* fall through */ - case 109 : /* fall through */ - case 110 : /* fall through */ - case 111 : itype = M32RBF_INSN_LDI8;goto extract_sfmt_ldi8; - case 112 : - { - unsigned int val = (((insn >> 8) & (15 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_NOP;goto extract_sfmt_nop; - case 12 : itype = M32RBF_INSN_BC8;goto extract_sfmt_bc8; - case 13 : itype = M32RBF_INSN_BNC8;goto extract_sfmt_bc8; - case 14 : itype = M32RBF_INSN_BL8;goto extract_sfmt_bl8; - case 15 : itype = M32RBF_INSN_BRA8;goto extract_sfmt_bra8; - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 113 : /* fall through */ - case 114 : /* fall through */ - case 115 : /* fall through */ - case 116 : /* fall through */ - case 117 : /* fall through */ - case 118 : /* fall through */ - case 119 : /* fall through */ - case 120 : /* fall through */ - case 121 : /* fall through */ - case 122 : /* fall through */ - case 123 : /* fall through */ - case 124 : /* fall through */ - case 125 : /* fall through */ - case 126 : /* fall through */ - case 127 : - { - unsigned int val = (((insn >> 8) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_BC8;goto extract_sfmt_bc8; - case 1 : itype = M32RBF_INSN_BNC8;goto extract_sfmt_bc8; - case 2 : itype = M32RBF_INSN_BL8;goto extract_sfmt_bl8; - case 3 : itype = M32RBF_INSN_BRA8;goto extract_sfmt_bra8; - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 132 : itype = M32RBF_INSN_CMPI;goto extract_sfmt_cmpi; - case 133 : itype = M32RBF_INSN_CMPUI;goto extract_sfmt_cmpi; - case 136 : itype = M32RBF_INSN_ADDV3;goto extract_sfmt_addv3; - case 138 : itype = M32RBF_INSN_ADD3;goto extract_sfmt_add3; - case 140 : itype = M32RBF_INSN_AND3;goto extract_sfmt_and3; - case 141 : itype = M32RBF_INSN_XOR3;goto extract_sfmt_and3; - case 142 : itype = M32RBF_INSN_OR3;goto extract_sfmt_or3; - case 144 : itype = M32RBF_INSN_DIV;goto extract_sfmt_div; - case 145 : itype = M32RBF_INSN_DIVU;goto extract_sfmt_div; - case 146 : itype = M32RBF_INSN_REM;goto extract_sfmt_div; - case 147 : itype = M32RBF_INSN_REMU;goto extract_sfmt_div; - case 152 : itype = M32RBF_INSN_SRL3;goto extract_sfmt_sll3; - case 154 : itype = M32RBF_INSN_SRA3;goto extract_sfmt_sll3; - case 156 : itype = M32RBF_INSN_SLL3;goto extract_sfmt_sll3; - case 159 : itype = M32RBF_INSN_LDI16;goto extract_sfmt_ldi16; - case 160 : itype = M32RBF_INSN_STB_D;goto extract_sfmt_stb_d; - case 162 : itype = M32RBF_INSN_STH_D;goto extract_sfmt_sth_d; - case 164 : itype = M32RBF_INSN_ST_D;goto extract_sfmt_st_d; - case 168 : itype = M32RBF_INSN_LDB_D;goto extract_sfmt_ldb_d; - case 169 : itype = M32RBF_INSN_LDUB_D;goto extract_sfmt_ldb_d; - case 170 : itype = M32RBF_INSN_LDH_D;goto extract_sfmt_ldh_d; - case 171 : itype = M32RBF_INSN_LDUH_D;goto extract_sfmt_ldh_d; - case 172 : itype = M32RBF_INSN_LD_D;goto extract_sfmt_ld_d; - case 176 : itype = M32RBF_INSN_BEQ;goto extract_sfmt_beq; - case 177 : itype = M32RBF_INSN_BNE;goto extract_sfmt_beq; - case 184 : itype = M32RBF_INSN_BEQZ;goto extract_sfmt_beqz; - case 185 : itype = M32RBF_INSN_BNEZ;goto extract_sfmt_beqz; - case 186 : itype = M32RBF_INSN_BLTZ;goto extract_sfmt_beqz; - case 187 : itype = M32RBF_INSN_BGEZ;goto extract_sfmt_beqz; - case 188 : itype = M32RBF_INSN_BLEZ;goto extract_sfmt_beqz; - case 189 : itype = M32RBF_INSN_BGTZ;goto extract_sfmt_beqz; - case 220 : itype = M32RBF_INSN_SETH;goto extract_sfmt_seth; - case 224 : /* fall through */ - case 225 : /* fall through */ - case 226 : /* fall through */ - case 227 : /* fall through */ - case 228 : /* fall through */ - case 229 : /* fall through */ - case 230 : /* fall through */ - case 231 : /* fall through */ - case 232 : /* fall through */ - case 233 : /* fall through */ - case 234 : /* fall through */ - case 235 : /* fall through */ - case 236 : /* fall through */ - case 237 : /* fall through */ - case 238 : /* fall through */ - case 239 : itype = M32RBF_INSN_LD24;goto extract_sfmt_ld24; - case 240 : /* fall through */ - case 241 : /* fall through */ - case 242 : /* fall through */ - case 243 : /* fall through */ - case 244 : /* fall through */ - case 245 : /* fall through */ - case 246 : /* fall through */ - case 247 : /* fall through */ - case 248 : /* fall through */ - case 249 : /* fall through */ - case 250 : /* fall through */ - case 251 : /* fall through */ - case 252 : /* fall through */ - case 253 : /* fall through */ - case 254 : /* fall through */ - case 255 : - { - unsigned int val = (((insn >> 8) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RBF_INSN_BC24;goto extract_sfmt_bc24; - case 1 : itype = M32RBF_INSN_BNC24;goto extract_sfmt_bc24; - case 2 : itype = M32RBF_INSN_BL24;goto extract_sfmt_bl24; - case 3 : itype = M32RBF_INSN_BRA24;goto extract_sfmt_bra24; - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_add: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_add3: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_and3: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_and3.f - UINT f_r1; - UINT f_r2; - UINT f_uimm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_uimm16) = f_uimm16; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_or3: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_and3.f - UINT f_r1; - UINT f_r2; - UINT f_uimm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_uimm16) = f_uimm16; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addi: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_r1; - INT f_simm8; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_simm8) = f_simm8; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addv: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addv3: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addx: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bc8: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bc24: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_beq: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_r1; - UINT f_r2; - SI f_disp16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_disp16) = f_disp16; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_beqz: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_r2; - SI f_disp16; - - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_disp16) = f_disp16; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bl8: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bl24: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bra8: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bra24: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmp: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r2; - INT f_simm16; - - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jl: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_jl.f - UINT f_r2; - - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jmp: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_jl.f - UINT f_r2; - - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldb: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldb_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldh: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldh_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_plus: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - FLD (out_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld24: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld24.f - UINT f_r1; - UINT f_uimm24; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (i_uimm24) = f_uimm24; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi8: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_r1; - INT f_simm8; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_simm8) = f_simm8; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi16: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lock: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_machi: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulhi: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mv: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvfachi: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_seth.f - UINT f_r1; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvfc: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvtachi: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvtc: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_nop: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_rac: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_rte: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_seth: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_seth.f - UINT f_r1; - UINT f_hi16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_hi16) = f_hi16; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sll3: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_slli: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_slli.f - UINT f_r1; - UINT f_uimm5; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_uimm5) = f_uimm5; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stb: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stb_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sth: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sth_d: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_plus: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - FLD (out_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_trap: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_trap.f - UINT f_uimm4; - - f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_uimm4) = f_uimm4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_unlock: - { - const IDESC *idesc = &m32rbf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - -} diff --git a/sim/m32r/decode.h b/sim/m32r/decode.h deleted file mode 100644 index 1450667..0000000 --- a/sim/m32r/decode.h +++ /dev/null @@ -1,99 +0,0 @@ -/* Decode header for m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef M32RBF_DECODE_H -#define M32RBF_DECODE_H - -extern const IDESC *m32rbf_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, CGEN_INSN_INT, - ARGBUF *); -extern void m32rbf_init_idesc_table (SIM_CPU *); -extern void m32rbf_sem_init_idesc_table (SIM_CPU *); -extern void m32rbf_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family m32rbf. */ -typedef enum m32rbf_insn_type { - M32RBF_INSN_X_INVALID, M32RBF_INSN_X_AFTER, M32RBF_INSN_X_BEFORE, M32RBF_INSN_X_CTI_CHAIN - , M32RBF_INSN_X_CHAIN, M32RBF_INSN_X_BEGIN, M32RBF_INSN_ADD, M32RBF_INSN_ADD3 - , M32RBF_INSN_AND, M32RBF_INSN_AND3, M32RBF_INSN_OR, M32RBF_INSN_OR3 - , M32RBF_INSN_XOR, M32RBF_INSN_XOR3, M32RBF_INSN_ADDI, M32RBF_INSN_ADDV - , M32RBF_INSN_ADDV3, M32RBF_INSN_ADDX, M32RBF_INSN_BC8, M32RBF_INSN_BC24 - , M32RBF_INSN_BEQ, M32RBF_INSN_BEQZ, M32RBF_INSN_BGEZ, M32RBF_INSN_BGTZ - , M32RBF_INSN_BLEZ, M32RBF_INSN_BLTZ, M32RBF_INSN_BNEZ, M32RBF_INSN_BL8 - , M32RBF_INSN_BL24, M32RBF_INSN_BNC8, M32RBF_INSN_BNC24, M32RBF_INSN_BNE - , M32RBF_INSN_BRA8, M32RBF_INSN_BRA24, M32RBF_INSN_CMP, M32RBF_INSN_CMPI - , M32RBF_INSN_CMPU, M32RBF_INSN_CMPUI, M32RBF_INSN_DIV, M32RBF_INSN_DIVU - , M32RBF_INSN_REM, M32RBF_INSN_REMU, M32RBF_INSN_JL, M32RBF_INSN_JMP - , M32RBF_INSN_LD, M32RBF_INSN_LD_D, M32RBF_INSN_LDB, M32RBF_INSN_LDB_D - , M32RBF_INSN_LDH, M32RBF_INSN_LDH_D, M32RBF_INSN_LDUB, M32RBF_INSN_LDUB_D - , M32RBF_INSN_LDUH, M32RBF_INSN_LDUH_D, M32RBF_INSN_LD_PLUS, M32RBF_INSN_LD24 - , M32RBF_INSN_LDI8, M32RBF_INSN_LDI16, M32RBF_INSN_LOCK, M32RBF_INSN_MACHI - , M32RBF_INSN_MACLO, M32RBF_INSN_MACWHI, M32RBF_INSN_MACWLO, M32RBF_INSN_MUL - , M32RBF_INSN_MULHI, M32RBF_INSN_MULLO, M32RBF_INSN_MULWHI, M32RBF_INSN_MULWLO - , M32RBF_INSN_MV, M32RBF_INSN_MVFACHI, M32RBF_INSN_MVFACLO, M32RBF_INSN_MVFACMI - , M32RBF_INSN_MVFC, M32RBF_INSN_MVTACHI, M32RBF_INSN_MVTACLO, M32RBF_INSN_MVTC - , M32RBF_INSN_NEG, M32RBF_INSN_NOP, M32RBF_INSN_NOT, M32RBF_INSN_RAC - , M32RBF_INSN_RACH, M32RBF_INSN_RTE, M32RBF_INSN_SETH, M32RBF_INSN_SLL - , M32RBF_INSN_SLL3, M32RBF_INSN_SLLI, M32RBF_INSN_SRA, M32RBF_INSN_SRA3 - , M32RBF_INSN_SRAI, M32RBF_INSN_SRL, M32RBF_INSN_SRL3, M32RBF_INSN_SRLI - , M32RBF_INSN_ST, M32RBF_INSN_ST_D, M32RBF_INSN_STB, M32RBF_INSN_STB_D - , M32RBF_INSN_STH, M32RBF_INSN_STH_D, M32RBF_INSN_ST_PLUS, M32RBF_INSN_ST_MINUS - , M32RBF_INSN_SUB, M32RBF_INSN_SUBV, M32RBF_INSN_SUBX, M32RBF_INSN_TRAP - , M32RBF_INSN_UNLOCK, M32RBF_INSN_MAX -} M32RBF_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family m32rbf. */ -typedef enum m32rbf_sfmt_type { - M32RBF_SFMT_EMPTY, M32RBF_SFMT_ADD, M32RBF_SFMT_ADD3, M32RBF_SFMT_AND3 - , M32RBF_SFMT_OR3, M32RBF_SFMT_ADDI, M32RBF_SFMT_ADDV, M32RBF_SFMT_ADDV3 - , M32RBF_SFMT_ADDX, M32RBF_SFMT_BC8, M32RBF_SFMT_BC24, M32RBF_SFMT_BEQ - , M32RBF_SFMT_BEQZ, M32RBF_SFMT_BL8, M32RBF_SFMT_BL24, M32RBF_SFMT_BRA8 - , M32RBF_SFMT_BRA24, M32RBF_SFMT_CMP, M32RBF_SFMT_CMPI, M32RBF_SFMT_DIV - , M32RBF_SFMT_JL, M32RBF_SFMT_JMP, M32RBF_SFMT_LD, M32RBF_SFMT_LD_D - , M32RBF_SFMT_LDB, M32RBF_SFMT_LDB_D, M32RBF_SFMT_LDH, M32RBF_SFMT_LDH_D - , M32RBF_SFMT_LD_PLUS, M32RBF_SFMT_LD24, M32RBF_SFMT_LDI8, M32RBF_SFMT_LDI16 - , M32RBF_SFMT_LOCK, M32RBF_SFMT_MACHI, M32RBF_SFMT_MULHI, M32RBF_SFMT_MV - , M32RBF_SFMT_MVFACHI, M32RBF_SFMT_MVFC, M32RBF_SFMT_MVTACHI, M32RBF_SFMT_MVTC - , M32RBF_SFMT_NOP, M32RBF_SFMT_RAC, M32RBF_SFMT_RTE, M32RBF_SFMT_SETH - , M32RBF_SFMT_SLL3, M32RBF_SFMT_SLLI, M32RBF_SFMT_ST, M32RBF_SFMT_ST_D - , M32RBF_SFMT_STB, M32RBF_SFMT_STB_D, M32RBF_SFMT_STH, M32RBF_SFMT_STH_D - , M32RBF_SFMT_ST_PLUS, M32RBF_SFMT_TRAP, M32RBF_SFMT_UNLOCK -} M32RBF_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int m32rbf_model_m32r_d_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/); -extern int m32rbf_model_m32r_d_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/); -extern int m32rbf_model_m32r_d_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/); -extern int m32rbf_model_m32r_d_u_mac (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/); -extern int m32rbf_model_m32r_d_u_cmp (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/); -extern int m32rbf_model_m32r_d_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/, INT /*dr*/); -extern int m32rbf_model_test_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/); - -/* Profiling before/after handlers (user written) */ - -extern void m32rbf_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void m32rbf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* M32RBF_DECODE_H */ diff --git a/sim/m32r/decodex.c b/sim/m32r/decodex.c deleted file mode 100644 index 336ba3a..0000000 --- a/sim/m32r/decodex.c +++ /dev/null @@ -1,2392 +0,0 @@ -/* Simulator instruction decoder for m32rxf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rxf -#define WANT_CPU_M32RXF - -#include "sim-main.h" -#include "sim-assert.h" - -/* Insn can't be executed in parallel. - Or is that "do NOt Pass to Air defense Radar"? :-) */ -#define NOPAR (-1) - -/* The instruction descriptor array. - This is computed at runtime. Space for it is not malloc'd to save a - teensy bit of cpu in the decoder. Moving it to malloc space is trivial - but won't be done until necessary (we don't currently support the runtime - addition of instructions nor an SMP machine with different cpus). */ -static IDESC m32rxf_insn_data[M32RXF_INSN_SNC + 1]; - -/* Commas between elements are contained in the macros. - Some of these are conditionally compiled out. */ - -static const struct insn_sem m32rxf_insn_sem[] = -{ - { VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_AFTER, M32RXF_INSN_X_AFTER, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_BEFORE, M32RXF_INSN_X_BEFORE, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_CTI_CHAIN, M32RXF_INSN_X_CTI_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_CHAIN, M32RXF_INSN_X_CHAIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { VIRTUAL_INSN_X_BEGIN, M32RXF_INSN_X_BEGIN, M32RXF_SFMT_EMPTY, NOPAR, NOPAR }, - { M32R_INSN_ADD, M32RXF_INSN_ADD, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_ADD, M32RXF_INSN_WRITE_ADD }, - { M32R_INSN_ADD3, M32RXF_INSN_ADD3, M32RXF_SFMT_ADD3, NOPAR, NOPAR }, - { M32R_INSN_AND, M32RXF_INSN_AND, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_AND, M32RXF_INSN_WRITE_AND }, - { M32R_INSN_AND3, M32RXF_INSN_AND3, M32RXF_SFMT_AND3, NOPAR, NOPAR }, - { M32R_INSN_OR, M32RXF_INSN_OR, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_OR, M32RXF_INSN_WRITE_OR }, - { M32R_INSN_OR3, M32RXF_INSN_OR3, M32RXF_SFMT_OR3, NOPAR, NOPAR }, - { M32R_INSN_XOR, M32RXF_INSN_XOR, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_XOR, M32RXF_INSN_WRITE_XOR }, - { M32R_INSN_XOR3, M32RXF_INSN_XOR3, M32RXF_SFMT_AND3, NOPAR, NOPAR }, - { M32R_INSN_ADDI, M32RXF_INSN_ADDI, M32RXF_SFMT_ADDI, M32RXF_INSN_PAR_ADDI, M32RXF_INSN_WRITE_ADDI }, - { M32R_INSN_ADDV, M32RXF_INSN_ADDV, M32RXF_SFMT_ADDV, M32RXF_INSN_PAR_ADDV, M32RXF_INSN_WRITE_ADDV }, - { M32R_INSN_ADDV3, M32RXF_INSN_ADDV3, M32RXF_SFMT_ADDV3, NOPAR, NOPAR }, - { M32R_INSN_ADDX, M32RXF_INSN_ADDX, M32RXF_SFMT_ADDX, M32RXF_INSN_PAR_ADDX, M32RXF_INSN_WRITE_ADDX }, - { M32R_INSN_BC8, M32RXF_INSN_BC8, M32RXF_SFMT_BC8, M32RXF_INSN_PAR_BC8, M32RXF_INSN_WRITE_BC8 }, - { M32R_INSN_BC24, M32RXF_INSN_BC24, M32RXF_SFMT_BC24, NOPAR, NOPAR }, - { M32R_INSN_BEQ, M32RXF_INSN_BEQ, M32RXF_SFMT_BEQ, NOPAR, NOPAR }, - { M32R_INSN_BEQZ, M32RXF_INSN_BEQZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR }, - { M32R_INSN_BGEZ, M32RXF_INSN_BGEZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR }, - { M32R_INSN_BGTZ, M32RXF_INSN_BGTZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR }, - { M32R_INSN_BLEZ, M32RXF_INSN_BLEZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR }, - { M32R_INSN_BLTZ, M32RXF_INSN_BLTZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR }, - { M32R_INSN_BNEZ, M32RXF_INSN_BNEZ, M32RXF_SFMT_BEQZ, NOPAR, NOPAR }, - { M32R_INSN_BL8, M32RXF_INSN_BL8, M32RXF_SFMT_BL8, M32RXF_INSN_PAR_BL8, M32RXF_INSN_WRITE_BL8 }, - { M32R_INSN_BL24, M32RXF_INSN_BL24, M32RXF_SFMT_BL24, NOPAR, NOPAR }, - { M32R_INSN_BCL8, M32RXF_INSN_BCL8, M32RXF_SFMT_BCL8, M32RXF_INSN_PAR_BCL8, M32RXF_INSN_WRITE_BCL8 }, - { M32R_INSN_BCL24, M32RXF_INSN_BCL24, M32RXF_SFMT_BCL24, NOPAR, NOPAR }, - { M32R_INSN_BNC8, M32RXF_INSN_BNC8, M32RXF_SFMT_BC8, M32RXF_INSN_PAR_BNC8, M32RXF_INSN_WRITE_BNC8 }, - { M32R_INSN_BNC24, M32RXF_INSN_BNC24, M32RXF_SFMT_BC24, NOPAR, NOPAR }, - { M32R_INSN_BNE, M32RXF_INSN_BNE, M32RXF_SFMT_BEQ, NOPAR, NOPAR }, - { M32R_INSN_BRA8, M32RXF_INSN_BRA8, M32RXF_SFMT_BRA8, M32RXF_INSN_PAR_BRA8, M32RXF_INSN_WRITE_BRA8 }, - { M32R_INSN_BRA24, M32RXF_INSN_BRA24, M32RXF_SFMT_BRA24, NOPAR, NOPAR }, - { M32R_INSN_BNCL8, M32RXF_INSN_BNCL8, M32RXF_SFMT_BCL8, M32RXF_INSN_PAR_BNCL8, M32RXF_INSN_WRITE_BNCL8 }, - { M32R_INSN_BNCL24, M32RXF_INSN_BNCL24, M32RXF_SFMT_BCL24, NOPAR, NOPAR }, - { M32R_INSN_CMP, M32RXF_INSN_CMP, M32RXF_SFMT_CMP, M32RXF_INSN_PAR_CMP, M32RXF_INSN_WRITE_CMP }, - { M32R_INSN_CMPI, M32RXF_INSN_CMPI, M32RXF_SFMT_CMPI, NOPAR, NOPAR }, - { M32R_INSN_CMPU, M32RXF_INSN_CMPU, M32RXF_SFMT_CMP, M32RXF_INSN_PAR_CMPU, M32RXF_INSN_WRITE_CMPU }, - { M32R_INSN_CMPUI, M32RXF_INSN_CMPUI, M32RXF_SFMT_CMPI, NOPAR, NOPAR }, - { M32R_INSN_CMPEQ, M32RXF_INSN_CMPEQ, M32RXF_SFMT_CMP, M32RXF_INSN_PAR_CMPEQ, M32RXF_INSN_WRITE_CMPEQ }, - { M32R_INSN_CMPZ, M32RXF_INSN_CMPZ, M32RXF_SFMT_CMPZ, M32RXF_INSN_PAR_CMPZ, M32RXF_INSN_WRITE_CMPZ }, - { M32R_INSN_DIV, M32RXF_INSN_DIV, M32RXF_SFMT_DIV, NOPAR, NOPAR }, - { M32R_INSN_DIVU, M32RXF_INSN_DIVU, M32RXF_SFMT_DIV, NOPAR, NOPAR }, - { M32R_INSN_REM, M32RXF_INSN_REM, M32RXF_SFMT_DIV, NOPAR, NOPAR }, - { M32R_INSN_REMU, M32RXF_INSN_REMU, M32RXF_SFMT_DIV, NOPAR, NOPAR }, - { M32R_INSN_DIVH, M32RXF_INSN_DIVH, M32RXF_SFMT_DIV, NOPAR, NOPAR }, - { M32R_INSN_JC, M32RXF_INSN_JC, M32RXF_SFMT_JC, M32RXF_INSN_PAR_JC, M32RXF_INSN_WRITE_JC }, - { M32R_INSN_JNC, M32RXF_INSN_JNC, M32RXF_SFMT_JC, M32RXF_INSN_PAR_JNC, M32RXF_INSN_WRITE_JNC }, - { M32R_INSN_JL, M32RXF_INSN_JL, M32RXF_SFMT_JL, M32RXF_INSN_PAR_JL, M32RXF_INSN_WRITE_JL }, - { M32R_INSN_JMP, M32RXF_INSN_JMP, M32RXF_SFMT_JMP, M32RXF_INSN_PAR_JMP, M32RXF_INSN_WRITE_JMP }, - { M32R_INSN_LD, M32RXF_INSN_LD, M32RXF_SFMT_LD, M32RXF_INSN_PAR_LD, M32RXF_INSN_WRITE_LD }, - { M32R_INSN_LD_D, M32RXF_INSN_LD_D, M32RXF_SFMT_LD_D, NOPAR, NOPAR }, - { M32R_INSN_LDB, M32RXF_INSN_LDB, M32RXF_SFMT_LDB, M32RXF_INSN_PAR_LDB, M32RXF_INSN_WRITE_LDB }, - { M32R_INSN_LDB_D, M32RXF_INSN_LDB_D, M32RXF_SFMT_LDB_D, NOPAR, NOPAR }, - { M32R_INSN_LDH, M32RXF_INSN_LDH, M32RXF_SFMT_LDH, M32RXF_INSN_PAR_LDH, M32RXF_INSN_WRITE_LDH }, - { M32R_INSN_LDH_D, M32RXF_INSN_LDH_D, M32RXF_SFMT_LDH_D, NOPAR, NOPAR }, - { M32R_INSN_LDUB, M32RXF_INSN_LDUB, M32RXF_SFMT_LDB, M32RXF_INSN_PAR_LDUB, M32RXF_INSN_WRITE_LDUB }, - { M32R_INSN_LDUB_D, M32RXF_INSN_LDUB_D, M32RXF_SFMT_LDB_D, NOPAR, NOPAR }, - { M32R_INSN_LDUH, M32RXF_INSN_LDUH, M32RXF_SFMT_LDH, M32RXF_INSN_PAR_LDUH, M32RXF_INSN_WRITE_LDUH }, - { M32R_INSN_LDUH_D, M32RXF_INSN_LDUH_D, M32RXF_SFMT_LDH_D, NOPAR, NOPAR }, - { M32R_INSN_LD_PLUS, M32RXF_INSN_LD_PLUS, M32RXF_SFMT_LD_PLUS, M32RXF_INSN_PAR_LD_PLUS, M32RXF_INSN_WRITE_LD_PLUS }, - { M32R_INSN_LD24, M32RXF_INSN_LD24, M32RXF_SFMT_LD24, NOPAR, NOPAR }, - { M32R_INSN_LDI8, M32RXF_INSN_LDI8, M32RXF_SFMT_LDI8, M32RXF_INSN_PAR_LDI8, M32RXF_INSN_WRITE_LDI8 }, - { M32R_INSN_LDI16, M32RXF_INSN_LDI16, M32RXF_SFMT_LDI16, NOPAR, NOPAR }, - { M32R_INSN_LOCK, M32RXF_INSN_LOCK, M32RXF_SFMT_LOCK, M32RXF_INSN_PAR_LOCK, M32RXF_INSN_WRITE_LOCK }, - { M32R_INSN_MACHI_A, M32RXF_INSN_MACHI_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACHI_A, M32RXF_INSN_WRITE_MACHI_A }, - { M32R_INSN_MACLO_A, M32RXF_INSN_MACLO_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACLO_A, M32RXF_INSN_WRITE_MACLO_A }, - { M32R_INSN_MACWHI_A, M32RXF_INSN_MACWHI_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACWHI_A, M32RXF_INSN_WRITE_MACWHI_A }, - { M32R_INSN_MACWLO_A, M32RXF_INSN_MACWLO_A, M32RXF_SFMT_MACHI_A, M32RXF_INSN_PAR_MACWLO_A, M32RXF_INSN_WRITE_MACWLO_A }, - { M32R_INSN_MUL, M32RXF_INSN_MUL, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_MUL, M32RXF_INSN_WRITE_MUL }, - { M32R_INSN_MULHI_A, M32RXF_INSN_MULHI_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULHI_A, M32RXF_INSN_WRITE_MULHI_A }, - { M32R_INSN_MULLO_A, M32RXF_INSN_MULLO_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULLO_A, M32RXF_INSN_WRITE_MULLO_A }, - { M32R_INSN_MULWHI_A, M32RXF_INSN_MULWHI_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULWHI_A, M32RXF_INSN_WRITE_MULWHI_A }, - { M32R_INSN_MULWLO_A, M32RXF_INSN_MULWLO_A, M32RXF_SFMT_MULHI_A, M32RXF_INSN_PAR_MULWLO_A, M32RXF_INSN_WRITE_MULWLO_A }, - { M32R_INSN_MV, M32RXF_INSN_MV, M32RXF_SFMT_MV, M32RXF_INSN_PAR_MV, M32RXF_INSN_WRITE_MV }, - { M32R_INSN_MVFACHI_A, M32RXF_INSN_MVFACHI_A, M32RXF_SFMT_MVFACHI_A, M32RXF_INSN_PAR_MVFACHI_A, M32RXF_INSN_WRITE_MVFACHI_A }, - { M32R_INSN_MVFACLO_A, M32RXF_INSN_MVFACLO_A, M32RXF_SFMT_MVFACHI_A, M32RXF_INSN_PAR_MVFACLO_A, M32RXF_INSN_WRITE_MVFACLO_A }, - { M32R_INSN_MVFACMI_A, M32RXF_INSN_MVFACMI_A, M32RXF_SFMT_MVFACHI_A, M32RXF_INSN_PAR_MVFACMI_A, M32RXF_INSN_WRITE_MVFACMI_A }, - { M32R_INSN_MVFC, M32RXF_INSN_MVFC, M32RXF_SFMT_MVFC, M32RXF_INSN_PAR_MVFC, M32RXF_INSN_WRITE_MVFC }, - { M32R_INSN_MVTACHI_A, M32RXF_INSN_MVTACHI_A, M32RXF_SFMT_MVTACHI_A, M32RXF_INSN_PAR_MVTACHI_A, M32RXF_INSN_WRITE_MVTACHI_A }, - { M32R_INSN_MVTACLO_A, M32RXF_INSN_MVTACLO_A, M32RXF_SFMT_MVTACHI_A, M32RXF_INSN_PAR_MVTACLO_A, M32RXF_INSN_WRITE_MVTACLO_A }, - { M32R_INSN_MVTC, M32RXF_INSN_MVTC, M32RXF_SFMT_MVTC, M32RXF_INSN_PAR_MVTC, M32RXF_INSN_WRITE_MVTC }, - { M32R_INSN_NEG, M32RXF_INSN_NEG, M32RXF_SFMT_MV, M32RXF_INSN_PAR_NEG, M32RXF_INSN_WRITE_NEG }, - { M32R_INSN_NOP, M32RXF_INSN_NOP, M32RXF_SFMT_NOP, M32RXF_INSN_PAR_NOP, M32RXF_INSN_WRITE_NOP }, - { M32R_INSN_NOT, M32RXF_INSN_NOT, M32RXF_SFMT_MV, M32RXF_INSN_PAR_NOT, M32RXF_INSN_WRITE_NOT }, - { M32R_INSN_RAC_DSI, M32RXF_INSN_RAC_DSI, M32RXF_SFMT_RAC_DSI, M32RXF_INSN_PAR_RAC_DSI, M32RXF_INSN_WRITE_RAC_DSI }, - { M32R_INSN_RACH_DSI, M32RXF_INSN_RACH_DSI, M32RXF_SFMT_RAC_DSI, M32RXF_INSN_PAR_RACH_DSI, M32RXF_INSN_WRITE_RACH_DSI }, - { M32R_INSN_RTE, M32RXF_INSN_RTE, M32RXF_SFMT_RTE, M32RXF_INSN_PAR_RTE, M32RXF_INSN_WRITE_RTE }, - { M32R_INSN_SETH, M32RXF_INSN_SETH, M32RXF_SFMT_SETH, NOPAR, NOPAR }, - { M32R_INSN_SLL, M32RXF_INSN_SLL, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SLL, M32RXF_INSN_WRITE_SLL }, - { M32R_INSN_SLL3, M32RXF_INSN_SLL3, M32RXF_SFMT_SLL3, NOPAR, NOPAR }, - { M32R_INSN_SLLI, M32RXF_INSN_SLLI, M32RXF_SFMT_SLLI, M32RXF_INSN_PAR_SLLI, M32RXF_INSN_WRITE_SLLI }, - { M32R_INSN_SRA, M32RXF_INSN_SRA, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SRA, M32RXF_INSN_WRITE_SRA }, - { M32R_INSN_SRA3, M32RXF_INSN_SRA3, M32RXF_SFMT_SLL3, NOPAR, NOPAR }, - { M32R_INSN_SRAI, M32RXF_INSN_SRAI, M32RXF_SFMT_SLLI, M32RXF_INSN_PAR_SRAI, M32RXF_INSN_WRITE_SRAI }, - { M32R_INSN_SRL, M32RXF_INSN_SRL, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SRL, M32RXF_INSN_WRITE_SRL }, - { M32R_INSN_SRL3, M32RXF_INSN_SRL3, M32RXF_SFMT_SLL3, NOPAR, NOPAR }, - { M32R_INSN_SRLI, M32RXF_INSN_SRLI, M32RXF_SFMT_SLLI, M32RXF_INSN_PAR_SRLI, M32RXF_INSN_WRITE_SRLI }, - { M32R_INSN_ST, M32RXF_INSN_ST, M32RXF_SFMT_ST, M32RXF_INSN_PAR_ST, M32RXF_INSN_WRITE_ST }, - { M32R_INSN_ST_D, M32RXF_INSN_ST_D, M32RXF_SFMT_ST_D, NOPAR, NOPAR }, - { M32R_INSN_STB, M32RXF_INSN_STB, M32RXF_SFMT_STB, M32RXF_INSN_PAR_STB, M32RXF_INSN_WRITE_STB }, - { M32R_INSN_STB_D, M32RXF_INSN_STB_D, M32RXF_SFMT_STB_D, NOPAR, NOPAR }, - { M32R_INSN_STH, M32RXF_INSN_STH, M32RXF_SFMT_STH, M32RXF_INSN_PAR_STH, M32RXF_INSN_WRITE_STH }, - { M32R_INSN_STH_D, M32RXF_INSN_STH_D, M32RXF_SFMT_STH_D, NOPAR, NOPAR }, - { M32R_INSN_ST_PLUS, M32RXF_INSN_ST_PLUS, M32RXF_SFMT_ST_PLUS, M32RXF_INSN_PAR_ST_PLUS, M32RXF_INSN_WRITE_ST_PLUS }, - { M32R_INSN_ST_MINUS, M32RXF_INSN_ST_MINUS, M32RXF_SFMT_ST_PLUS, M32RXF_INSN_PAR_ST_MINUS, M32RXF_INSN_WRITE_ST_MINUS }, - { M32R_INSN_SUB, M32RXF_INSN_SUB, M32RXF_SFMT_ADD, M32RXF_INSN_PAR_SUB, M32RXF_INSN_WRITE_SUB }, - { M32R_INSN_SUBV, M32RXF_INSN_SUBV, M32RXF_SFMT_ADDV, M32RXF_INSN_PAR_SUBV, M32RXF_INSN_WRITE_SUBV }, - { M32R_INSN_SUBX, M32RXF_INSN_SUBX, M32RXF_SFMT_ADDX, M32RXF_INSN_PAR_SUBX, M32RXF_INSN_WRITE_SUBX }, - { M32R_INSN_TRAP, M32RXF_INSN_TRAP, M32RXF_SFMT_TRAP, M32RXF_INSN_PAR_TRAP, M32RXF_INSN_WRITE_TRAP }, - { M32R_INSN_UNLOCK, M32RXF_INSN_UNLOCK, M32RXF_SFMT_UNLOCK, M32RXF_INSN_PAR_UNLOCK, M32RXF_INSN_WRITE_UNLOCK }, - { M32R_INSN_SATB, M32RXF_INSN_SATB, M32RXF_SFMT_SATB, NOPAR, NOPAR }, - { M32R_INSN_SATH, M32RXF_INSN_SATH, M32RXF_SFMT_SATB, NOPAR, NOPAR }, - { M32R_INSN_SAT, M32RXF_INSN_SAT, M32RXF_SFMT_SAT, NOPAR, NOPAR }, - { M32R_INSN_PCMPBZ, M32RXF_INSN_PCMPBZ, M32RXF_SFMT_CMPZ, M32RXF_INSN_PAR_PCMPBZ, M32RXF_INSN_WRITE_PCMPBZ }, - { M32R_INSN_SADD, M32RXF_INSN_SADD, M32RXF_SFMT_SADD, M32RXF_INSN_PAR_SADD, M32RXF_INSN_WRITE_SADD }, - { M32R_INSN_MACWU1, M32RXF_INSN_MACWU1, M32RXF_SFMT_MACWU1, M32RXF_INSN_PAR_MACWU1, M32RXF_INSN_WRITE_MACWU1 }, - { M32R_INSN_MSBLO, M32RXF_INSN_MSBLO, M32RXF_SFMT_MSBLO, M32RXF_INSN_PAR_MSBLO, M32RXF_INSN_WRITE_MSBLO }, - { M32R_INSN_MULWU1, M32RXF_INSN_MULWU1, M32RXF_SFMT_MULWU1, M32RXF_INSN_PAR_MULWU1, M32RXF_INSN_WRITE_MULWU1 }, - { M32R_INSN_MACLH1, M32RXF_INSN_MACLH1, M32RXF_SFMT_MACWU1, M32RXF_INSN_PAR_MACLH1, M32RXF_INSN_WRITE_MACLH1 }, - { M32R_INSN_SC, M32RXF_INSN_SC, M32RXF_SFMT_SC, M32RXF_INSN_PAR_SC, M32RXF_INSN_WRITE_SC }, - { M32R_INSN_SNC, M32RXF_INSN_SNC, M32RXF_SFMT_SC, M32RXF_INSN_PAR_SNC, M32RXF_INSN_WRITE_SNC }, -}; - -static const struct insn_sem m32rxf_insn_sem_invalid = { - VIRTUAL_INSN_X_INVALID, M32RXF_INSN_X_INVALID, M32RXF_SFMT_EMPTY, NOPAR, NOPAR -}; - -/* Initialize an IDESC from the compile-time computable parts. */ - -static INLINE void -init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) -{ - const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; - - id->num = t->index; - id->sfmt = t->sfmt; - if ((int) t->type <= 0) - id->idata = & cgen_virtual_insn_table[- (int) t->type]; - else - id->idata = & insn_table[t->type]; - id->attrs = CGEN_INSN_ATTRS (id->idata); - /* Oh my god, a magic number. */ - id->length = CGEN_INSN_BITSIZE (id->idata) / 8; - -#if WITH_PROFILE_MODEL_P - id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; - { - SIM_DESC sd = CPU_STATE (cpu); - SIM_ASSERT (t->index == id->timing->num); - } -#endif - - /* Semantic pointers are initialized elsewhere. */ -} - -/* Initialize the instruction descriptor table. */ - -void -m32rxf_init_idesc_table (SIM_CPU *cpu) -{ - IDESC *id,*tabend; - const struct insn_sem *t,*tend; - int tabsize = sizeof (m32rxf_insn_data) / sizeof (IDESC); - IDESC *table = m32rxf_insn_data; - - memset (table, 0, tabsize * sizeof (IDESC)); - - /* First set all entries to the `invalid insn'. */ - t = & m32rxf_insn_sem_invalid; - for (id = table, tabend = table + tabsize; id < tabend; ++id) - init_idesc (cpu, id, t); - - /* Now fill in the values for the chosen cpu. */ - for (t = m32rxf_insn_sem, tend = t + sizeof (m32rxf_insn_sem) / sizeof (*t); - t != tend; ++t) - { - init_idesc (cpu, & table[t->index], t); - if (t->par_index != NOPAR) - { - init_idesc (cpu, &table[t->par_index], t); - table[t->index].par_idesc = &table[t->par_index]; - } - if (t->par_index != NOPAR) - { - init_idesc (cpu, &table[t->write_index], t); - table[t->par_index].par_idesc = &table[t->write_index]; - } - } - - /* Link the IDESC table into the cpu. */ - CPU_IDESC (cpu) = table; -} - -/* Given an instruction, return a pointer to its IDESC entry. */ - -const IDESC * -m32rxf_decode (SIM_CPU *current_cpu, IADDR pc, - CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, - ARGBUF *abuf) -{ - /* Result of decoder. */ - M32RXF_INSN_TYPE itype; - - { - CGEN_INSN_INT insn = base_insn; - - { - unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_SUBV;goto extract_sfmt_addv; - case 1 : itype = M32RXF_INSN_SUBX;goto extract_sfmt_addx; - case 2 : itype = M32RXF_INSN_SUB;goto extract_sfmt_add; - case 3 : itype = M32RXF_INSN_NEG;goto extract_sfmt_mv; - case 4 : itype = M32RXF_INSN_CMP;goto extract_sfmt_cmp; - case 5 : itype = M32RXF_INSN_CMPU;goto extract_sfmt_cmp; - case 6 : itype = M32RXF_INSN_CMPEQ;goto extract_sfmt_cmp; - case 7 : - { - unsigned int val = (((insn >> 8) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_CMPZ;goto extract_sfmt_cmpz; - case 3 : itype = M32RXF_INSN_PCMPBZ;goto extract_sfmt_cmpz; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 8 : itype = M32RXF_INSN_ADDV;goto extract_sfmt_addv; - case 9 : itype = M32RXF_INSN_ADDX;goto extract_sfmt_addx; - case 10 : itype = M32RXF_INSN_ADD;goto extract_sfmt_add; - case 11 : itype = M32RXF_INSN_NOT;goto extract_sfmt_mv; - case 12 : itype = M32RXF_INSN_AND;goto extract_sfmt_add; - case 13 : itype = M32RXF_INSN_XOR;goto extract_sfmt_add; - case 14 : itype = M32RXF_INSN_OR;goto extract_sfmt_add; - case 16 : itype = M32RXF_INSN_SRL;goto extract_sfmt_add; - case 18 : itype = M32RXF_INSN_SRA;goto extract_sfmt_add; - case 20 : itype = M32RXF_INSN_SLL;goto extract_sfmt_add; - case 22 : itype = M32RXF_INSN_MUL;goto extract_sfmt_add; - case 24 : itype = M32RXF_INSN_MV;goto extract_sfmt_mv; - case 25 : itype = M32RXF_INSN_MVFC;goto extract_sfmt_mvfc; - case 26 : itype = M32RXF_INSN_MVTC;goto extract_sfmt_mvtc; - case 28 : - { - unsigned int val = (((insn >> 8) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_JC;goto extract_sfmt_jc; - case 1 : itype = M32RXF_INSN_JNC;goto extract_sfmt_jc; - case 2 : itype = M32RXF_INSN_JL;goto extract_sfmt_jl; - case 3 : itype = M32RXF_INSN_JMP;goto extract_sfmt_jmp; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 29 : itype = M32RXF_INSN_RTE;goto extract_sfmt_rte; - case 31 : itype = M32RXF_INSN_TRAP;goto extract_sfmt_trap; - case 32 : itype = M32RXF_INSN_STB;goto extract_sfmt_stb; - case 34 : itype = M32RXF_INSN_STH;goto extract_sfmt_sth; - case 36 : itype = M32RXF_INSN_ST;goto extract_sfmt_st; - case 37 : itype = M32RXF_INSN_UNLOCK;goto extract_sfmt_unlock; - case 38 : itype = M32RXF_INSN_ST_PLUS;goto extract_sfmt_st_plus; - case 39 : itype = M32RXF_INSN_ST_MINUS;goto extract_sfmt_st_plus; - case 40 : itype = M32RXF_INSN_LDB;goto extract_sfmt_ldb; - case 41 : itype = M32RXF_INSN_LDUB;goto extract_sfmt_ldb; - case 42 : itype = M32RXF_INSN_LDH;goto extract_sfmt_ldh; - case 43 : itype = M32RXF_INSN_LDUH;goto extract_sfmt_ldh; - case 44 : itype = M32RXF_INSN_LD;goto extract_sfmt_ld; - case 45 : itype = M32RXF_INSN_LOCK;goto extract_sfmt_lock; - case 46 : itype = M32RXF_INSN_LD_PLUS;goto extract_sfmt_ld_plus; - case 48 : /* fall through */ - case 56 : itype = M32RXF_INSN_MULHI_A;goto extract_sfmt_mulhi_a; - case 49 : /* fall through */ - case 57 : itype = M32RXF_INSN_MULLO_A;goto extract_sfmt_mulhi_a; - case 50 : /* fall through */ - case 58 : itype = M32RXF_INSN_MULWHI_A;goto extract_sfmt_mulhi_a; - case 51 : /* fall through */ - case 59 : itype = M32RXF_INSN_MULWLO_A;goto extract_sfmt_mulhi_a; - case 52 : /* fall through */ - case 60 : itype = M32RXF_INSN_MACHI_A;goto extract_sfmt_machi_a; - case 53 : /* fall through */ - case 61 : itype = M32RXF_INSN_MACLO_A;goto extract_sfmt_machi_a; - case 54 : /* fall through */ - case 62 : itype = M32RXF_INSN_MACWHI_A;goto extract_sfmt_machi_a; - case 55 : /* fall through */ - case 63 : itype = M32RXF_INSN_MACWLO_A;goto extract_sfmt_machi_a; - case 64 : /* fall through */ - case 65 : /* fall through */ - case 66 : /* fall through */ - case 67 : /* fall through */ - case 68 : /* fall through */ - case 69 : /* fall through */ - case 70 : /* fall through */ - case 71 : /* fall through */ - case 72 : /* fall through */ - case 73 : /* fall through */ - case 74 : /* fall through */ - case 75 : /* fall through */ - case 76 : /* fall through */ - case 77 : /* fall through */ - case 78 : /* fall through */ - case 79 : itype = M32RXF_INSN_ADDI;goto extract_sfmt_addi; - case 80 : /* fall through */ - case 81 : itype = M32RXF_INSN_SRLI;goto extract_sfmt_slli; - case 82 : /* fall through */ - case 83 : itype = M32RXF_INSN_SRAI;goto extract_sfmt_slli; - case 84 : /* fall through */ - case 85 : itype = M32RXF_INSN_SLLI;goto extract_sfmt_slli; - case 87 : - { - unsigned int val = (((insn >> 0) & (1 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_MVTACHI_A;goto extract_sfmt_mvtachi_a; - case 1 : itype = M32RXF_INSN_MVTACLO_A;goto extract_sfmt_mvtachi_a; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 88 : itype = M32RXF_INSN_RACH_DSI;goto extract_sfmt_rac_dsi; - case 89 : itype = M32RXF_INSN_RAC_DSI;goto extract_sfmt_rac_dsi; - case 90 : itype = M32RXF_INSN_MULWU1;goto extract_sfmt_mulwu1; - case 91 : itype = M32RXF_INSN_MACWU1;goto extract_sfmt_macwu1; - case 92 : itype = M32RXF_INSN_MACLH1;goto extract_sfmt_macwu1; - case 93 : itype = M32RXF_INSN_MSBLO;goto extract_sfmt_msblo; - case 94 : itype = M32RXF_INSN_SADD;goto extract_sfmt_sadd; - case 95 : - { - unsigned int val = (((insn >> 0) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_MVFACHI_A;goto extract_sfmt_mvfachi_a; - case 1 : itype = M32RXF_INSN_MVFACLO_A;goto extract_sfmt_mvfachi_a; - case 2 : itype = M32RXF_INSN_MVFACMI_A;goto extract_sfmt_mvfachi_a; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 96 : /* fall through */ - case 97 : /* fall through */ - case 98 : /* fall through */ - case 99 : /* fall through */ - case 100 : /* fall through */ - case 101 : /* fall through */ - case 102 : /* fall through */ - case 103 : /* fall through */ - case 104 : /* fall through */ - case 105 : /* fall through */ - case 106 : /* fall through */ - case 107 : /* fall through */ - case 108 : /* fall through */ - case 109 : /* fall through */ - case 110 : /* fall through */ - case 111 : itype = M32RXF_INSN_LDI8;goto extract_sfmt_ldi8; - case 112 : - { - unsigned int val = (((insn >> 8) & (15 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_NOP;goto extract_sfmt_nop; - case 4 : itype = M32RXF_INSN_SC;goto extract_sfmt_sc; - case 5 : itype = M32RXF_INSN_SNC;goto extract_sfmt_sc; - case 8 : itype = M32RXF_INSN_BCL8;goto extract_sfmt_bcl8; - case 9 : itype = M32RXF_INSN_BNCL8;goto extract_sfmt_bcl8; - case 12 : itype = M32RXF_INSN_BC8;goto extract_sfmt_bc8; - case 13 : itype = M32RXF_INSN_BNC8;goto extract_sfmt_bc8; - case 14 : itype = M32RXF_INSN_BL8;goto extract_sfmt_bl8; - case 15 : itype = M32RXF_INSN_BRA8;goto extract_sfmt_bra8; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 113 : /* fall through */ - case 114 : /* fall through */ - case 115 : /* fall through */ - case 116 : /* fall through */ - case 117 : /* fall through */ - case 118 : /* fall through */ - case 119 : /* fall through */ - case 120 : /* fall through */ - case 121 : /* fall through */ - case 122 : /* fall through */ - case 123 : /* fall through */ - case 124 : /* fall through */ - case 125 : /* fall through */ - case 126 : /* fall through */ - case 127 : - { - unsigned int val = (((insn >> 8) & (7 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_BCL8;goto extract_sfmt_bcl8; - case 1 : itype = M32RXF_INSN_BNCL8;goto extract_sfmt_bcl8; - case 4 : itype = M32RXF_INSN_BC8;goto extract_sfmt_bc8; - case 5 : itype = M32RXF_INSN_BNC8;goto extract_sfmt_bc8; - case 6 : itype = M32RXF_INSN_BL8;goto extract_sfmt_bl8; - case 7 : itype = M32RXF_INSN_BRA8;goto extract_sfmt_bra8; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 132 : itype = M32RXF_INSN_CMPI;goto extract_sfmt_cmpi; - case 133 : itype = M32RXF_INSN_CMPUI;goto extract_sfmt_cmpi; - case 134 : - { - unsigned int val = (((insn >> -8) & (3 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_SAT;goto extract_sfmt_sat; - case 2 : itype = M32RXF_INSN_SATH;goto extract_sfmt_satb; - case 3 : itype = M32RXF_INSN_SATB;goto extract_sfmt_satb; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 136 : itype = M32RXF_INSN_ADDV3;goto extract_sfmt_addv3; - case 138 : itype = M32RXF_INSN_ADD3;goto extract_sfmt_add3; - case 140 : itype = M32RXF_INSN_AND3;goto extract_sfmt_and3; - case 141 : itype = M32RXF_INSN_XOR3;goto extract_sfmt_and3; - case 142 : itype = M32RXF_INSN_OR3;goto extract_sfmt_or3; - case 144 : - { - unsigned int val = (((insn >> -12) & (1 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_DIV;goto extract_sfmt_div; - case 1 : itype = M32RXF_INSN_DIVH;goto extract_sfmt_div; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - case 145 : itype = M32RXF_INSN_DIVU;goto extract_sfmt_div; - case 146 : itype = M32RXF_INSN_REM;goto extract_sfmt_div; - case 147 : itype = M32RXF_INSN_REMU;goto extract_sfmt_div; - case 152 : itype = M32RXF_INSN_SRL3;goto extract_sfmt_sll3; - case 154 : itype = M32RXF_INSN_SRA3;goto extract_sfmt_sll3; - case 156 : itype = M32RXF_INSN_SLL3;goto extract_sfmt_sll3; - case 159 : itype = M32RXF_INSN_LDI16;goto extract_sfmt_ldi16; - case 160 : itype = M32RXF_INSN_STB_D;goto extract_sfmt_stb_d; - case 162 : itype = M32RXF_INSN_STH_D;goto extract_sfmt_sth_d; - case 164 : itype = M32RXF_INSN_ST_D;goto extract_sfmt_st_d; - case 168 : itype = M32RXF_INSN_LDB_D;goto extract_sfmt_ldb_d; - case 169 : itype = M32RXF_INSN_LDUB_D;goto extract_sfmt_ldb_d; - case 170 : itype = M32RXF_INSN_LDH_D;goto extract_sfmt_ldh_d; - case 171 : itype = M32RXF_INSN_LDUH_D;goto extract_sfmt_ldh_d; - case 172 : itype = M32RXF_INSN_LD_D;goto extract_sfmt_ld_d; - case 176 : itype = M32RXF_INSN_BEQ;goto extract_sfmt_beq; - case 177 : itype = M32RXF_INSN_BNE;goto extract_sfmt_beq; - case 184 : itype = M32RXF_INSN_BEQZ;goto extract_sfmt_beqz; - case 185 : itype = M32RXF_INSN_BNEZ;goto extract_sfmt_beqz; - case 186 : itype = M32RXF_INSN_BLTZ;goto extract_sfmt_beqz; - case 187 : itype = M32RXF_INSN_BGEZ;goto extract_sfmt_beqz; - case 188 : itype = M32RXF_INSN_BLEZ;goto extract_sfmt_beqz; - case 189 : itype = M32RXF_INSN_BGTZ;goto extract_sfmt_beqz; - case 220 : itype = M32RXF_INSN_SETH;goto extract_sfmt_seth; - case 224 : /* fall through */ - case 225 : /* fall through */ - case 226 : /* fall through */ - case 227 : /* fall through */ - case 228 : /* fall through */ - case 229 : /* fall through */ - case 230 : /* fall through */ - case 231 : /* fall through */ - case 232 : /* fall through */ - case 233 : /* fall through */ - case 234 : /* fall through */ - case 235 : /* fall through */ - case 236 : /* fall through */ - case 237 : /* fall through */ - case 238 : /* fall through */ - case 239 : itype = M32RXF_INSN_LD24;goto extract_sfmt_ld24; - case 240 : /* fall through */ - case 241 : /* fall through */ - case 242 : /* fall through */ - case 243 : /* fall through */ - case 244 : /* fall through */ - case 245 : /* fall through */ - case 246 : /* fall through */ - case 247 : /* fall through */ - case 248 : /* fall through */ - case 249 : /* fall through */ - case 250 : /* fall through */ - case 251 : /* fall through */ - case 252 : /* fall through */ - case 253 : /* fall through */ - case 254 : /* fall through */ - case 255 : - { - unsigned int val = (((insn >> 8) & (7 << 0))); - switch (val) - { - case 0 : itype = M32RXF_INSN_BCL24;goto extract_sfmt_bcl24; - case 1 : itype = M32RXF_INSN_BNCL24;goto extract_sfmt_bcl24; - case 4 : itype = M32RXF_INSN_BC24;goto extract_sfmt_bc24; - case 5 : itype = M32RXF_INSN_BNC24;goto extract_sfmt_bc24; - case 6 : itype = M32RXF_INSN_BL24;goto extract_sfmt_bl24; - case 7 : itype = M32RXF_INSN_BRA24;goto extract_sfmt_bra24; - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - default : itype = M32RXF_INSN_X_INVALID; goto extract_sfmt_empty; - } - } - } - - /* The instruction has been decoded, now extract the fields. */ - - extract_sfmt_empty: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_add: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_add3: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_and3: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_and3.f - UINT f_r1; - UINT f_r2; - UINT f_uimm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_uimm16) = f_uimm16; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_or3: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_and3.f - UINT f_r1; - UINT f_r2; - UINT f_uimm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_uimm16) = f_uimm16; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addi: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_r1; - INT f_simm8; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_simm8) = f_simm8; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addv: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addv3: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_addx: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bc8: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bc24: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_beq: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_r1; - UINT f_r2; - SI f_disp16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_disp16) = f_disp16; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_beqz: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_beq.f - UINT f_r2; - SI f_disp16; - - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_disp16) = f_disp16; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bl8: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bl24: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bcl8: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bcl24: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bra8: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl8.f - SI f_disp8; - - f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); - - /* Record the fields for the semantic handler. */ - FLD (i_disp8) = f_disp8; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_bra24: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_bl24.f - SI f_disp24; - - f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); - - /* Record the fields for the semantic handler. */ - FLD (i_disp24) = f_disp24; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmp: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpi: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r2; - INT f_simm16; - - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_cmpz: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r2; - - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_div: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jc: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_jl.f - UINT f_r2; - - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jc", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jl: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_jl.f - UINT f_r2; - - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_h_gr_SI_14) = 14; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_jmp: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_jl.f - UINT f_r2; - - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_d: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldb: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldb_d: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldh: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldh_d: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld_plus: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - FLD (out_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ld24: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld24.f - UINT f_r1; - UINT f_uimm24; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (i_uimm24) = f_uimm24; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi8: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_addi.f - UINT f_r1; - INT f_simm8; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); - - /* Record the fields for the semantic handler. */ - FLD (f_simm8) = f_simm8; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_ldi16: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_lock: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_machi_a: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_machi_a.f - UINT f_r1; - UINT f_acc; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_acc) = f_acc; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulhi_a: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_machi_a.f - UINT f_r1; - UINT f_acc; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (f_acc) = f_acc; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "f_acc 0x%x", 'x', f_acc, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mv: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvfachi_a: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - UINT f_r1; - UINT f_accs; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); - - /* Record the fields for the semantic handler. */ - FLD (f_accs) = f_accs; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvfc: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvtachi_a: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f - UINT f_r1; - UINT f_accs; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); - - /* Record the fields for the semantic handler. */ - FLD (f_accs) = f_accs; - FLD (f_r1) = f_r1; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs, "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mvtc: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_nop: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_rac_dsi: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_rac_dsi.f - UINT f_accd; - UINT f_accs; - SI f_imm1; - - f_accd = EXTRACT_MSB0_UINT (insn, 16, 4, 2); - f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); - f_imm1 = ((EXTRACT_MSB0_UINT (insn, 16, 15, 1)) + (1)); - - /* Record the fields for the semantic handler. */ - FLD (f_accs) = f_accs; - FLD (f_imm1) = f_imm1; - FLD (f_accd) = f_accd; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs, "f_imm1 0x%x", 'x', f_imm1, "f_accd 0x%x", 'x', f_accd, (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_rte: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_seth: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_seth.f - UINT f_r1; - UINT f_hi16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_hi16) = f_hi16; - FLD (f_r1) = f_r1; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sll3: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_add3.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_slli: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_slli.f - UINT f_r1; - UINT f_uimm5; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_uimm5) = f_uimm5; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_dr) = f_r1; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_d: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stb: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_stb_d: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sth: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sth_d: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_d.f - UINT f_r1; - UINT f_r2; - INT f_simm16; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); - - /* Record the fields for the semantic handler. */ - FLD (f_simm16) = f_simm16; - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_st_plus: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - FLD (out_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_trap: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_trap.f - UINT f_uimm4; - - f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_uimm4) = f_uimm4; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_unlock: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_satb: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_satb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sat: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_ld_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r2) = f_r2; - FLD (f_r1) = f_r1; - FLD (i_sr) = & CPU (h_gr)[f_r2]; - FLD (i_dr) = & CPU (h_gr)[f_r1]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sat", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_sr) = f_r2; - FLD (out_dr) = f_r1; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sadd: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sadd", (char *) 0)); - -#undef FLD - return idesc; - } - - extract_sfmt_macwu1: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_msblo: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_mulwu1: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; - CGEN_INSN_INT insn = entire_insn; -#define FLD(f) abuf->fields.sfmt_st_plus.f - UINT f_r1; - UINT f_r2; - - f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); - f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); - - /* Record the fields for the semantic handler. */ - FLD (f_r1) = f_r1; - FLD (f_r2) = f_r2; - FLD (i_src1) = & CPU (h_gr)[f_r1]; - FLD (i_src2) = & CPU (h_gr)[f_r2]; - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); - -#if WITH_PROFILE_MODEL_P - /* Record the fields for profiling. */ - if (PROFILE_MODEL_P (current_cpu)) - { - FLD (in_src1) = f_r1; - FLD (in_src2) = f_r2; - } -#endif -#undef FLD - return idesc; - } - - extract_sfmt_sc: - { - const IDESC *idesc = &m32rxf_insn_data[itype]; -#define FLD(f) abuf->fields.fmt_empty.f - - - /* Record the fields for the semantic handler. */ - TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sc", (char *) 0)); - -#undef FLD - return idesc; - } - -} diff --git a/sim/m32r/decodex.h b/sim/m32r/decodex.h deleted file mode 100644 index 6394f03..0000000 --- a/sim/m32r/decodex.h +++ /dev/null @@ -1,144 +0,0 @@ -/* Decode header for m32rxf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef M32RXF_DECODE_H -#define M32RXF_DECODE_H - -extern const IDESC *m32rxf_decode (SIM_CPU *, IADDR, - CGEN_INSN_INT, CGEN_INSN_INT, - ARGBUF *); -extern void m32rxf_init_idesc_table (SIM_CPU *); -extern void m32rxf_sem_init_idesc_table (SIM_CPU *); -extern void m32rxf_semf_init_idesc_table (SIM_CPU *); - -/* Enum declaration for instructions in cpu family m32rxf. */ -typedef enum m32rxf_insn_type { - M32RXF_INSN_X_INVALID, M32RXF_INSN_X_AFTER, M32RXF_INSN_X_BEFORE, M32RXF_INSN_X_CTI_CHAIN - , M32RXF_INSN_X_CHAIN, M32RXF_INSN_X_BEGIN, M32RXF_INSN_ADD, M32RXF_INSN_ADD3 - , M32RXF_INSN_AND, M32RXF_INSN_AND3, M32RXF_INSN_OR, M32RXF_INSN_OR3 - , M32RXF_INSN_XOR, M32RXF_INSN_XOR3, M32RXF_INSN_ADDI, M32RXF_INSN_ADDV - , M32RXF_INSN_ADDV3, M32RXF_INSN_ADDX, M32RXF_INSN_BC8, M32RXF_INSN_BC24 - , M32RXF_INSN_BEQ, M32RXF_INSN_BEQZ, M32RXF_INSN_BGEZ, M32RXF_INSN_BGTZ - , M32RXF_INSN_BLEZ, M32RXF_INSN_BLTZ, M32RXF_INSN_BNEZ, M32RXF_INSN_BL8 - , M32RXF_INSN_BL24, M32RXF_INSN_BCL8, M32RXF_INSN_BCL24, M32RXF_INSN_BNC8 - , M32RXF_INSN_BNC24, M32RXF_INSN_BNE, M32RXF_INSN_BRA8, M32RXF_INSN_BRA24 - , M32RXF_INSN_BNCL8, M32RXF_INSN_BNCL24, M32RXF_INSN_CMP, M32RXF_INSN_CMPI - , M32RXF_INSN_CMPU, M32RXF_INSN_CMPUI, M32RXF_INSN_CMPEQ, M32RXF_INSN_CMPZ - , M32RXF_INSN_DIV, M32RXF_INSN_DIVU, M32RXF_INSN_REM, M32RXF_INSN_REMU - , M32RXF_INSN_DIVH, M32RXF_INSN_JC, M32RXF_INSN_JNC, M32RXF_INSN_JL - , M32RXF_INSN_JMP, M32RXF_INSN_LD, M32RXF_INSN_LD_D, M32RXF_INSN_LDB - , M32RXF_INSN_LDB_D, M32RXF_INSN_LDH, M32RXF_INSN_LDH_D, M32RXF_INSN_LDUB - , M32RXF_INSN_LDUB_D, M32RXF_INSN_LDUH, M32RXF_INSN_LDUH_D, M32RXF_INSN_LD_PLUS - , M32RXF_INSN_LD24, M32RXF_INSN_LDI8, M32RXF_INSN_LDI16, M32RXF_INSN_LOCK - , M32RXF_INSN_MACHI_A, M32RXF_INSN_MACLO_A, M32RXF_INSN_MACWHI_A, M32RXF_INSN_MACWLO_A - , M32RXF_INSN_MUL, M32RXF_INSN_MULHI_A, M32RXF_INSN_MULLO_A, M32RXF_INSN_MULWHI_A - , M32RXF_INSN_MULWLO_A, M32RXF_INSN_MV, M32RXF_INSN_MVFACHI_A, M32RXF_INSN_MVFACLO_A - , M32RXF_INSN_MVFACMI_A, M32RXF_INSN_MVFC, M32RXF_INSN_MVTACHI_A, M32RXF_INSN_MVTACLO_A - , M32RXF_INSN_MVTC, M32RXF_INSN_NEG, M32RXF_INSN_NOP, M32RXF_INSN_NOT - , M32RXF_INSN_RAC_DSI, M32RXF_INSN_RACH_DSI, M32RXF_INSN_RTE, M32RXF_INSN_SETH - , M32RXF_INSN_SLL, M32RXF_INSN_SLL3, M32RXF_INSN_SLLI, M32RXF_INSN_SRA - , M32RXF_INSN_SRA3, M32RXF_INSN_SRAI, M32RXF_INSN_SRL, M32RXF_INSN_SRL3 - , M32RXF_INSN_SRLI, M32RXF_INSN_ST, M32RXF_INSN_ST_D, M32RXF_INSN_STB - , M32RXF_INSN_STB_D, M32RXF_INSN_STH, M32RXF_INSN_STH_D, M32RXF_INSN_ST_PLUS - , M32RXF_INSN_ST_MINUS, M32RXF_INSN_SUB, M32RXF_INSN_SUBV, M32RXF_INSN_SUBX - , M32RXF_INSN_TRAP, M32RXF_INSN_UNLOCK, M32RXF_INSN_SATB, M32RXF_INSN_SATH - , M32RXF_INSN_SAT, M32RXF_INSN_PCMPBZ, M32RXF_INSN_SADD, M32RXF_INSN_MACWU1 - , M32RXF_INSN_MSBLO, M32RXF_INSN_MULWU1, M32RXF_INSN_MACLH1, M32RXF_INSN_SC - , M32RXF_INSN_SNC, M32RXF_INSN_PAR_ADD, M32RXF_INSN_WRITE_ADD, M32RXF_INSN_PAR_AND - , M32RXF_INSN_WRITE_AND, M32RXF_INSN_PAR_OR, M32RXF_INSN_WRITE_OR, M32RXF_INSN_PAR_XOR - , M32RXF_INSN_WRITE_XOR, M32RXF_INSN_PAR_ADDI, M32RXF_INSN_WRITE_ADDI, M32RXF_INSN_PAR_ADDV - , M32RXF_INSN_WRITE_ADDV, M32RXF_INSN_PAR_ADDX, M32RXF_INSN_WRITE_ADDX, M32RXF_INSN_PAR_BC8 - , M32RXF_INSN_WRITE_BC8, M32RXF_INSN_PAR_BL8, M32RXF_INSN_WRITE_BL8, M32RXF_INSN_PAR_BCL8 - , M32RXF_INSN_WRITE_BCL8, M32RXF_INSN_PAR_BNC8, M32RXF_INSN_WRITE_BNC8, M32RXF_INSN_PAR_BRA8 - , M32RXF_INSN_WRITE_BRA8, M32RXF_INSN_PAR_BNCL8, M32RXF_INSN_WRITE_BNCL8, M32RXF_INSN_PAR_CMP - , M32RXF_INSN_WRITE_CMP, M32RXF_INSN_PAR_CMPU, M32RXF_INSN_WRITE_CMPU, M32RXF_INSN_PAR_CMPEQ - , M32RXF_INSN_WRITE_CMPEQ, M32RXF_INSN_PAR_CMPZ, M32RXF_INSN_WRITE_CMPZ, M32RXF_INSN_PAR_JC - , M32RXF_INSN_WRITE_JC, M32RXF_INSN_PAR_JNC, M32RXF_INSN_WRITE_JNC, M32RXF_INSN_PAR_JL - , M32RXF_INSN_WRITE_JL, M32RXF_INSN_PAR_JMP, M32RXF_INSN_WRITE_JMP, M32RXF_INSN_PAR_LD - , M32RXF_INSN_WRITE_LD, M32RXF_INSN_PAR_LDB, M32RXF_INSN_WRITE_LDB, M32RXF_INSN_PAR_LDH - , M32RXF_INSN_WRITE_LDH, M32RXF_INSN_PAR_LDUB, M32RXF_INSN_WRITE_LDUB, M32RXF_INSN_PAR_LDUH - , M32RXF_INSN_WRITE_LDUH, M32RXF_INSN_PAR_LD_PLUS, M32RXF_INSN_WRITE_LD_PLUS, M32RXF_INSN_PAR_LDI8 - , M32RXF_INSN_WRITE_LDI8, M32RXF_INSN_PAR_LOCK, M32RXF_INSN_WRITE_LOCK, M32RXF_INSN_PAR_MACHI_A - , M32RXF_INSN_WRITE_MACHI_A, M32RXF_INSN_PAR_MACLO_A, M32RXF_INSN_WRITE_MACLO_A, M32RXF_INSN_PAR_MACWHI_A - , M32RXF_INSN_WRITE_MACWHI_A, M32RXF_INSN_PAR_MACWLO_A, M32RXF_INSN_WRITE_MACWLO_A, M32RXF_INSN_PAR_MUL - , M32RXF_INSN_WRITE_MUL, M32RXF_INSN_PAR_MULHI_A, M32RXF_INSN_WRITE_MULHI_A, M32RXF_INSN_PAR_MULLO_A - , M32RXF_INSN_WRITE_MULLO_A, M32RXF_INSN_PAR_MULWHI_A, M32RXF_INSN_WRITE_MULWHI_A, M32RXF_INSN_PAR_MULWLO_A - , M32RXF_INSN_WRITE_MULWLO_A, M32RXF_INSN_PAR_MV, M32RXF_INSN_WRITE_MV, M32RXF_INSN_PAR_MVFACHI_A - , M32RXF_INSN_WRITE_MVFACHI_A, M32RXF_INSN_PAR_MVFACLO_A, M32RXF_INSN_WRITE_MVFACLO_A, M32RXF_INSN_PAR_MVFACMI_A - , M32RXF_INSN_WRITE_MVFACMI_A, M32RXF_INSN_PAR_MVFC, M32RXF_INSN_WRITE_MVFC, M32RXF_INSN_PAR_MVTACHI_A - , M32RXF_INSN_WRITE_MVTACHI_A, M32RXF_INSN_PAR_MVTACLO_A, M32RXF_INSN_WRITE_MVTACLO_A, M32RXF_INSN_PAR_MVTC - , M32RXF_INSN_WRITE_MVTC, M32RXF_INSN_PAR_NEG, M32RXF_INSN_WRITE_NEG, M32RXF_INSN_PAR_NOP - , M32RXF_INSN_WRITE_NOP, M32RXF_INSN_PAR_NOT, M32RXF_INSN_WRITE_NOT, M32RXF_INSN_PAR_RAC_DSI - , M32RXF_INSN_WRITE_RAC_DSI, M32RXF_INSN_PAR_RACH_DSI, M32RXF_INSN_WRITE_RACH_DSI, M32RXF_INSN_PAR_RTE - , M32RXF_INSN_WRITE_RTE, M32RXF_INSN_PAR_SLL, M32RXF_INSN_WRITE_SLL, M32RXF_INSN_PAR_SLLI - , M32RXF_INSN_WRITE_SLLI, M32RXF_INSN_PAR_SRA, M32RXF_INSN_WRITE_SRA, M32RXF_INSN_PAR_SRAI - , M32RXF_INSN_WRITE_SRAI, M32RXF_INSN_PAR_SRL, M32RXF_INSN_WRITE_SRL, M32RXF_INSN_PAR_SRLI - , M32RXF_INSN_WRITE_SRLI, M32RXF_INSN_PAR_ST, M32RXF_INSN_WRITE_ST, M32RXF_INSN_PAR_STB - , M32RXF_INSN_WRITE_STB, M32RXF_INSN_PAR_STH, M32RXF_INSN_WRITE_STH, M32RXF_INSN_PAR_ST_PLUS - , M32RXF_INSN_WRITE_ST_PLUS, M32RXF_INSN_PAR_ST_MINUS, M32RXF_INSN_WRITE_ST_MINUS, M32RXF_INSN_PAR_SUB - , M32RXF_INSN_WRITE_SUB, M32RXF_INSN_PAR_SUBV, M32RXF_INSN_WRITE_SUBV, M32RXF_INSN_PAR_SUBX - , M32RXF_INSN_WRITE_SUBX, M32RXF_INSN_PAR_TRAP, M32RXF_INSN_WRITE_TRAP, M32RXF_INSN_PAR_UNLOCK - , M32RXF_INSN_WRITE_UNLOCK, M32RXF_INSN_PAR_PCMPBZ, M32RXF_INSN_WRITE_PCMPBZ, M32RXF_INSN_PAR_SADD - , M32RXF_INSN_WRITE_SADD, M32RXF_INSN_PAR_MACWU1, M32RXF_INSN_WRITE_MACWU1, M32RXF_INSN_PAR_MSBLO - , M32RXF_INSN_WRITE_MSBLO, M32RXF_INSN_PAR_MULWU1, M32RXF_INSN_WRITE_MULWU1, M32RXF_INSN_PAR_MACLH1 - , M32RXF_INSN_WRITE_MACLH1, M32RXF_INSN_PAR_SC, M32RXF_INSN_WRITE_SC, M32RXF_INSN_PAR_SNC - , M32RXF_INSN_WRITE_SNC, M32RXF_INSN_MAX -} M32RXF_INSN_TYPE; - -/* Enum declaration for semantic formats in cpu family m32rxf. */ -typedef enum m32rxf_sfmt_type { - M32RXF_SFMT_EMPTY, M32RXF_SFMT_ADD, M32RXF_SFMT_ADD3, M32RXF_SFMT_AND3 - , M32RXF_SFMT_OR3, M32RXF_SFMT_ADDI, M32RXF_SFMT_ADDV, M32RXF_SFMT_ADDV3 - , M32RXF_SFMT_ADDX, M32RXF_SFMT_BC8, M32RXF_SFMT_BC24, M32RXF_SFMT_BEQ - , M32RXF_SFMT_BEQZ, M32RXF_SFMT_BL8, M32RXF_SFMT_BL24, M32RXF_SFMT_BCL8 - , M32RXF_SFMT_BCL24, M32RXF_SFMT_BRA8, M32RXF_SFMT_BRA24, M32RXF_SFMT_CMP - , M32RXF_SFMT_CMPI, M32RXF_SFMT_CMPZ, M32RXF_SFMT_DIV, M32RXF_SFMT_JC - , M32RXF_SFMT_JL, M32RXF_SFMT_JMP, M32RXF_SFMT_LD, M32RXF_SFMT_LD_D - , M32RXF_SFMT_LDB, M32RXF_SFMT_LDB_D, M32RXF_SFMT_LDH, M32RXF_SFMT_LDH_D - , M32RXF_SFMT_LD_PLUS, M32RXF_SFMT_LD24, M32RXF_SFMT_LDI8, M32RXF_SFMT_LDI16 - , M32RXF_SFMT_LOCK, M32RXF_SFMT_MACHI_A, M32RXF_SFMT_MULHI_A, M32RXF_SFMT_MV - , M32RXF_SFMT_MVFACHI_A, M32RXF_SFMT_MVFC, M32RXF_SFMT_MVTACHI_A, M32RXF_SFMT_MVTC - , M32RXF_SFMT_NOP, M32RXF_SFMT_RAC_DSI, M32RXF_SFMT_RTE, M32RXF_SFMT_SETH - , M32RXF_SFMT_SLL3, M32RXF_SFMT_SLLI, M32RXF_SFMT_ST, M32RXF_SFMT_ST_D - , M32RXF_SFMT_STB, M32RXF_SFMT_STB_D, M32RXF_SFMT_STH, M32RXF_SFMT_STH_D - , M32RXF_SFMT_ST_PLUS, M32RXF_SFMT_TRAP, M32RXF_SFMT_UNLOCK, M32RXF_SFMT_SATB - , M32RXF_SFMT_SAT, M32RXF_SFMT_SADD, M32RXF_SFMT_MACWU1, M32RXF_SFMT_MSBLO - , M32RXF_SFMT_MULWU1, M32RXF_SFMT_SC -} M32RXF_SFMT_TYPE; - -/* Function unit handlers (user written). */ - -extern int m32rxf_model_m32rx_u_store (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/); -extern int m32rxf_model_m32rx_u_load (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/); -extern int m32rxf_model_m32rx_u_cti (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/); -extern int m32rxf_model_m32rx_u_mac (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/); -extern int m32rxf_model_m32rx_u_cmp (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*src1*/, INT /*src2*/); -extern int m32rxf_model_m32rx_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/, INT /*sr*/, INT /*dr*/, INT /*dr*/); - -/* Profiling before/after handlers (user written) */ - -extern void m32rxf_model_insn_before (SIM_CPU *, int /*first_p*/); -extern void m32rxf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/); - -#endif /* M32RXF_DECODE_H */ diff --git a/sim/m32r/devices.c b/sim/m32r/devices.c deleted file mode 100644 index 032c8e7..0000000 --- a/sim/m32r/devices.c +++ /dev/null @@ -1,107 +0,0 @@ -/* m32r device support - Copyright (C) 1997, 1998 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" - -#ifdef HAVE_DV_SOCKSER -#include "dv-sockser.h" -#endif - -/* Handling the MSPR register is done by creating a device in the core - mapping that winds up here. */ - -device m32r_devices; - -int -device_io_read_buffer (device *me, void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#ifdef HAVE_DV_SOCKSER - if (addr == UART_INCHAR_ADDR) - { - int c = dv_sockser_read (sd); - if (c == -1) - return 0; - *(char *) source = c; - return 1; - } - if (addr == UART_STATUS_ADDR) - { - int status = dv_sockser_status (sd); - unsigned char *p = source; - p[0] = 0; - p[1] = (((status & DV_SOCKSER_INPUT_EMPTY) -#ifdef UART_INPUT_READY0 - ? UART_INPUT_READY : 0) -#else - ? 0 : UART_INPUT_READY) -#endif - + ((status & DV_SOCKSER_OUTPUT_EMPTY) ? UART_OUTPUT_READY : 0)); - return 2; - } -#endif - - return nr_bytes; -} - -int -device_io_write_buffer (device *me, const void *source, int space, - address_word addr, unsigned nr_bytes, - SIM_DESC sd, SIM_CPU *cpu, sim_cia cia) -{ -#if WITH_SCACHE - /* MSPR support is deprecated but is kept in for upward compatibility - with existing overlay support. */ - if (addr == MSPR_ADDR) - { - if ((*(const char *) source & MSPR_PURGE) != 0) - scache_flush (sd); - return nr_bytes; - } - if (addr == MCCR_ADDR) - { - if ((*(const char *) source & MCCR_CP) != 0) - scache_flush (sd); - return nr_bytes; - } -#endif - - if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT) - return nr_bytes; - -#ifdef HAVE_DV_SOCKSER - if (addr == UART_OUTCHAR_ADDR) - { - int rc = dv_sockser_write (sd, *(char *) source); - return rc == 1; - } -#endif - - return nr_bytes; -} - -void -device_error (device *me, char *message, ...) -{ -} diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h deleted file mode 100644 index b1c2410..0000000 --- a/sim/m32r/m32r-sim.h +++ /dev/null @@ -1,231 +0,0 @@ -/* collection of junk waiting time to sort out - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of the GNU Simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef M32R_SIM_H -#define M32R_SIM_H - -/* gdb register numbers */ -#define PSW_REGNUM 16 -#define CBR_REGNUM 17 -#define SPI_REGNUM 18 -#define SPU_REGNUM 19 -#define BPC_REGNUM 20 -#define PC_REGNUM 21 -#define ACCL_REGNUM 22 -#define ACCH_REGNUM 23 -#define ACC1L_REGNUM 24 -#define ACC1H_REGNUM 25 -#define BBPSW_REGNUM 26 -#define BBPC_REGNUM 27 - -extern int m32r_decode_gdb_ctrl_regnum (int); - -/* Cover macros for hardware accesses. - FIXME: Eventually move to cgen. */ -#define GET_H_SM() ((CPU (h_psw) & 0x80) != 0) - -extern SI a_m32r_h_gr_get (SIM_CPU *, UINT); -extern void a_m32r_h_gr_set (SIM_CPU *, UINT, SI); -extern USI a_m32r_h_cr_get (SIM_CPU *, UINT); -extern void a_m32r_h_cr_set (SIM_CPU *, UINT, USI); - -extern USI m32rbf_h_cr_get_handler (SIM_CPU *, UINT); -extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI); - -extern UQI m32rbf_h_psw_get_handler (SIM_CPU *); -extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI); - -extern DI m32rbf_h_accum_get_handler (SIM_CPU *); -extern void m32rbf_h_accum_set_handler (SIM_CPU *, DI); - -extern USI m32rxf_h_cr_get_handler (SIM_CPU *, UINT); -extern void m32rxf_h_cr_set_handler (SIM_CPU *, UINT, USI); -extern UQI m32rxf_h_psw_get_handler (SIM_CPU *); -extern void m32rxf_h_psw_set_handler (SIM_CPU *, UQI); -extern DI m32rxf_h_accum_get_handler (SIM_CPU *); -extern void m32rxf_h_accum_set_handler (SIM_CPU *, DI); - -extern DI m32rxf_h_accums_get_handler (SIM_CPU *, UINT); -extern void m32rxf_h_accums_set_handler (SIM_CPU *, UINT, DI); - -/* Misc. profile data. */ - -typedef struct { - /* nop insn slot filler count */ - unsigned int fillnop_count; - /* number of parallel insns */ - unsigned int parallel_count; - - /* FIXME: generalize this to handle all insn lengths, move to common. */ - /* number of short insns, not including parallel ones */ - unsigned int short_count; - /* number of long insns */ - unsigned int long_count; - - /* Working area for computing cycle counts. */ - unsigned long insn_cycles; /* FIXME: delete */ - unsigned long cti_stall; - unsigned long load_stall; - unsigned long biggest_cycles; - - /* Bitmask of registers loaded by previous insn. */ - unsigned int load_regs; - /* Bitmask of registers loaded by current insn. */ - unsigned int load_regs_pending; -} M32R_MISC_PROFILE; - -/* Initialize the working area. */ -void m32r_init_insn_cycles (SIM_CPU *, int); -/* Update the totals for the insn. */ -void m32r_record_insn_cycles (SIM_CPU *, int); - -/* This is invoked by the nop pattern in the .cpu file. */ -#define PROFILE_COUNT_FILLNOPS(cpu, addr) \ -do { \ - if (PROFILE_INSN_P (cpu) \ - && (addr & 3) != 0) \ - ++ CPU_M32R_MISC_PROFILE (cpu)->fillnop_count; \ -} while (0) - -/* This is invoked by the execute section of mloop{,x}.in. */ -#define PROFILE_COUNT_PARINSNS(cpu) \ -do { \ - if (PROFILE_INSN_P (cpu)) \ - ++ CPU_M32R_MISC_PROFILE (cpu)->parallel_count; \ -} while (0) - -/* This is invoked by the execute section of mloop{,x}.in. */ -#define PROFILE_COUNT_SHORTINSNS(cpu) \ -do { \ - if (PROFILE_INSN_P (cpu)) \ - ++ CPU_M32R_MISC_PROFILE (cpu)->short_count; \ -} while (0) - -/* This is invoked by the execute section of mloop{,x}.in. */ -#define PROFILE_COUNT_LONGINSNS(cpu) \ -do { \ - if (PROFILE_INSN_P (cpu)) \ - ++ CPU_M32R_MISC_PROFILE (cpu)->long_count; \ -} while (0) - -#define GETTWI GETTSI -#define SETTWI SETTSI - -/* Additional execution support. */ - -/* Result of semantic function is one of - - next address, branch only - - NEW_PC_SKIP, sc/snc insn - - NEW_PC_2, 2 byte non-branch non-sc/snc insn - - NEW_PC_4, 4 byte non-branch insn - The special values have bit 1 set so it's cheap to distinguish them. - This works because all cti's are defined to zero the bottom two bits - Note that the m32rx no longer doesn't implement its semantics with - functions, so this isn't used. It's kept around should it be needed - again. */ -/* FIXME: replace 0xffff0001 with 1? */ -#define NEW_PC_BASE 0xffff0001 -#define NEW_PC_SKIP NEW_PC_BASE -#define NEW_PC_2 (NEW_PC_BASE + 2) -#define NEW_PC_4 (NEW_PC_BASE + 4) -#define NEW_PC_BRANCH_P(addr) (((addr) & 1) == 0) - -/* Modify "next pc" support to handle parallel execution. - This is for the non-pbb case. The m32rx no longer implements this. - It's kept around should it be needed again. */ -#if defined (WANT_CPU_M32RXF) && ! WITH_SCACHE_PBB_M32RXF -#undef SEM_NEXT_VPC -#define SEM_NEXT_VPC(abuf, len) (NEW_PC_BASE + (len)) -#undef SEM_SKIP_INSN -#define SEM_SKIP_INSN(cpu, sc, vpcvar, yes) FIXME -#endif - -/* Hardware/device support. - ??? Will eventually want to move device stuff to config files. */ - -/* Exception, Interrupt, and Trap addresses */ -#define EIT_SYSBREAK_ADDR 0x10 -#define EIT_RSVD_INSN_ADDR 0x20 -#define EIT_ADDR_EXCP_ADDR 0x30 -#define EIT_TRAP_BASE_ADDR 0x40 -#define EIT_EXTERN_ADDR 0x80 -#define EIT_RESET_ADDR 0x7ffffff0 -#define EIT_WAKEUP_ADDR 0x7ffffff0 - -/* Special purpose traps. */ -#define TRAP_SYSCALL 0 -#define TRAP_BREAKPOINT 1 - -/* Support for the MSPR register (Cache Purge Control Register) - and the MCCR register (Cache Control Register) are needed in order for - overlays to work correctly with the scache. - MSPR no longer exists but is supported for upward compatibility with - early overlay support. */ - -/* Cache Purge Control (only exists on early versions of chips) */ -#define MSPR_ADDR 0xfffffff7 -#define MSPR_PURGE 1 - -/* Lock Control Register (not supported) */ -#define MLCR_ADDR 0xfffffff7 -#define MLCR_LM 1 - -/* Power Management Control Register (not supported) */ -#define MPMR_ADDR 0xfffffffb - -/* Cache Control Register */ -#define MCCR_ADDR 0xffffffff -#define MCCR_CP 0x80 -/* not supported */ -#define MCCR_CM0 2 -#define MCCR_CM1 1 - -/* Serial device addresses. */ -#ifdef M32R_EVA /* orig eva board, no longer supported */ -#define UART_INCHAR_ADDR 0xff102013 -#define UART_OUTCHAR_ADDR 0xff10200f -#define UART_STATUS_ADDR 0xff102006 -/* Indicate ready bit is inverted. */ -#define UART_INPUT_READY0 -#else -/* These are the values for the MSA2000 board. - ??? Will eventually need to move this to a config file. */ -#define UART_INCHAR_ADDR 0xff004009 -#define UART_OUTCHAR_ADDR 0xff004007 -#define UART_STATUS_ADDR 0xff004002 -#endif - -#define UART_INPUT_READY 0x4 -#define UART_OUTPUT_READY 0x1 - -/* Start address and length of all device support. */ -#define M32R_DEVICE_ADDR 0xff000000 -#define M32R_DEVICE_LEN 0x01000000 - -/* sim_core_attach device argument. */ -extern device m32r_devices; - -/* FIXME: Temporary, until device support ready. */ -struct _device { int foo; }; - -/* Handle the trap insn. */ -USI m32r_trap (SIM_CPU *, PCADDR, int); - -#endif /* M32R_SIM_H */ diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c deleted file mode 100644 index 3e5e4aa..0000000 --- a/sim/m32r/m32r.c +++ /dev/null @@ -1,521 +0,0 @@ -/* m32r simulator support code - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#define WANT_CPU m32rbf -#define WANT_CPU_M32RBF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -/* Decode gdb ctrl register number. */ - -int -m32r_decode_gdb_ctrl_regnum (int gdb_regnum) -{ - switch (gdb_regnum) - { - case PSW_REGNUM : return H_CR_PSW; - case CBR_REGNUM : return H_CR_CBR; - case SPI_REGNUM : return H_CR_SPI; - case SPU_REGNUM : return H_CR_SPU; - case BPC_REGNUM : return H_CR_BPC; - case BBPSW_REGNUM : return H_CR_BBPSW; - case BBPC_REGNUM : return H_CR_BBPC; - } - abort (); -} - -/* The contents of BUF are in target byte order. */ - -int -m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - int mach = MACH_NUM (CPU_MACH (current_cpu)); - - if (rn < 16) - SETTWI (buf, a_m32r_h_gr_get (current_cpu, rn)); - else - switch (rn) - { - case PSW_REGNUM : - case CBR_REGNUM : - case SPI_REGNUM : - case SPU_REGNUM : - case BPC_REGNUM : - case BBPSW_REGNUM : - case BBPC_REGNUM : - SETTWI (buf, a_m32r_h_cr_get (current_cpu, - m32r_decode_gdb_ctrl_regnum (rn))); - break; - case PC_REGNUM : - if (mach == MACH_M32R) - SETTWI (buf, m32rbf_h_pc_get (current_cpu)); - else - SETTWI (buf, m32rxf_h_pc_get (current_cpu)); - break; - case ACCL_REGNUM : - if (mach == MACH_M32R) - SETTWI (buf, GETLODI (m32rbf_h_accum_get (current_cpu))); - else - SETTWI (buf, GETLODI (m32rxf_h_accum_get (current_cpu))); - break; - case ACCH_REGNUM : - if (mach == MACH_M32R) - SETTWI (buf, GETHIDI (m32rbf_h_accum_get (current_cpu))); - else - SETTWI (buf, GETHIDI (m32rxf_h_accum_get (current_cpu))); - break; - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* The contents of BUF are in target byte order. */ - -int -m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - int mach = MACH_NUM (CPU_MACH (current_cpu)); - - if (rn < 16) - a_m32r_h_gr_set (current_cpu, rn, GETTWI (buf)); - else - switch (rn) - { - case PSW_REGNUM : - case CBR_REGNUM : - case SPI_REGNUM : - case SPU_REGNUM : - case BPC_REGNUM : - case BBPSW_REGNUM : - case BBPC_REGNUM : - a_m32r_h_cr_set (current_cpu, - m32r_decode_gdb_ctrl_regnum (rn), - GETTWI (buf)); - break; - case PC_REGNUM : - if (mach == MACH_M32R) - m32rbf_h_pc_set (current_cpu, GETTWI (buf)); - else - m32rxf_h_pc_set (current_cpu, GETTWI (buf)); - break; - case ACCL_REGNUM : - { - DI val; - if (mach == MACH_M32R) - val = m32rbf_h_accum_get (current_cpu); - else - val = m32rxf_h_accum_get (current_cpu); - SETLODI (val, GETTWI (buf)); - if (mach == MACH_M32R) - m32rbf_h_accum_set (current_cpu, val); - else - m32rxf_h_accum_set (current_cpu, val); - break; - } - case ACCH_REGNUM : - { - DI val; - if (mach == MACH_M32R) - val = m32rbf_h_accum_get (current_cpu); - else - val = m32rxf_h_accum_get (current_cpu); - SETHIDI (val, GETTWI (buf)); - if (mach == MACH_M32R) - m32rbf_h_accum_set (current_cpu, val); - else - m32rxf_h_accum_set (current_cpu, val); - break; - } - default : - return 0; - } - - return -1; /*FIXME*/ -} - -/* Cover fns for mach independent register accesses. */ - -SI -a_m32r_h_gr_get (SIM_CPU *current_cpu, UINT regno) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_M32RBF - case MACH_M32R : - return m32rbf_h_gr_get (current_cpu, regno); -#endif -#ifdef HAVE_CPU_M32RXF - case MACH_M32RX : - return m32rxf_h_gr_get (current_cpu, regno); -#endif - default : - abort (); - } -} - -void -a_m32r_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_M32RBF - case MACH_M32R : - m32rbf_h_gr_set (current_cpu, regno, newval); - break; -#endif -#ifdef HAVE_CPU_M32RXF - case MACH_M32RX : - m32rxf_h_gr_set (current_cpu, regno, newval); - break; -#endif - default : - abort (); - } -} - -USI -a_m32r_h_cr_get (SIM_CPU *current_cpu, UINT regno) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_M32RBF - case MACH_M32R : - return m32rbf_h_cr_get (current_cpu, regno); -#endif -#ifdef HAVE_CPU_M32RXF - case MACH_M32RX : - return m32rxf_h_cr_get (current_cpu, regno); -#endif - default : - abort (); - } -} - -void -a_m32r_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval) -{ - switch (MACH_NUM (CPU_MACH (current_cpu))) - { -#ifdef HAVE_CPU_M32RBF - case MACH_M32R : - m32rbf_h_cr_set (current_cpu, regno, newval); - break; -#endif -#ifdef HAVE_CPU_M32RXF - case MACH_M32RX : - m32rxf_h_cr_set (current_cpu, regno, newval); - break; -#endif - default : - abort (); - } -} - -USI -m32rbf_h_cr_get_handler (SIM_CPU *current_cpu, UINT cr) -{ - switch (cr) - { - case H_CR_PSW : /* psw */ - return (((CPU (h_bpsw) & 0xc1) << 8) - | ((CPU (h_psw) & 0xc0) << 0) - | GET_H_COND ()); - case H_CR_BBPSW : /* backup backup psw */ - return CPU (h_bbpsw) & 0xc1; - case H_CR_CBR : /* condition bit */ - return GET_H_COND (); - case H_CR_SPI : /* interrupt stack pointer */ - if (! GET_H_SM ()) - return CPU (h_gr[H_GR_SP]); - else - return CPU (h_cr[H_CR_SPI]); - case H_CR_SPU : /* user stack pointer */ - if (GET_H_SM ()) - return CPU (h_gr[H_GR_SP]); - else - return CPU (h_cr[H_CR_SPU]); - case H_CR_BPC : /* backup pc */ - return CPU (h_cr[H_CR_BPC]) & 0xfffffffe; - case H_CR_BBPC : /* backup backup pc */ - return CPU (h_cr[H_CR_BBPC]) & 0xfffffffe; - case 4 : /* ??? unspecified, but apparently available */ - case 5 : /* ??? unspecified, but apparently available */ - return CPU (h_cr[cr]); - default : - return 0; - } -} - -void -m32rbf_h_cr_set_handler (SIM_CPU *current_cpu, UINT cr, USI newval) -{ - switch (cr) - { - case H_CR_PSW : /* psw */ - { - int old_sm = (CPU (h_psw) & 0x80) != 0; - int new_sm = (newval & 0x80) != 0; - CPU (h_bpsw) = (newval >> 8) & 0xff; - CPU (h_psw) = newval & 0xff; - SET_H_COND (newval & 1); - /* When switching stack modes, update the registers. */ - if (old_sm != new_sm) - { - if (old_sm) - { - /* Switching user -> system. */ - CPU (h_cr[H_CR_SPU]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPI]); - } - else - { - /* Switching system -> user. */ - CPU (h_cr[H_CR_SPI]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPU]); - } - } - break; - } - case H_CR_BBPSW : /* backup backup psw */ - CPU (h_bbpsw) = newval & 0xff; - break; - case H_CR_CBR : /* condition bit */ - SET_H_COND (newval & 1); - break; - case H_CR_SPI : /* interrupt stack pointer */ - if (! GET_H_SM ()) - CPU (h_gr[H_GR_SP]) = newval; - else - CPU (h_cr[H_CR_SPI]) = newval; - break; - case H_CR_SPU : /* user stack pointer */ - if (GET_H_SM ()) - CPU (h_gr[H_GR_SP]) = newval; - else - CPU (h_cr[H_CR_SPU]) = newval; - break; - case H_CR_BPC : /* backup pc */ - CPU (h_cr[H_CR_BPC]) = newval; - break; - case H_CR_BBPC : /* backup backup pc */ - CPU (h_cr[H_CR_BBPC]) = newval; - break; - case 4 : /* ??? unspecified, but apparently available */ - case 5 : /* ??? unspecified, but apparently available */ - CPU (h_cr[cr]) = newval; - break; - default : - /* ignore */ - break; - } -} - -/* Cover fns to access h-psw. */ - -UQI -m32rbf_h_psw_get_handler (SIM_CPU *current_cpu) -{ - return (CPU (h_psw) & 0xfe) | (CPU (h_cond) & 1); -} - -void -m32rbf_h_psw_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - CPU (h_psw) = newval; - CPU (h_cond) = newval & 1; -} - -/* Cover fns to access h-accum. */ - -DI -m32rbf_h_accum_get_handler (SIM_CPU *current_cpu) -{ - /* Sign extend the top 8 bits. */ - DI r; -#if 1 - r = ANDDI (CPU (h_accum), MAKEDI (0xffffff, 0xffffffff)); - r = XORDI (r, MAKEDI (0x800000, 0)); - r = SUBDI (r, MAKEDI (0x800000, 0)); -#else - SI hi,lo; - r = CPU (h_accum); - hi = GETHIDI (r); - lo = GETLODI (r); - hi = ((hi & 0xffffff) ^ 0x800000) - 0x800000; - r = MAKEDI (hi, lo); -#endif - return r; -} - -void -m32rbf_h_accum_set_handler (SIM_CPU *current_cpu, DI newval) -{ - CPU (h_accum) = newval; -} - -#if WITH_PROFILE_MODEL_P - -/* FIXME: Some of these should be inline or macros. Later. */ - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -m32rbf_model_insn_before (SIM_CPU *cpu, int first_p) -{ - M32R_MISC_PROFILE *mp = CPU_M32R_MISC_PROFILE (cpu); - mp->cti_stall = 0; - mp->load_stall = 0; - if (first_p) - { - mp->load_regs_pending = 0; - mp->biggest_cycles = 0; - } -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. - CYCLES is the cycle count of the insn. */ - -void -m32rbf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) -{ - PROFILE_DATA *p = CPU_PROFILE_DATA (cpu); - M32R_MISC_PROFILE *mp = CPU_M32R_MISC_PROFILE (cpu); - unsigned long total = cycles + mp->cti_stall + mp->load_stall; - - if (last_p) - { - unsigned long biggest = total > mp->biggest_cycles ? total : mp->biggest_cycles; - PROFILE_MODEL_TOTAL_CYCLES (p) += biggest; - PROFILE_MODEL_CUR_INSN_CYCLES (p) = total; - } - else - { - /* Here we take advantage of the fact that !last_p -> first_p. */ - mp->biggest_cycles = total; - PROFILE_MODEL_CUR_INSN_CYCLES (p) = total; - } - - /* Branch and load stall counts are recorded independently of the - total cycle count. */ - PROFILE_MODEL_CTI_STALL_CYCLES (p) += mp->cti_stall; - PROFILE_MODEL_LOAD_STALL_CYCLES (p) += mp->load_stall; - - mp->load_regs = mp->load_regs_pending; -} - -static INLINE void -check_load_stall (SIM_CPU *cpu, int regno) -{ - UINT h_gr = CPU_M32R_MISC_PROFILE (cpu)->load_regs; - - if (regno != -1 - && (h_gr & (1 << regno)) != 0) - { - CPU_M32R_MISC_PROFILE (cpu)->load_stall += 2; - if (TRACE_INSN_P (cpu)) - cgen_trace_printf (cpu, " ; Load stall of 2 cycles."); - } -} - -int -m32rbf_model_m32r_d_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT sr, INT sr2, INT dr) -{ - check_load_stall (cpu, sr); - check_load_stall (cpu, sr2); - return idesc->timing->units[unit_num].done; -} - -int -m32rbf_model_m32r_d_u_cmp (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT src1, INT src2) -{ - check_load_stall (cpu, src1); - check_load_stall (cpu, src2); - return idesc->timing->units[unit_num].done; -} - -int -m32rbf_model_m32r_d_u_mac (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT src1, INT src2) -{ - check_load_stall (cpu, src1); - check_load_stall (cpu, src2); - return idesc->timing->units[unit_num].done; -} - -int -m32rbf_model_m32r_d_u_cti (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT sr) -{ - PROFILE_DATA *profile = CPU_PROFILE_DATA (cpu); - int taken_p = (referenced & (1 << 1)) != 0; - - check_load_stall (cpu, sr); - if (taken_p) - { - CPU_M32R_MISC_PROFILE (cpu)->cti_stall += 2; - PROFILE_MODEL_TAKEN_COUNT (profile) += 1; - } - else - PROFILE_MODEL_UNTAKEN_COUNT (profile) += 1; - return idesc->timing->units[unit_num].done; -} - -int -m32rbf_model_m32r_d_u_load (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT sr, INT dr) -{ - CPU_M32R_MISC_PROFILE (cpu)->load_regs_pending |= (1 << dr); - check_load_stall (cpu, sr); - return idesc->timing->units[unit_num].done; -} - -int -m32rbf_model_m32r_d_u_store (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT src1, INT src2) -{ - check_load_stall (cpu, src1); - check_load_stall (cpu, src2); - return idesc->timing->units[unit_num].done; -} - -int -m32rbf_model_test_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced) -{ - return idesc->timing->units[unit_num].done; -} - -#endif /* WITH_PROFILE_MODEL_P */ diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c deleted file mode 100644 index cb319f6..0000000 --- a/sim/m32r/m32rx.c +++ /dev/null @@ -1,311 +0,0 @@ -/* m32rx simulator support code - Copyright (C) 1997, 1998 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#define WANT_CPU m32rxf -#define WANT_CPU_M32RXF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -/* The contents of BUF are in target byte order. */ - -int -m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - return m32rbf_fetch_register (current_cpu, rn, buf, len); -} - -/* The contents of BUF are in target byte order. */ - -int -m32rxf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) -{ - return m32rbf_store_register (current_cpu, rn, buf, len); -} - -/* Cover fns to get/set the control registers. - FIXME: Duplicated from m32r.c. The issue is structure offsets. */ - -USI -m32rxf_h_cr_get_handler (SIM_CPU *current_cpu, UINT cr) -{ - switch (cr) - { - case H_CR_PSW : /* psw */ - return (((CPU (h_bpsw) & 0xc1) << 8) - | ((CPU (h_psw) & 0xc0) << 0) - | GET_H_COND ()); - case H_CR_BBPSW : /* backup backup psw */ - return CPU (h_bbpsw) & 0xc1; - case H_CR_CBR : /* condition bit */ - return GET_H_COND (); - case H_CR_SPI : /* interrupt stack pointer */ - if (! GET_H_SM ()) - return CPU (h_gr[H_GR_SP]); - else - return CPU (h_cr[H_CR_SPI]); - case H_CR_SPU : /* user stack pointer */ - if (GET_H_SM ()) - return CPU (h_gr[H_GR_SP]); - else - return CPU (h_cr[H_CR_SPU]); - case H_CR_BPC : /* backup pc */ - return CPU (h_cr[H_CR_BPC]) & 0xfffffffe; - case H_CR_BBPC : /* backup backup pc */ - return CPU (h_cr[H_CR_BBPC]) & 0xfffffffe; - case 4 : /* ??? unspecified, but apparently available */ - case 5 : /* ??? unspecified, but apparently available */ - return CPU (h_cr[cr]); - default : - return 0; - } -} - -void -m32rxf_h_cr_set_handler (SIM_CPU *current_cpu, UINT cr, USI newval) -{ - switch (cr) - { - case H_CR_PSW : /* psw */ - { - int old_sm = (CPU (h_psw) & 0x80) != 0; - int new_sm = (newval & 0x80) != 0; - CPU (h_bpsw) = (newval >> 8) & 0xff; - CPU (h_psw) = newval & 0xff; - SET_H_COND (newval & 1); - /* When switching stack modes, update the registers. */ - if (old_sm != new_sm) - { - if (old_sm) - { - /* Switching user -> system. */ - CPU (h_cr[H_CR_SPU]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPI]); - } - else - { - /* Switching system -> user. */ - CPU (h_cr[H_CR_SPI]) = CPU (h_gr[H_GR_SP]); - CPU (h_gr[H_GR_SP]) = CPU (h_cr[H_CR_SPU]); - } - } - break; - } - case H_CR_BBPSW : /* backup backup psw */ - CPU (h_bbpsw) = newval & 0xff; - break; - case H_CR_CBR : /* condition bit */ - SET_H_COND (newval & 1); - break; - case H_CR_SPI : /* interrupt stack pointer */ - if (! GET_H_SM ()) - CPU (h_gr[H_GR_SP]) = newval; - else - CPU (h_cr[H_CR_SPI]) = newval; - break; - case H_CR_SPU : /* user stack pointer */ - if (GET_H_SM ()) - CPU (h_gr[H_GR_SP]) = newval; - else - CPU (h_cr[H_CR_SPU]) = newval; - break; - case H_CR_BPC : /* backup pc */ - CPU (h_cr[H_CR_BPC]) = newval; - break; - case H_CR_BBPC : /* backup backup pc */ - CPU (h_cr[H_CR_BBPC]) = newval; - break; - case 4 : /* ??? unspecified, but apparently available */ - case 5 : /* ??? unspecified, but apparently available */ - CPU (h_cr[cr]) = newval; - break; - default : - /* ignore */ - break; - } -} - -/* Cover fns to access h-psw. */ - -UQI -m32rxf_h_psw_get_handler (SIM_CPU *current_cpu) -{ - return (CPU (h_psw) & 0xfe) | (CPU (h_cond) & 1); -} - -void -m32rxf_h_psw_set_handler (SIM_CPU *current_cpu, UQI newval) -{ - CPU (h_psw) = newval; - CPU (h_cond) = newval & 1; -} - -/* Cover fns to access h-accum. */ - -DI -m32rxf_h_accum_get_handler (SIM_CPU *current_cpu) -{ - /* Sign extend the top 8 bits. */ - DI r; - r = ANDDI (CPU (h_accum), MAKEDI (0xffffff, 0xffffffff)); - r = XORDI (r, MAKEDI (0x800000, 0)); - r = SUBDI (r, MAKEDI (0x800000, 0)); - return r; -} - -void -m32rxf_h_accum_set_handler (SIM_CPU *current_cpu, DI newval) -{ - CPU (h_accum) = newval; -} - -/* Cover fns to access h-accums. */ - -DI -m32rxf_h_accums_get_handler (SIM_CPU *current_cpu, UINT regno) -{ - /* FIXME: Yes, this is just a quick hack. */ - DI r; - if (regno == 0) - r = CPU (h_accum); - else - r = CPU (h_accums[1]); - /* Sign extend the top 8 bits. */ - r = ANDDI (r, MAKEDI (0xffffff, 0xffffffff)); - r = XORDI (r, MAKEDI (0x800000, 0)); - r = SUBDI (r, MAKEDI (0x800000, 0)); - return r; -} - -void -m32rxf_h_accums_set_handler (SIM_CPU *current_cpu, UINT regno, DI newval) -{ - /* FIXME: Yes, this is just a quick hack. */ - if (regno == 0) - CPU (h_accum) = newval; - else - CPU (h_accums[1]) = newval; -} - -#if WITH_PROFILE_MODEL_P - -/* Initialize cycle counting for an insn. - FIRST_P is non-zero if this is the first insn in a set of parallel - insns. */ - -void -m32rxf_model_insn_before (SIM_CPU *cpu, int first_p) -{ - m32rbf_model_insn_before (cpu, first_p); -} - -/* Record the cycles computed for an insn. - LAST_P is non-zero if this is the last insn in a set of parallel insns, - and we update the total cycle count. - CYCLES is the cycle count of the insn. */ - -void -m32rxf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) -{ - m32rbf_model_insn_after (cpu, last_p, cycles); -} - -static INLINE void -check_load_stall (SIM_CPU *cpu, int regno) -{ - UINT h_gr = CPU_M32R_MISC_PROFILE (cpu)->load_regs; - - if (regno != -1 - && (h_gr & (1 << regno)) != 0) - { - CPU_M32R_MISC_PROFILE (cpu)->load_stall += 2; - if (TRACE_INSN_P (cpu)) - cgen_trace_printf (cpu, " ; Load stall of 2 cycles."); - } -} - -int -m32rxf_model_m32rx_u_exec (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT sr, INT sr2, INT dr) -{ - check_load_stall (cpu, sr); - check_load_stall (cpu, sr2); - return idesc->timing->units[unit_num].done; -} - -int -m32rxf_model_m32rx_u_cmp (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT src1, INT src2) -{ - check_load_stall (cpu, src1); - check_load_stall (cpu, src2); - return idesc->timing->units[unit_num].done; -} - -int -m32rxf_model_m32rx_u_mac (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT src1, INT src2) -{ - check_load_stall (cpu, src1); - check_load_stall (cpu, src2); - return idesc->timing->units[unit_num].done; -} - -int -m32rxf_model_m32rx_u_cti (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT sr) -{ - PROFILE_DATA *profile = CPU_PROFILE_DATA (cpu); - int taken_p = (referenced & (1 << 1)) != 0; - - check_load_stall (cpu, sr); - if (taken_p) - { - CPU_M32R_MISC_PROFILE (cpu)->cti_stall += 2; - PROFILE_MODEL_TAKEN_COUNT (profile) += 1; - } - else - PROFILE_MODEL_UNTAKEN_COUNT (profile) += 1; - return idesc->timing->units[unit_num].done; -} - -int -m32rxf_model_m32rx_u_load (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT sr, INT dr) -{ - CPU_M32R_MISC_PROFILE (cpu)->load_regs_pending |= (1 << dr); - return idesc->timing->units[unit_num].done; -} - -int -m32rxf_model_m32rx_u_store (SIM_CPU *cpu, const IDESC *idesc, - int unit_num, int referenced, - INT src1, INT src2) -{ - return idesc->timing->units[unit_num].done; -} - -#endif /* WITH_PROFILE_MODEL_P */ diff --git a/sim/m32r/mloop.in b/sim/m32r/mloop.in deleted file mode 100644 index 0be16bb..0000000 --- a/sim/m32r/mloop.in +++ /dev/null @@ -1,319 +0,0 @@ -# Simulator main loop for m32r. -*- C -*- -# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. -# -# This file is part of the GNU Simulators. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Syntax: -# /bin/sh mainloop.in command -# -# Command is one of: -# -# init -# support -# extract-{simple,scache,pbb} -# {full,fast}-exec-{simple,scache,pbb} -# -# A target need only provide a "full" version of one of simple,scache,pbb. -# If the target wants it can also provide a fast version of same, or if -# the slow (full featured) version is `simple', then the fast version can be -# one of scache/pbb. -# A target can't provide more than this. -# However for illustration's sake this file provides examples of all. - -# ??? After a few more ports are done, revisit. -# Will eventually need to machine generate a lot of this. - -case "x$1" in - -xsupport) - -cat <<EOF - -static INLINE const IDESC * -extract16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - ARGBUF *abuf, int fast_p) -{ - const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf); - - @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return id; -} - -static INLINE const IDESC * -extract32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - ARGBUF *abuf, int fast_p) -{ - const IDESC *id = @cpu@_decode (current_cpu, pc, (USI) insn >> 16, insn, abuf); - - @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - if (! fast_p) - { - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); - } - return id; -} - -static INLINE SEM_PC -execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) -{ - SEM_PC vpc; - - if (fast_p) - { -#if ! WITH_SEM_SWITCH_FAST -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); -#endif -#else - abort (); -#endif /* WITH_SEM_SWITCH_FAST */ - } - else - { -#if ! WITH_SEM_SWITCH_FULL - ARGBUF *abuf = &sc->argbuf; - const IDESC *idesc = abuf->idesc; - const CGEN_INSN *idata = idesc->idata; -#if WITH_SCACHE_PBB - int virtual_p = CGEN_INSN_ATTR_VALUE (idata, CGEN_INSN_VIRTUAL); -#else - int virtual_p = 0; -#endif - - if (! virtual_p) - { - /* FIXME: call x-before */ - if (ARGBUF_PROFILE_P (abuf)) - PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); - /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); - TRACE_INSN_INIT (current_cpu, abuf, 1); - TRACE_INSN (current_cpu, idata, - (const struct argbuf *) abuf, abuf->addr); - } -#if WITH_SCACHE - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); -#else - vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); -#endif - if (! virtual_p) - { - /* FIXME: call x-after */ - if (PROFILE_MODEL_P (current_cpu) - && ARGBUF_PROFILE_P (abuf)) - { - int cycles; - - cycles = (*idesc->timing->model_fn) (current_cpu, sc); - @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); - } - TRACE_INSN_FINI (current_cpu, abuf, 1); - } -#else - abort (); -#endif /* WITH_SEM_SWITCH_FULL */ - } - - return vpc; -} - -EOF - -;; - -xinit) - -# Nothing needed. - -;; - -xextract-simple | xextract-scache) - -cat <<EOF -{ - if ((pc & 3) != 0) - { - /* This only occurs when single stepping. - The test is unnecessary otherwise, but the cost is teensy, - compared with decoding/extraction. */ - UHI insn = GETIMEMUHI (current_cpu, pc); - extract16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P); - } - else - { - USI insn = GETIMEMUSI (current_cpu, pc); - if ((SI) insn < 0) - { - extract32 (current_cpu, pc, insn, sc, FAST_P); - } - else - { - extract16 (current_cpu, pc, insn >> 16, sc, FAST_P); - extract16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, FAST_P); - /* The m32r doesn't support parallel execution. */ - if ((insn & 0x8000) != 0 - && (insn & 0x7fff) != 0x7000) /* parallel nops are ok */ - sim_engine_illegal_insn (current_cpu, pc); - } - } -} -EOF - -;; - -xextract-pbb) - -# Inputs: current_cpu, pc, sc, max_insns, FAST_P -# Outputs: sc, pc -# sc must be left pointing past the last created entry. -# pc must be left pointing past the last created entry. -# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called -# to record the vpc of the cti insn. -# SET_INSN_COUNT(n) must be called to record number of real insns. - -cat <<EOF -{ - const IDESC *idesc; - int icount = 0; - - if ((pc & 3) != 0) - { - /* This only occurs when single stepping. - The test is unnecessary otherwise, but the cost is teensy, - compared with decoding/extraction. */ - UHI insn = GETIMEMUHI (current_cpu, pc); - idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - goto Finish; - } - } - - while (max_insns > 0) - { - USI insn = GETIMEMUSI (current_cpu, pc); - if ((SI) insn < 0) - { - idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 4; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } - else - { - idesc = extract16 (current_cpu, pc, insn >> 16, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - /* The m32r doesn't support parallel execution. */ - if ((insn & 0x8000) != 0) - { - /* ??? Defer signalling to execution. */ - if ((insn & 0x7fff) != 0x7000) /* parallel nops are ok */ - sim_engine_invalid_insn (current_cpu, pc - 2, 0); - /* There's no point in processing parallel nops in fast mode. - We might as well do this test since we've already tested - that we have a parallel nop. */ - if (0 && FAST_P) - { - pc += 2; - continue; - } - } - else - { - /* Non-parallel case. - While we're guaranteed that there's room to extract the - insn, when single stepping we can't; the pbb must stop - after the first insn. */ - if (max_insns == 0) - break; - } - /* We're guaranteed that we can always process 16 bit insns in - pairs. */ - idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P); - ++sc; - --max_insns; - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } - } - - Finish: - SET_INSN_COUNT (icount); -} -EOF - -;; - -xfull-exec-* | xfast-exec-*) - -# Inputs: current_cpu, vpc, FAST_P -# Outputs: vpc -# vpc is the virtual program counter. - -cat <<EOF -#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) -#define DEFINE_SWITCH -#include "sem-switch.c" -#else - vpc = execute (current_cpu, vpc, FAST_P); -#endif -EOF - -;; - -*) - echo "Invalid argument to mainloop.in: $1" >&2 - exit 1 - ;; - -esac diff --git a/sim/m32r/mloopx.in b/sim/m32r/mloopx.in deleted file mode 100644 index e1663f7..0000000 --- a/sim/m32r/mloopx.in +++ /dev/null @@ -1,484 +0,0 @@ -# Simulator main loop for m32rx. -*- C -*- -# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. -# -# This file is part of the GNU Simulators. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Syntax: -# /bin/sh mainloop.in command -# -# Command is one of: -# -# init -# support -# extract-{simple,scache,pbb} -# {full,fast}-exec-{simple,scache,pbb} -# -# A target need only provide a "full" version of one of simple,scache,pbb. -# If the target wants it can also provide a fast version of same, or if -# the slow (full featured) version is `simple', then the fast version can be -# one of scache/pbb. -# A target can't provide more than this. - -# ??? After a few more ports are done, revisit. -# Will eventually need to machine generate a lot of this. - -case "x$1" in - -xsupport) - -cat <<EOF - -/* Emit insns to write back the results of insns executed in parallel. - SC points to a sufficient number of scache entries for the writeback - handlers. - SC1/ID1 is the first insn (left slot, lower address). - SC2/ID2 is the second insn (right slot, higher address). */ - -static INLINE void -emit_par_finish (SIM_CPU *current_cpu, PCADDR pc, SCACHE *sc, - SCACHE *sc1, const IDESC *id1, SCACHE *sc2, const IDESC *id2) -{ - ARGBUF *abuf; - - abuf = &sc->argbuf; - id1 = id1->par_idesc; - abuf->fields.write.abuf = &sc1->argbuf; - @cpu@_fill_argbuf (current_cpu, abuf, id1, pc, 0); - /* no need to set trace_p,profile_p */ -#if 0 /* not currently needed for id2 since results written directly */ - abuf = &sc[1].argbuf; - id2 = id2->par_idesc; - abuf->fields.write.abuf = &sc2->argbuf; - @cpu@_fill_argbuf (current_cpu, abuf, id2, pc + 2, 0); - /* no need to set trace_p,profile_p */ -#endif -} - -static INLINE const IDESC * -emit_16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - SCACHE *sc, int fast_p, int parallel_p) -{ - ARGBUF *abuf = &sc->argbuf; - const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf); - - if (parallel_p) - id = id->par_idesc; - @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - return id; -} - -static INLINE const IDESC * -emit_full16 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, SCACHE *sc, - int trace_p, int profile_p) -{ - const IDESC *id; - - @cpu@_emit_before (current_cpu, sc, pc, 1); - id = emit_16 (current_cpu, pc, insn, sc + 1, 0, 0); - @cpu@_emit_after (current_cpu, sc + 2, pc); - sc[1].argbuf.trace_p = trace_p; - sc[1].argbuf.profile_p = profile_p; - return id; -} - -static INLINE const IDESC * -emit_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - SCACHE *sc, int fast_p) -{ - const IDESC *id,*id2; - - /* Emit both insns, then emit a finisher-upper. - We speed things up by handling the second insn serially - [not parallelly]. Then the writeback only has to deal - with the first insn. */ - /* ??? Revisit to handle exceptions right. */ - - /* FIXME: No need to handle this parallely if second is nop. */ - id = emit_16 (current_cpu, pc, insn >> 16, sc, fast_p, 1); - - /* Note that this can never be a cti. No cti's go in the S pipeline. */ - id2 = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, fast_p, 0); - - /* Set sc/snc insns notion of where to skip to. */ - if (IDESC_SKIP_P (id)) - SEM_SKIP_COMPILE (current_cpu, sc, 1); - - /* Emit code to finish executing the semantics - (write back the results). */ - emit_par_finish (current_cpu, pc, sc + 2, sc, id, sc + 1, id2); - - return id; -} - -static INLINE const IDESC * -emit_full_parallel (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - SCACHE *sc, int trace_p, int profile_p) -{ - const IDESC *id,*id2; - - /* Emit both insns, then emit a finisher-upper. - We speed things up by handling the second insn serially - [not parallelly]. Then the writeback only has to deal - with the first insn. */ - /* ??? Revisit to handle exceptions right. */ - - @cpu@_emit_before (current_cpu, sc, pc, 1); - - /* FIXME: No need to handle this parallelly if second is nop. */ - id = emit_16 (current_cpu, pc, insn >> 16, sc + 1, 0, 1); - sc[1].argbuf.trace_p = trace_p; - sc[1].argbuf.profile_p = profile_p; - - @cpu@_emit_before (current_cpu, sc + 2, pc, 0); - - /* Note that this can never be a cti. No cti's go in the S pipeline. */ - id2 = emit_16 (current_cpu, pc + 2, insn & 0x7fff, sc + 3, 0, 0); - sc[3].argbuf.trace_p = trace_p; - sc[3].argbuf.profile_p = profile_p; - - /* Set sc/snc insns notion of where to skip to. */ - if (IDESC_SKIP_P (id)) - SEM_SKIP_COMPILE (current_cpu, sc, 4); - - /* Emit code to finish executing the semantics - (write back the results). */ - emit_par_finish (current_cpu, pc, sc + 4, sc + 1, id, sc + 3, id2); - - @cpu@_emit_after (current_cpu, sc + 5, pc); - - return id; -} - -static INLINE const IDESC * -emit_32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, - SCACHE *sc, int fast_p) -{ - ARGBUF *abuf = &sc->argbuf; - const IDESC *id = @cpu@_decode (current_cpu, pc, - (USI) insn >> 16, insn, abuf); - - @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); - return id; -} - -static INLINE const IDESC * -emit_full32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, SCACHE *sc, - int trace_p, int profile_p) -{ - const IDESC *id; - - @cpu@_emit_before (current_cpu, sc, pc, 1); - id = emit_32 (current_cpu, pc, insn, sc + 1, 0); - @cpu@_emit_after (current_cpu, sc + 2, pc); - sc[1].argbuf.trace_p = trace_p; - sc[1].argbuf.profile_p = profile_p; - return id; -} - -EOF - -;; - -xinit) - -# Nothing needed. - -;; - -xextract-pbb) - -# Inputs: current_cpu, pc, sc, max_insns, FAST_P -# Outputs: sc, pc -# sc must be left pointing past the last created entry. -# pc must be left pointing past the last created entry. -# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called -# to record the vpc of the cti insn. -# SET_INSN_COUNT(n) must be called to record number of real insns. - -cat <<EOF -{ - const IDESC *idesc; - int icount = 0; - - if ((pc & 3) != 0) - { - /* This occurs when single stepping and when compiling the not-taken - part of conditional branches. */ - UHI insn = GETIMEMUHI (current_cpu, pc); - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - SCACHE *cti_sc; /* ??? tmp hack */ - - /* A parallel insn isn't allowed here, but we don't mind nops. - ??? We need to wait until the insn is executed before signalling - the error, for situations where such signalling is wanted. */ -#if 0 - if ((insn & 0x8000) != 0 - && (insn & 0x7fff) != 0x7000) /* parallel nops are ok */ - sim_engine_invalid_insn (current_cpu, pc, 0); -#endif - - /* Only emit before/after handlers if necessary. */ - if (FAST_P || (! trace_p && ! profile_p)) - { - idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P, 0); - cti_sc = sc; - ++sc; - --max_insns; - } - else - { - idesc = emit_full16 (current_cpu, pc, insn & 0x7fff, sc, - trace_p, profile_p); - cti_sc = sc + 1; - sc += 3; - max_insns -= 3; - } - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (cti_sc); - goto Finish; - } - } - - /* There are two copies of the compiler: full(!fast) and fast. - The "full" case emits before/after handlers for each insn. - Having two copies of this code is a tradeoff, having one copy - seemed a bit more difficult to read (due to constantly testing - FAST_P). ??? On the other hand, with address ranges we'll want to - omit before/after handlers for unwanted insns. Having separate loops - for FAST/!FAST avoids constantly doing the test in the loop, but - typically FAST_P is a constant and such tests will get optimized out. */ - - if (FAST_P) - { - while (max_insns > 0) - { - USI insn = GETIMEMUSI (current_cpu, pc); - if ((SI) insn < 0) - { - /* 32 bit insn */ - idesc = emit_32 (current_cpu, pc, insn, sc, 1); - ++sc; - --max_insns; - ++icount; - pc += 4; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } - else - { - if ((insn & 0x8000) != 0) /* parallel? */ - { - /* Yep. Here's the "interesting" [sic] part. */ - idesc = emit_parallel (current_cpu, pc, insn, sc, 1); - sc += 3; - max_insns -= 3; - icount += 2; - pc += 4; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 3); - break; - } - } - else /* 2 serial 16 bit insns */ - { - idesc = emit_16 (current_cpu, pc, insn >> 16, sc, 1, 0); - ++sc; - --max_insns; - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - /* While we're guaranteed that there's room to extract the - insn, when single stepping we can't; the pbb must stop - after the first insn. */ - if (max_insns == 0) - break; - idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, 1, 0); - ++sc; - --max_insns; - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (sc - 1); - break; - } - } - } - } - } - else /* ! FAST_P */ - { - while (max_insns > 0) - { - USI insn = GETIMEMUSI (current_cpu, pc); - int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); - int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); - SCACHE *cti_sc; /* ??? tmp hack */ - if ((SI) insn < 0) - { - /* 32 bit insn - Only emit before/after handlers if necessary. */ - if (trace_p || profile_p) - { - idesc = emit_full32 (current_cpu, pc, insn, sc, - trace_p, profile_p); - cti_sc = sc + 1; - sc += 3; - max_insns -= 3; - } - else - { - idesc = emit_32 (current_cpu, pc, insn, sc, 0); - cti_sc = sc; - ++sc; - --max_insns; - } - ++icount; - pc += 4; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (cti_sc); - break; - } - } - else - { - if ((insn & 0x8000) != 0) /* parallel? */ - { - /* Yep. Here's the "interesting" [sic] part. - Only emit before/after handlers if necessary. */ - if (trace_p || profile_p) - { - idesc = emit_full_parallel (current_cpu, pc, insn, sc, - trace_p, profile_p); - cti_sc = sc + 1; - sc += 6; - max_insns -= 6; - } - else - { - idesc = emit_parallel (current_cpu, pc, insn, sc, 0); - cti_sc = sc; - sc += 3; - max_insns -= 3; - } - icount += 2; - pc += 4; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (cti_sc); - break; - } - } - else /* 2 serial 16 bit insns */ - { - /* Only emit before/after handlers if necessary. */ - if (trace_p || profile_p) - { - idesc = emit_full16 (current_cpu, pc, insn >> 16, sc, - trace_p, profile_p); - cti_sc = sc + 1; - sc += 3; - max_insns -= 3; - } - else - { - idesc = emit_16 (current_cpu, pc, insn >> 16, sc, 0, 0); - cti_sc = sc; - ++sc; - --max_insns; - } - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (cti_sc); - break; - } - /* While we're guaranteed that there's room to extract the - insn, when single stepping we can't; the pbb must stop - after the first insn. */ - if (max_insns <= 0) - break; - /* Use the same trace/profile address for the 2nd insn. - Saves us having to compute it and they come in pairs - anyway (e.g. can never branch to the 2nd insn). */ - if (trace_p || profile_p) - { - idesc = emit_full16 (current_cpu, pc, insn & 0x7fff, sc, - trace_p, profile_p); - cti_sc = sc + 1; - sc += 3; - max_insns -= 3; - } - else - { - idesc = emit_16 (current_cpu, pc, insn & 0x7fff, sc, 0, 0); - cti_sc = sc; - ++sc; - --max_insns; - } - ++icount; - pc += 2; - if (IDESC_CTI_P (idesc)) - { - SET_CTI_VPC (cti_sc); - break; - } - } - } - } - } - - Finish: - SET_INSN_COUNT (icount); -} -EOF - -;; - -xfull-exec-pbb) - -# Inputs: current_cpu, vpc, FAST_P -# Outputs: vpc -# vpc is the virtual program counter. - -cat <<EOF -#define DEFINE_SWITCH -#include "semx-switch.c" -EOF - -;; - -*) - echo "Invalid argument to mainloop.in: $1" >&2 - exit 1 - ;; - -esac diff --git a/sim/m32r/model.c b/sim/m32r/model.c deleted file mode 100644 index 419e581..0000000 --- a/sim/m32r/model.c +++ /dev/null @@ -1,4168 +0,0 @@ -/* Simulator model support for m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rbf -#define WANT_CPU_M32RBF - -#include "sim-main.h" - -/* The profiling data is recorded here, but is accessed via the profiling - mechanism. After all, this is information for profiling. */ - -#if WITH_PROFILE_MODEL_P - -/* Model handlers for each insn. */ - -static int -model_m32r_d_add (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_add3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_and3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_or3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_xor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_xor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_addi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_addv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_addv3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_addx (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bc8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bc24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_beq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_beqz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bgez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bgtz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_blez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bltz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bnez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bl8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bl24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bnc8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bnc24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bra8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_bra24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_cmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_cmpu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_cmpui (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_div (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_divu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_rem (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_remu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_jl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - in_sr = FLD (in_sr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_jmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - in_sr = FLD (in_sr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ld_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldb_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldh_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldub_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_lduh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_lduh_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ld_plus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_sr); - out_dr = FLD (out_sr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ld24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldi8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_ldi16 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_lock (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_machi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_maclo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_macwhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_macwlo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mulhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mullo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mulwhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mulwlo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvfachi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvfaclo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvfacmi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvfc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvtachi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_src1); - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvtaclo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_src1); - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_mvtc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - referenced |= 1 << 0; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_neg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_nop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_not (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_rac (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_rach (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - cycles += m32rbf_model_m32r_d_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_rte (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_seth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sll (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sll3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_slli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sra (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sra3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_srai (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_srl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_srl3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_srli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_st (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_st_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_stb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_stb_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sth_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_st_plus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_src2); - out_dr = FLD (out_src2); - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_st_minus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rbf_model_m32r_d_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_src2); - out_dr = FLD (out_src2); - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_sub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_subv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_subx (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_trap (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_trap.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rbf_model_m32r_d_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32r_d_unlock (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - cycles += m32rbf_model_m32r_d_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_test_add (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_add3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_and3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_or3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_xor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_xor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_addi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_addv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_addv3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_addx (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bc8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bc24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_beq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_beqz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bgez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bgtz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_blez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bltz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bnez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bl8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bl24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bnc8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bnc24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bra8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_bra24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_cmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_cmpu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_cmpui (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_div (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_divu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_rem (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_remu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_jl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_jmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ld_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldb_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldh_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldub_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_lduh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_lduh_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ld_plus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ld24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldi8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_ldi16 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_lock (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_machi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_maclo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_macwhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_macwlo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mulhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mullo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mulwhi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mulwlo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvfachi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvfaclo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvfacmi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvfc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvtachi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvtaclo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_mvtc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_neg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_nop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_not (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_rac (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_rach (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_rte (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_seth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sll (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sll3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_slli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sra (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sra3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_srai (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_srl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_srl3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_srli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_st (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_st_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_stb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_stb_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sth_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_st_plus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_st_minus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_sub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_subv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_subx (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_trap (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_trap.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -static int -model_test_unlock (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - cycles += m32rbf_model_test_u_exec (current_cpu, idesc, 0, referenced); - } - return cycles; -#undef FLD -} - -/* We assume UNIT_NONE == 0 because the tables don't always terminate - entries with it. */ - -/* Model timing data for `m32r/d'. */ - -static const INSN_TIMING m32r_d_timing[] = { - { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADD, model_m32r_d_add, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADD3, model_m32r_d_add3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_AND, model_m32r_d_and, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_AND3, model_m32r_d_and3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_OR, model_m32r_d_or, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_OR3, model_m32r_d_or3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_XOR, model_m32r_d_xor, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_XOR3, model_m32r_d_xor3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDI, model_m32r_d_addi, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDV, model_m32r_d_addv, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDV3, model_m32r_d_addv3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDX, model_m32r_d_addx, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BC8, model_m32r_d_bc8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BC24, model_m32r_d_bc24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BEQ, model_m32r_d_beq, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BEQZ, model_m32r_d_beqz, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BGEZ, model_m32r_d_bgez, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BGTZ, model_m32r_d_bgtz, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BLEZ, model_m32r_d_blez, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BLTZ, model_m32r_d_bltz, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BNEZ, model_m32r_d_bnez, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BL8, model_m32r_d_bl8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BL24, model_m32r_d_bl24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BNC8, model_m32r_d_bnc8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BNC24, model_m32r_d_bnc24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BNE, model_m32r_d_bne, { { (int) UNIT_M32R_D_U_CTI, 1, 1 }, { (int) UNIT_M32R_D_U_CMP, 1, 0 } } }, - { M32RBF_INSN_BRA8, model_m32r_d_bra8, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_BRA24, model_m32r_d_bra24, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_CMP, model_m32r_d_cmp, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } }, - { M32RBF_INSN_CMPI, model_m32r_d_cmpi, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } }, - { M32RBF_INSN_CMPU, model_m32r_d_cmpu, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } }, - { M32RBF_INSN_CMPUI, model_m32r_d_cmpui, { { (int) UNIT_M32R_D_U_CMP, 1, 1 } } }, - { M32RBF_INSN_DIV, model_m32r_d_div, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } }, - { M32RBF_INSN_DIVU, model_m32r_d_divu, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } }, - { M32RBF_INSN_REM, model_m32r_d_rem, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } }, - { M32RBF_INSN_REMU, model_m32r_d_remu, { { (int) UNIT_M32R_D_U_EXEC, 1, 37 } } }, - { M32RBF_INSN_JL, model_m32r_d_jl, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_JMP, model_m32r_d_jmp, { { (int) UNIT_M32R_D_U_CTI, 1, 1 } } }, - { M32RBF_INSN_LD, model_m32r_d_ld, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, - { M32RBF_INSN_LD_D, model_m32r_d_ld_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } }, - { M32RBF_INSN_LDB, model_m32r_d_ldb, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, - { M32RBF_INSN_LDB_D, model_m32r_d_ldb_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } }, - { M32RBF_INSN_LDH, model_m32r_d_ldh, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, - { M32RBF_INSN_LDH_D, model_m32r_d_ldh_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } }, - { M32RBF_INSN_LDUB, model_m32r_d_ldub, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, - { M32RBF_INSN_LDUB_D, model_m32r_d_ldub_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } }, - { M32RBF_INSN_LDUH, model_m32r_d_lduh, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, - { M32RBF_INSN_LDUH_D, model_m32r_d_lduh_d, { { (int) UNIT_M32R_D_U_LOAD, 1, 2 } } }, - { M32RBF_INSN_LD_PLUS, model_m32r_d_ld_plus, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 }, { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } }, - { M32RBF_INSN_LD24, model_m32r_d_ld24, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDI8, model_m32r_d_ldi8, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDI16, model_m32r_d_ldi16, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LOCK, model_m32r_d_lock, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, - { M32RBF_INSN_MACHI, model_m32r_d_machi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MACLO, model_m32r_d_maclo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MACWHI, model_m32r_d_macwhi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MACWLO, model_m32r_d_macwlo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MUL, model_m32r_d_mul, { { (int) UNIT_M32R_D_U_EXEC, 1, 4 } } }, - { M32RBF_INSN_MULHI, model_m32r_d_mulhi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MULLO, model_m32r_d_mullo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MULWHI, model_m32r_d_mulwhi, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MULWLO, model_m32r_d_mulwlo, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_MV, model_m32r_d_mv, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVFACHI, model_m32r_d_mvfachi, { { (int) UNIT_M32R_D_U_EXEC, 1, 2 } } }, - { M32RBF_INSN_MVFACLO, model_m32r_d_mvfaclo, { { (int) UNIT_M32R_D_U_EXEC, 1, 2 } } }, - { M32RBF_INSN_MVFACMI, model_m32r_d_mvfacmi, { { (int) UNIT_M32R_D_U_EXEC, 1, 2 } } }, - { M32RBF_INSN_MVFC, model_m32r_d_mvfc, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVTACHI, model_m32r_d_mvtachi, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVTACLO, model_m32r_d_mvtaclo, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVTC, model_m32r_d_mvtc, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_NEG, model_m32r_d_neg, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_NOP, model_m32r_d_nop, { { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } }, - { M32RBF_INSN_NOT, model_m32r_d_not, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_RAC, model_m32r_d_rac, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_RACH, model_m32r_d_rach, { { (int) UNIT_M32R_D_U_MAC, 1, 1 } } }, - { M32RBF_INSN_RTE, model_m32r_d_rte, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SETH, model_m32r_d_seth, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SLL, model_m32r_d_sll, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SLL3, model_m32r_d_sll3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SLLI, model_m32r_d_slli, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRA, model_m32r_d_sra, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRA3, model_m32r_d_sra3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRAI, model_m32r_d_srai, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRL, model_m32r_d_srl, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRL3, model_m32r_d_srl3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRLI, model_m32r_d_srli, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ST, model_m32r_d_st, { { (int) UNIT_M32R_D_U_STORE, 1, 1 } } }, - { M32RBF_INSN_ST_D, model_m32r_d_st_d, { { (int) UNIT_M32R_D_U_STORE, 1, 2 } } }, - { M32RBF_INSN_STB, model_m32r_d_stb, { { (int) UNIT_M32R_D_U_STORE, 1, 1 } } }, - { M32RBF_INSN_STB_D, model_m32r_d_stb_d, { { (int) UNIT_M32R_D_U_STORE, 1, 2 } } }, - { M32RBF_INSN_STH, model_m32r_d_sth, { { (int) UNIT_M32R_D_U_STORE, 1, 1 } } }, - { M32RBF_INSN_STH_D, model_m32r_d_sth_d, { { (int) UNIT_M32R_D_U_STORE, 1, 2 } } }, - { M32RBF_INSN_ST_PLUS, model_m32r_d_st_plus, { { (int) UNIT_M32R_D_U_STORE, 1, 1 }, { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } }, - { M32RBF_INSN_ST_MINUS, model_m32r_d_st_minus, { { (int) UNIT_M32R_D_U_STORE, 1, 1 }, { (int) UNIT_M32R_D_U_EXEC, 1, 0 } } }, - { M32RBF_INSN_SUB, model_m32r_d_sub, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SUBV, model_m32r_d_subv, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SUBX, model_m32r_d_subx, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_TRAP, model_m32r_d_trap, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_UNLOCK, model_m32r_d_unlock, { { (int) UNIT_M32R_D_U_LOAD, 1, 1 } } }, -}; - -/* Model timing data for `test'. */ - -static const INSN_TIMING test_timing[] = { - { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADD, model_test_add, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADD3, model_test_add3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_AND, model_test_and, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_AND3, model_test_and3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_OR, model_test_or, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_OR3, model_test_or3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_XOR, model_test_xor, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_XOR3, model_test_xor3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDI, model_test_addi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDV, model_test_addv, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDV3, model_test_addv3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ADDX, model_test_addx, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BC8, model_test_bc8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BC24, model_test_bc24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BEQ, model_test_beq, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BEQZ, model_test_beqz, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BGEZ, model_test_bgez, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BGTZ, model_test_bgtz, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BLEZ, model_test_blez, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BLTZ, model_test_bltz, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BNEZ, model_test_bnez, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BL8, model_test_bl8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BL24, model_test_bl24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BNC8, model_test_bnc8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BNC24, model_test_bnc24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BNE, model_test_bne, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BRA8, model_test_bra8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_BRA24, model_test_bra24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_CMP, model_test_cmp, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_CMPI, model_test_cmpi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_CMPU, model_test_cmpu, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_CMPUI, model_test_cmpui, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_DIV, model_test_div, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_DIVU, model_test_divu, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_REM, model_test_rem, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_REMU, model_test_remu, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_JL, model_test_jl, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_JMP, model_test_jmp, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LD, model_test_ld, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LD_D, model_test_ld_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDB, model_test_ldb, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDB_D, model_test_ldb_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDH, model_test_ldh, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDH_D, model_test_ldh_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDUB, model_test_ldub, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDUB_D, model_test_ldub_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDUH, model_test_lduh, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDUH_D, model_test_lduh_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LD_PLUS, model_test_ld_plus, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LD24, model_test_ld24, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDI8, model_test_ldi8, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LDI16, model_test_ldi16, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_LOCK, model_test_lock, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MACHI, model_test_machi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MACLO, model_test_maclo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MACWHI, model_test_macwhi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MACWLO, model_test_macwlo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MUL, model_test_mul, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MULHI, model_test_mulhi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MULLO, model_test_mullo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MULWHI, model_test_mulwhi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MULWLO, model_test_mulwlo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MV, model_test_mv, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVFACHI, model_test_mvfachi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVFACLO, model_test_mvfaclo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVFACMI, model_test_mvfacmi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVFC, model_test_mvfc, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVTACHI, model_test_mvtachi, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVTACLO, model_test_mvtaclo, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_MVTC, model_test_mvtc, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_NEG, model_test_neg, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_NOP, model_test_nop, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_NOT, model_test_not, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_RAC, model_test_rac, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_RACH, model_test_rach, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_RTE, model_test_rte, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SETH, model_test_seth, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SLL, model_test_sll, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SLL3, model_test_sll3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SLLI, model_test_slli, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRA, model_test_sra, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRA3, model_test_sra3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRAI, model_test_srai, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRL, model_test_srl, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRL3, model_test_srl3, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SRLI, model_test_srli, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ST, model_test_st, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ST_D, model_test_st_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_STB, model_test_stb, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_STB_D, model_test_stb_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_STH, model_test_sth, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_STH_D, model_test_sth_d, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ST_PLUS, model_test_st_plus, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_ST_MINUS, model_test_st_minus, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SUB, model_test_sub, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SUBV, model_test_subv, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_SUBX, model_test_subx, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_TRAP, model_test_trap, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, - { M32RBF_INSN_UNLOCK, model_test_unlock, { { (int) UNIT_TEST_U_EXEC, 1, 1 } } }, -}; - -#endif /* WITH_PROFILE_MODEL_P */ - -static void -m32r_d_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_M32R_D_DATA)); -} - -static void -test_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_TEST_DATA)); -} - -#if WITH_PROFILE_MODEL_P -#define TIMING_DATA(td) td -#else -#define TIMING_DATA(td) 0 -#endif - -static const MODEL m32r_models[] = -{ - { "m32r/d", & m32r_mach, MODEL_M32R_D, TIMING_DATA (& m32r_d_timing[0]), m32r_d_model_init }, - { "test", & m32r_mach, MODEL_TEST, TIMING_DATA (& test_timing[0]), test_model_init }, - { 0 } -}; - -/* The properties of this cpu's implementation. */ - -static const MACH_IMP_PROPERTIES m32rbf_imp_properties = -{ - sizeof (SIM_CPU), -#if WITH_SCACHE - sizeof (SCACHE) -#else - 0 -#endif -}; - - -static void -m32rbf_prepare_run (SIM_CPU *cpu) -{ - if (CPU_IDESC (cpu) == NULL) - m32rbf_init_idesc_table (cpu); -} - -static const CGEN_INSN * -m32rbf_get_idata (SIM_CPU *cpu, int inum) -{ - return CPU_IDESC (cpu) [inum].idata; -} - -static void -m32r_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = m32rbf_fetch_register; - CPU_REG_STORE (cpu) = m32rbf_store_register; - CPU_PC_FETCH (cpu) = m32rbf_h_pc_get; - CPU_PC_STORE (cpu) = m32rbf_h_pc_set; - CPU_GET_IDATA (cpu) = m32rbf_get_idata; - CPU_MAX_INSNS (cpu) = M32RBF_INSN_UNLOCK + 1; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = m32rbf_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = m32rbf_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = m32rbf_engine_run_full; -#endif -} - -const MACH m32r_mach = -{ - "m32r", "m32r", MACH_M32R, - 32, 32, & m32r_models[0], & m32rbf_imp_properties, - m32r_init_cpu, - m32rbf_prepare_run -}; - diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c deleted file mode 100644 index bdcb93a..0000000 --- a/sim/m32r/modelx.c +++ /dev/null @@ -1,2899 +0,0 @@ -/* Simulator model support for m32rxf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rxf -#define WANT_CPU_M32RXF - -#include "sim-main.h" - -/* The profiling data is recorded here, but is accessed via the profiling - mechanism. After all, this is information for profiling. */ - -#if WITH_PROFILE_MODEL_P - -/* Model handlers for each insn. */ - -static int -model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - if (insn_referenced & (1 << 0)) referenced |= 1 << 1; - if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - in_sr = FLD (in_sr); - if (insn_referenced & (1 << 1)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - in_sr = FLD (in_sr); - if (insn_referenced & (1 << 1)) referenced |= 1 << 0; - if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - in_sr = FLD (in_sr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - in_sr = FLD (in_sr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_sr); - out_dr = FLD (out_sr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld24.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_machi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_src1); - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_src1); - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - referenced |= 1 << 0; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_rac_dsi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_rac_dsi.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - out_dr = FLD (out_dr); - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_src2); - out_dr = FLD (out_src2); - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = 0; - INT in_src2 = 0; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_dr = FLD (in_src2); - out_dr = FLD (out_src2); - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - in_dr = FLD (in_dr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 1; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_trap.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = 0; - INT out_dr = 0; - cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - in_sr = FLD (in_sr); - out_dr = FLD (out_dr); - if (insn_referenced & (1 << 1)) referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src2 = FLD (in_src2); - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_src1 = -1; - INT in_src2 = -1; - in_src1 = FLD (in_src1); - in_src2 = FLD (in_src2); - referenced |= 1 << 0; - referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - const IDESC * UNUSED idesc = abuf->idesc; - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT in_sr = -1; - INT in_dr = -1; - INT out_dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); - } - return cycles; -#undef FLD -} - -/* We assume UNIT_NONE == 0 because the tables don't always terminate - entries with it. */ - -/* Model timing data for `m32rx'. */ - -static const INSN_TIMING m32rx_timing[] = { - { M32RXF_INSN_X_INVALID, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_AFTER, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_BEFORE, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_BEGIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ADD, model_m32rx_add, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ADD3, model_m32rx_add3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_AND, model_m32rx_and, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_AND3, model_m32rx_and3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_OR, model_m32rx_or, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_OR3, model_m32rx_or3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_XOR, model_m32rx_xor, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_XOR3, model_m32rx_xor3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ADDI, model_m32rx_addi, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ADDV, model_m32rx_addv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ADDV3, model_m32rx_addv3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ADDX, model_m32rx_addx, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_BC8, model_m32rx_bc8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BC24, model_m32rx_bc24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BEQ, model_m32rx_beq, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BEQZ, model_m32rx_beqz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BGEZ, model_m32rx_bgez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BGTZ, model_m32rx_bgtz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BLEZ, model_m32rx_blez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BLTZ, model_m32rx_bltz, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BNEZ, model_m32rx_bnez, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BL8, model_m32rx_bl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BL24, model_m32rx_bl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BCL8, model_m32rx_bcl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BCL24, model_m32rx_bcl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BNC8, model_m32rx_bnc8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BNC24, model_m32rx_bnc24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BNE, model_m32rx_bne, { { (int) UNIT_M32RX_U_CTI, 1, 1 }, { (int) UNIT_M32RX_U_CMP, 1, 0 } } }, - { M32RXF_INSN_BRA8, model_m32rx_bra8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BRA24, model_m32rx_bra24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BNCL8, model_m32rx_bncl8, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_BNCL24, model_m32rx_bncl24, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_CMP, model_m32rx_cmp, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_CMPI, model_m32rx_cmpi, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_CMPU, model_m32rx_cmpu, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_CMPUI, model_m32rx_cmpui, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_CMPEQ, model_m32rx_cmpeq, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_CMPZ, model_m32rx_cmpz, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_DIV, model_m32rx_div, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } }, - { M32RXF_INSN_DIVU, model_m32rx_divu, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } }, - { M32RXF_INSN_REM, model_m32rx_rem, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } }, - { M32RXF_INSN_REMU, model_m32rx_remu, { { (int) UNIT_M32RX_U_EXEC, 1, 37 } } }, - { M32RXF_INSN_DIVH, model_m32rx_divh, { { (int) UNIT_M32RX_U_EXEC, 1, 21 } } }, - { M32RXF_INSN_JC, model_m32rx_jc, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_JNC, model_m32rx_jnc, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_JL, model_m32rx_jl, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_JMP, model_m32rx_jmp, { { (int) UNIT_M32RX_U_CTI, 1, 1 } } }, - { M32RXF_INSN_LD, model_m32rx_ld, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_LD_D, model_m32rx_ld_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } }, - { M32RXF_INSN_LDB, model_m32rx_ldb, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_LDB_D, model_m32rx_ldb_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } }, - { M32RXF_INSN_LDH, model_m32rx_ldh, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_LDH_D, model_m32rx_ldh_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } }, - { M32RXF_INSN_LDUB, model_m32rx_ldub, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_LDUB_D, model_m32rx_ldub_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } }, - { M32RXF_INSN_LDUH, model_m32rx_lduh, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_LDUH_D, model_m32rx_lduh_d, { { (int) UNIT_M32RX_U_LOAD, 1, 2 } } }, - { M32RXF_INSN_LD_PLUS, model_m32rx_ld_plus, { { (int) UNIT_M32RX_U_LOAD, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, - { M32RXF_INSN_LD24, model_m32rx_ld24, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_LDI8, model_m32rx_ldi8, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_LDI16, model_m32rx_ldi16, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_LOCK, model_m32rx_lock, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_MACHI_A, model_m32rx_machi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MACLO_A, model_m32rx_maclo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MACWHI_A, model_m32rx_macwhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MACWLO_A, model_m32rx_macwlo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MUL, model_m32rx_mul, { { (int) UNIT_M32RX_U_EXEC, 1, 4 } } }, - { M32RXF_INSN_MULHI_A, model_m32rx_mulhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MULLO_A, model_m32rx_mullo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MULWHI_A, model_m32rx_mulwhi_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MULWLO_A, model_m32rx_mulwlo_a, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MV, model_m32rx_mv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_MVFACHI_A, model_m32rx_mvfachi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } }, - { M32RXF_INSN_MVFACLO_A, model_m32rx_mvfaclo_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } }, - { M32RXF_INSN_MVFACMI_A, model_m32rx_mvfacmi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 2 } } }, - { M32RXF_INSN_MVFC, model_m32rx_mvfc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_MVTACHI_A, model_m32rx_mvtachi_a, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_MVTACLO_A, model_m32rx_mvtaclo_a, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_MVTC, model_m32rx_mvtc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_NEG, model_m32rx_neg, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_NOP, model_m32rx_nop, { { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, - { M32RXF_INSN_NOT, model_m32rx_not, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_RAC_DSI, model_m32rx_rac_dsi, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_RACH_DSI, model_m32rx_rach_dsi, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_RTE, model_m32rx_rte, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SETH, model_m32rx_seth, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SLL, model_m32rx_sll, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SLL3, model_m32rx_sll3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SLLI, model_m32rx_slli, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SRA, model_m32rx_sra, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SRA3, model_m32rx_sra3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SRAI, model_m32rx_srai, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SRL, model_m32rx_srl, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SRL3, model_m32rx_srl3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SRLI, model_m32rx_srli, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_ST, model_m32rx_st, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } }, - { M32RXF_INSN_ST_D, model_m32rx_st_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } }, - { M32RXF_INSN_STB, model_m32rx_stb, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } }, - { M32RXF_INSN_STB_D, model_m32rx_stb_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } }, - { M32RXF_INSN_STH, model_m32rx_sth, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } }, - { M32RXF_INSN_STH_D, model_m32rx_sth_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } }, - { M32RXF_INSN_ST_PLUS, model_m32rx_st_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, - { M32RXF_INSN_ST_MINUS, model_m32rx_st_minus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, - { M32RXF_INSN_SUB, model_m32rx_sub, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SUBV, model_m32rx_subv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SUBX, model_m32rx_subx, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_TRAP, model_m32rx_trap, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_UNLOCK, model_m32rx_unlock, { { (int) UNIT_M32RX_U_LOAD, 1, 1 } } }, - { M32RXF_INSN_SATB, model_m32rx_satb, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SATH, model_m32rx_sath, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SAT, model_m32rx_sat, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_PCMPBZ, model_m32rx_pcmpbz, { { (int) UNIT_M32RX_U_CMP, 1, 1 } } }, - { M32RXF_INSN_SADD, model_m32rx_sadd, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MACWU1, model_m32rx_macwu1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MSBLO, model_m32rx_msblo, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MULWU1, model_m32rx_mulwu1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_MACLH1, model_m32rx_maclh1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, - { M32RXF_INSN_SC, model_m32rx_sc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_SNC, model_m32rx_snc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, -}; - -#endif /* WITH_PROFILE_MODEL_P */ - -static void -m32rx_model_init (SIM_CPU *cpu) -{ - CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_M32RX_DATA)); -} - -#if WITH_PROFILE_MODEL_P -#define TIMING_DATA(td) td -#else -#define TIMING_DATA(td) 0 -#endif - -static const MODEL m32rx_models[] = -{ - { "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init }, - { 0 } -}; - -/* The properties of this cpu's implementation. */ - -static const MACH_IMP_PROPERTIES m32rxf_imp_properties = -{ - sizeof (SIM_CPU), -#if WITH_SCACHE - sizeof (SCACHE) -#else - 0 -#endif -}; - - -static void -m32rxf_prepare_run (SIM_CPU *cpu) -{ - if (CPU_IDESC (cpu) == NULL) - m32rxf_init_idesc_table (cpu); -} - -static const CGEN_INSN * -m32rxf_get_idata (SIM_CPU *cpu, int inum) -{ - return CPU_IDESC (cpu) [inum].idata; -} - -static void -m32rx_init_cpu (SIM_CPU *cpu) -{ - CPU_REG_FETCH (cpu) = m32rxf_fetch_register; - CPU_REG_STORE (cpu) = m32rxf_store_register; - CPU_PC_FETCH (cpu) = m32rxf_h_pc_get; - CPU_PC_STORE (cpu) = m32rxf_h_pc_set; - CPU_GET_IDATA (cpu) = m32rxf_get_idata; - CPU_MAX_INSNS (cpu) = M32RXF_INSN_SNC + 1; - CPU_INSN_NAME (cpu) = cgen_insn_name; - CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full; -#if WITH_FAST - CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_fast; -#else - CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_full; -#endif -} - -const MACH m32rx_mach = -{ - "m32rx", "m32rx", MACH_M32RX, - 32, 32, & m32rx_models[0], & m32rxf_imp_properties, - m32rx_init_cpu, - m32rxf_prepare_run -}; - diff --git a/sim/m32r/sem-switch.c b/sim/m32r/sem-switch.c deleted file mode 100644 index 2d5489c..0000000 --- a/sim/m32r/sem-switch.c +++ /dev/null @@ -1,2515 +0,0 @@ -/* Simulator instruction semantics for m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { M32RBF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { M32RBF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { M32RBF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { M32RBF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { M32RBF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { M32RBF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { M32RBF_INSN_ADD, && case_sem_INSN_ADD }, - { M32RBF_INSN_ADD3, && case_sem_INSN_ADD3 }, - { M32RBF_INSN_AND, && case_sem_INSN_AND }, - { M32RBF_INSN_AND3, && case_sem_INSN_AND3 }, - { M32RBF_INSN_OR, && case_sem_INSN_OR }, - { M32RBF_INSN_OR3, && case_sem_INSN_OR3 }, - { M32RBF_INSN_XOR, && case_sem_INSN_XOR }, - { M32RBF_INSN_XOR3, && case_sem_INSN_XOR3 }, - { M32RBF_INSN_ADDI, && case_sem_INSN_ADDI }, - { M32RBF_INSN_ADDV, && case_sem_INSN_ADDV }, - { M32RBF_INSN_ADDV3, && case_sem_INSN_ADDV3 }, - { M32RBF_INSN_ADDX, && case_sem_INSN_ADDX }, - { M32RBF_INSN_BC8, && case_sem_INSN_BC8 }, - { M32RBF_INSN_BC24, && case_sem_INSN_BC24 }, - { M32RBF_INSN_BEQ, && case_sem_INSN_BEQ }, - { M32RBF_INSN_BEQZ, && case_sem_INSN_BEQZ }, - { M32RBF_INSN_BGEZ, && case_sem_INSN_BGEZ }, - { M32RBF_INSN_BGTZ, && case_sem_INSN_BGTZ }, - { M32RBF_INSN_BLEZ, && case_sem_INSN_BLEZ }, - { M32RBF_INSN_BLTZ, && case_sem_INSN_BLTZ }, - { M32RBF_INSN_BNEZ, && case_sem_INSN_BNEZ }, - { M32RBF_INSN_BL8, && case_sem_INSN_BL8 }, - { M32RBF_INSN_BL24, && case_sem_INSN_BL24 }, - { M32RBF_INSN_BNC8, && case_sem_INSN_BNC8 }, - { M32RBF_INSN_BNC24, && case_sem_INSN_BNC24 }, - { M32RBF_INSN_BNE, && case_sem_INSN_BNE }, - { M32RBF_INSN_BRA8, && case_sem_INSN_BRA8 }, - { M32RBF_INSN_BRA24, && case_sem_INSN_BRA24 }, - { M32RBF_INSN_CMP, && case_sem_INSN_CMP }, - { M32RBF_INSN_CMPI, && case_sem_INSN_CMPI }, - { M32RBF_INSN_CMPU, && case_sem_INSN_CMPU }, - { M32RBF_INSN_CMPUI, && case_sem_INSN_CMPUI }, - { M32RBF_INSN_DIV, && case_sem_INSN_DIV }, - { M32RBF_INSN_DIVU, && case_sem_INSN_DIVU }, - { M32RBF_INSN_REM, && case_sem_INSN_REM }, - { M32RBF_INSN_REMU, && case_sem_INSN_REMU }, - { M32RBF_INSN_JL, && case_sem_INSN_JL }, - { M32RBF_INSN_JMP, && case_sem_INSN_JMP }, - { M32RBF_INSN_LD, && case_sem_INSN_LD }, - { M32RBF_INSN_LD_D, && case_sem_INSN_LD_D }, - { M32RBF_INSN_LDB, && case_sem_INSN_LDB }, - { M32RBF_INSN_LDB_D, && case_sem_INSN_LDB_D }, - { M32RBF_INSN_LDH, && case_sem_INSN_LDH }, - { M32RBF_INSN_LDH_D, && case_sem_INSN_LDH_D }, - { M32RBF_INSN_LDUB, && case_sem_INSN_LDUB }, - { M32RBF_INSN_LDUB_D, && case_sem_INSN_LDUB_D }, - { M32RBF_INSN_LDUH, && case_sem_INSN_LDUH }, - { M32RBF_INSN_LDUH_D, && case_sem_INSN_LDUH_D }, - { M32RBF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS }, - { M32RBF_INSN_LD24, && case_sem_INSN_LD24 }, - { M32RBF_INSN_LDI8, && case_sem_INSN_LDI8 }, - { M32RBF_INSN_LDI16, && case_sem_INSN_LDI16 }, - { M32RBF_INSN_LOCK, && case_sem_INSN_LOCK }, - { M32RBF_INSN_MACHI, && case_sem_INSN_MACHI }, - { M32RBF_INSN_MACLO, && case_sem_INSN_MACLO }, - { M32RBF_INSN_MACWHI, && case_sem_INSN_MACWHI }, - { M32RBF_INSN_MACWLO, && case_sem_INSN_MACWLO }, - { M32RBF_INSN_MUL, && case_sem_INSN_MUL }, - { M32RBF_INSN_MULHI, && case_sem_INSN_MULHI }, - { M32RBF_INSN_MULLO, && case_sem_INSN_MULLO }, - { M32RBF_INSN_MULWHI, && case_sem_INSN_MULWHI }, - { M32RBF_INSN_MULWLO, && case_sem_INSN_MULWLO }, - { M32RBF_INSN_MV, && case_sem_INSN_MV }, - { M32RBF_INSN_MVFACHI, && case_sem_INSN_MVFACHI }, - { M32RBF_INSN_MVFACLO, && case_sem_INSN_MVFACLO }, - { M32RBF_INSN_MVFACMI, && case_sem_INSN_MVFACMI }, - { M32RBF_INSN_MVFC, && case_sem_INSN_MVFC }, - { M32RBF_INSN_MVTACHI, && case_sem_INSN_MVTACHI }, - { M32RBF_INSN_MVTACLO, && case_sem_INSN_MVTACLO }, - { M32RBF_INSN_MVTC, && case_sem_INSN_MVTC }, - { M32RBF_INSN_NEG, && case_sem_INSN_NEG }, - { M32RBF_INSN_NOP, && case_sem_INSN_NOP }, - { M32RBF_INSN_NOT, && case_sem_INSN_NOT }, - { M32RBF_INSN_RAC, && case_sem_INSN_RAC }, - { M32RBF_INSN_RACH, && case_sem_INSN_RACH }, - { M32RBF_INSN_RTE, && case_sem_INSN_RTE }, - { M32RBF_INSN_SETH, && case_sem_INSN_SETH }, - { M32RBF_INSN_SLL, && case_sem_INSN_SLL }, - { M32RBF_INSN_SLL3, && case_sem_INSN_SLL3 }, - { M32RBF_INSN_SLLI, && case_sem_INSN_SLLI }, - { M32RBF_INSN_SRA, && case_sem_INSN_SRA }, - { M32RBF_INSN_SRA3, && case_sem_INSN_SRA3 }, - { M32RBF_INSN_SRAI, && case_sem_INSN_SRAI }, - { M32RBF_INSN_SRL, && case_sem_INSN_SRL }, - { M32RBF_INSN_SRL3, && case_sem_INSN_SRL3 }, - { M32RBF_INSN_SRLI, && case_sem_INSN_SRLI }, - { M32RBF_INSN_ST, && case_sem_INSN_ST }, - { M32RBF_INSN_ST_D, && case_sem_INSN_ST_D }, - { M32RBF_INSN_STB, && case_sem_INSN_STB }, - { M32RBF_INSN_STB_D, && case_sem_INSN_STB_D }, - { M32RBF_INSN_STH, && case_sem_INSN_STH }, - { M32RBF_INSN_STH_D, && case_sem_INSN_STH_D }, - { M32RBF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS }, - { M32RBF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS }, - { M32RBF_INSN_SUB, && case_sem_INSN_SUB }, - { M32RBF_INSN_SUBV, && case_sem_INSN_SUBV }, - { M32RBF_INSN_SUBX, && case_sem_INSN_SUBX }, - { M32RBF_INSN_TRAP, && case_sem_INSN_TRAP }, - { M32RBF_INSN_UNLOCK, && case_sem_INSN_UNLOCK }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF - m32rbf_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF - m32rbf_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF -#ifdef DEFINE_SWITCH - vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF - vpc = m32rbf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = m32rbf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = m32rbf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD) : /* add $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND) : /* and $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_and3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR) : /* or $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_and3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR) : /* xor $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_and3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDV) : /* addv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); - temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDX) : /* addx $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BC8) : /* bc.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BC24) : /* bc.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_src1), * FLD (i_src2))) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BL8) : /* bl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BL24) : /* bl.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_src1), * FLD (i_src2))) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA8) : /* bra.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA24) : /* bra.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV) : /* div $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVU) : /* divu $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REM) : /* rem $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMU) : /* remu $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JL) : /* jl $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;USI temp1; - temp0 = ADDSI (ANDSI (pc, -4), 4); - temp1 = ANDSI (* FLD (i_sr), -4); - { - SI opval = temp0; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = temp1; - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMP) : /* jmp $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = ANDSI (* FLD (i_sr), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD) : /* ld $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;SI temp1; - temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - temp1 = ADDSI (* FLD (i_sr), 4); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = temp1; - * FLD (i_sr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (i_uimm24); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_simm8); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_simm16); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 1; - CPU (h_lock) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACHI) : /* machi $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACLO) : /* maclo $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACWHI) : /* macwhi $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACWLO) : /* macwlo $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MUL) : /* mul $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULHI) : /* mulhi $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULLO) : /* mullo $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULWHI) : /* mulwhi $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULWLO) : /* mulwlo $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MV) : /* mv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_sr); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFACHI) : /* mvfachi $dr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_seth.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFACLO) : /* mvfaclo $dr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_seth.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (GET_H_ACCUM ()); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFACMI) : /* mvfacmi $dr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_seth.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_CR (FLD (f_r2)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVTACHI) : /* mvtachi $src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVTACLO) : /* mvtaclo $src1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_sr); - SET_H_CR (FLD (f_r1), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NEG) : /* neg $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = NEGSI (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOP) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT) : /* not $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = INVSI (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RAC) : /* rac */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1); - tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); - { - DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RACH) : /* rach */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff)); -if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) { - tmp_tmp1 = MAKEDI (16383, 0x80000000); -} else { -if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) { - tmp_tmp1 = MAKEDI (16760832, 0); -} else { - tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000)); -} -} - tmp_tmp1 = SLLDI (tmp_tmp1, 1); - { - DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RTE) : /* rte */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - USI opval = GET_H_CR (((UINT) 14)); - SET_H_CR (((UINT) 6), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - SET_H_PSW (opval); - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - UQI opval = CPU (h_bbpsw); - CPU (h_bpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_seth.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SLLSI (FLD (f_hi16), 16); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLL) : /* sll $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRA) : /* sra $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRL) : /* srl $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST) : /* st $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB) : /* stb $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_src1); - SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_src1); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STH) : /* sth $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_src1); - SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_src1); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = ADDSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, tmp_new_src2, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - * FLD (i_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = SUBSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, tmp_new_src2, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - * FLD (i_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUB) : /* sub $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBV) : /* subv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBX) : /* subx $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TRAP) : /* trap $uimm4 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_trap.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_CR (((UINT) 6)); - SET_H_CR (((UINT) 14), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - USI opval = ADDSI (pc, 4); - SET_H_CR (((UINT) 6), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - CPU (h_bbpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); - } - { - UQI opval = GET_H_PSW (); - CPU (h_bpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } - { - UQI opval = ANDQI (GET_H_PSW (), 128); - SET_H_PSW (opval); - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_lock)) { - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - { - BI opval = 0; - CPU (h_lock) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ diff --git a/sim/m32r/sem.c b/sim/m32r/sem.c deleted file mode 100644 index 8a20cc1..0000000 --- a/sim/m32r/sem.c +++ /dev/null @@ -1,2704 +0,0 @@ -/* Simulator instruction semantics for m32rbf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#define WANT_CPU m32rbf -#define WANT_CPU_M32RBF - -#include "sim-main.h" -#include "cgen-mem.h" -#include "cgen-ops.h" - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -/* This is used so that we can compile two copies of the semantic code, - one with full feature support and one without that runs fast(er). - FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ -#if FAST_P -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#else -#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) -#endif - -/* x-invalid: --invalid-- */ - -static SEM_PC -SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - - return vpc; -#undef FLD -} - -/* x-after: --after-- */ - -static SEM_PC -SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF - m32rbf_pbb_after (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-before: --before-- */ - -static SEM_PC -SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF - m32rbf_pbb_before (current_cpu, sem_arg); -#endif - } - - return vpc; -#undef FLD -} - -/* x-cti-chain: --cti-chain-- */ - -static SEM_PC -SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF -#ifdef DEFINE_SWITCH - vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-chain: --chain-- */ - -static SEM_PC -SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF - vpc = m32rbf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* x-begin: --begin-- */ - -static SEM_PC -SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RBF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = m32rbf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = m32rbf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - - return vpc; -#undef FLD -} - -/* add: add $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* add3: add3 $dr,$sr,$hash$slo16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* and: and $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* and3: and3 $dr,$sr,$uimm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* or: or $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* or3: or3 $dr,$sr,$hash$ulo16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xor: xor $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* xor3: xor3 $dr,$sr,$uimm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_and3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addi: addi $dr,$simm8 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* addv: addv $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* addv3: addv3 $dr,$sr,$simm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); - temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* addx: addx $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* bc8: bc.s $disp8 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bc24: bc.l $disp24 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* beq: beq $src1,$src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_src1), * FLD (i_src2))) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* beqz: beqz $src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgez: bgez $src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bgtz: bgtz $src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* blez: blez $src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bltz: bltz $src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnez: bnez $src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bl8: bl.s $disp8 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bl24: bl.l $disp24 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnc8: bnc.s $disp8 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bnc24: bnc.l $disp24 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bne: bne $src1,$src2,$disp16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_beq.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_src1), * FLD (i_src2))) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bra8: bra.s $disp8 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl8.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* bra24: bra.l $disp24 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_bl24.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* cmp: cmp $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpi: cmpi $src2,$simm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpu: cmpu $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* cmpui: cmpui $src2,$simm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* div: div $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* divu: divu $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* rem: rem $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* remu: remu $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* jl: jl $sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;USI temp1; - temp0 = ADDSI (ANDSI (pc, -4), 4); - temp1 = ANDSI (* FLD (i_sr), -4); - { - SI opval = temp0; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = temp1; - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* jmp: jmp $sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_jl.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = ANDSI (* FLD (i_sr), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* ld: ld $dr,@$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-d: ld $dr,@($slo16,$sr) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldb: ldb $dr,@$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldb-d: ldb $dr,@($slo16,$sr) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldh: ldh $dr,@$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldh-d: ldh $dr,@($slo16,$sr) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldub: ldub $dr,@$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldub-d: ldub $dr,@($slo16,$sr) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lduh: lduh $dr,@$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lduh-d: lduh $dr,@($slo16,$sr) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ld-plus: ld $dr,@$sr+ */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;SI temp1; - temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - temp1 = ADDSI (* FLD (i_sr), 4); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = temp1; - * FLD (i_sr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* ld24: ld24 $dr,$uimm24 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld24.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (i_uimm24); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldi8: ldi8 $dr,$simm8 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_addi.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_simm8); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* ldi16: ldi16 $dr,$hash$slo16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_simm16); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* lock: lock $dr,@$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 1; - CPU (h_lock) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* machi: machi $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* maclo: maclo $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* macwhi: macwhi $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* macwlo: macwlo $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mul: mul $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mulhi: mulhi $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mullo: mullo $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mulwhi: mulwhi $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mulwlo: mulwlo $src1,$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mv: mv $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_sr); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mvfachi: mvfachi $dr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mvfaclo: mvfaclo $dr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (GET_H_ACCUM ()); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mvfacmi: mvfacmi $dr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mvfc: mvfc $dr,$scr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_CR (FLD (f_r2)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* mvtachi: mvtachi $src1 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mvtaclo: mvtaclo $src1 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - - return vpc; -#undef FLD -} - -/* mvtc: mvtc $sr,$dcr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_sr); - SET_H_CR (FLD (f_r1), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* neg: neg $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = NEGSI (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* nop: nop */ - -static SEM_PC -SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); - - return vpc; -#undef FLD -} - -/* not: not $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_ld_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = INVSI (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* rac: rac */ - -static SEM_PC -SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1); - tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); - { - DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* rach: rach */ - -static SEM_PC -SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff)); -if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) { - tmp_tmp1 = MAKEDI (16383, 0x80000000); -} else { -if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) { - tmp_tmp1 = MAKEDI (16760832, 0); -} else { - tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000)); -} -} - tmp_tmp1 = SLLDI (tmp_tmp1, 1); - { - DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } -} - - return vpc; -#undef FLD -} - -/* rte: rte */ - -static SEM_PC -SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - USI opval = GET_H_CR (((UINT) 14)); - SET_H_CR (((UINT) 6), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - SET_H_PSW (opval); - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - UQI opval = CPU (h_bbpsw); - CPU (h_bpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* seth: seth $dr,$hash$hi16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_seth.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SLLSI (FLD (f_hi16), 16); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sll: sll $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sll3: sll3 $dr,$sr,$simm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* slli: slli $dr,$uimm5 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sra: sra $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sra3: sra3 $dr,$sr,$simm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* srai: srai $dr,$uimm5 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* srl: srl $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* srl3: srl3 $dr,$sr,$simm16 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add3.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* srli: srli $dr,$uimm5 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_slli.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st: st $src1,@$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-d: st $src1,@($slo16,$src2) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stb: stb $src1,@$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_src1); - SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* stb-d: stb $src1,@($slo16,$src2) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_src1); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sth: sth $src1,@$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_src1); - SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* sth-d: sth $src1,@($slo16,$src2) */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_d.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_src1); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* st-plus: st $src1,@+$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = ADDSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, tmp_new_src2, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - * FLD (i_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* st-minus: st $src1,@-$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = SUBSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, tmp_new_src2, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - * FLD (i_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* sub: sub $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - - return vpc; -#undef FLD -} - -/* subv: subv $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* subx: subx $dr,$sr */ - -static SEM_PC -SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_add.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - - return vpc; -#undef FLD -} - -/* trap: trap $uimm4 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_trap.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_CR (((UINT) 6)); - SET_H_CR (((UINT) 14), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - USI opval = ADDSI (pc, 4); - SET_H_CR (((UINT) 6), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - CPU (h_bbpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); - } - { - UQI opval = GET_H_PSW (); - CPU (h_bpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } - { - UQI opval = ANDQI (GET_H_PSW (), 128); - SET_H_PSW (opval); - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); - return vpc; -#undef FLD -} - -/* unlock: unlock $src1,@$src2 */ - -static SEM_PC -SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) -{ -#define FLD(f) abuf->fields.sfmt_st_plus.f - ARGBUF *abuf = SEM_ARGBUF (sem_arg); - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_lock)) { - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - { - BI opval = 0; - CPU (h_lock) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } -} - - abuf->written = written; - return vpc; -#undef FLD -} - -/* Table of all semantic fns. */ - -static const struct sem_fn_desc sem_fns[] = { - { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) }, - { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) }, - { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) }, - { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) }, - { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) }, - { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) }, - { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) }, - { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) }, - { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) }, - { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) }, - { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) }, - { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) }, - { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) }, - { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) }, - { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) }, - { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) }, - { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) }, - { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) }, - { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) }, - { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) }, - { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) }, - { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) }, - { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) }, - { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) }, - { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) }, - { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) }, - { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) }, - { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) }, - { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) }, - { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) }, - { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) }, - { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) }, - { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) }, - { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) }, - { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) }, - { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) }, - { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) }, - { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) }, - { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) }, - { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) }, - { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) }, - { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) }, - { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) }, - { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) }, - { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) }, - { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) }, - { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) }, - { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) }, - { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) }, - { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) }, - { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) }, - { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) }, - { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) }, - { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) }, - { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) }, - { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) }, - { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) }, - { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) }, - { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) }, - { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) }, - { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) }, - { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) }, - { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) }, - { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) }, - { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) }, - { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) }, - { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) }, - { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) }, - { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) }, - { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) }, - { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) }, - { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) }, - { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) }, - { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) }, - { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) }, - { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) }, - { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) }, - { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) }, - { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) }, - { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) }, - { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) }, - { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) }, - { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) }, - { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) }, - { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) }, - { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) }, - { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) }, - { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) }, - { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) }, - { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) }, - { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) }, - { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) }, - { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) }, - { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) }, - { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) }, - { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) }, - { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) }, - { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) }, - { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) }, - { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) }, - { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) }, - { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) }, - { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) }, - { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) }, - { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) }, - { 0, 0 } -}; - -/* Add the semantic fns to IDESC_TABLE. */ - -void -SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu) -{ - IDESC *idesc_table = CPU_IDESC (current_cpu); - const struct sem_fn_desc *sf; - int mach_num = MACH_NUM (CPU_MACH (current_cpu)); - - for (sf = &sem_fns[0]; sf->fn != 0; ++sf) - { - const CGEN_INSN *insn = idesc_table[sf->index].idata; - int valid_p = (CGEN_INSN_VIRTUAL_P (insn) - || CGEN_INSN_MACH_HAS_P (insn, mach_num)); -#if FAST_P - if (valid_p) - idesc_table[sf->index].sem_fast = sf->fn; - else - idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid); -#else - if (valid_p) - idesc_table[sf->index].sem_full = sf->fn; - else - idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid); -#endif - } -} - diff --git a/sim/m32r/semx-switch.c b/sim/m32r/semx-switch.c deleted file mode 100644 index 3cc95b0..0000000 --- a/sim/m32r/semx-switch.c +++ /dev/null @@ -1,6274 +0,0 @@ -/* Simulator instruction semantics for m32rxf. - -THIS FILE IS MACHINE GENERATED WITH CGEN. - -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. - -This file is part of the GNU simulators. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifdef DEFINE_LABELS - - /* The labels have the case they have because the enum of insn types - is all uppercase and in the non-stdc case the insn symbol is built - into the enum name. */ - - static struct { - int index; - void *label; - } labels[] = { - { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, - { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, - { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, - { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, - { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, - { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, - { M32RXF_INSN_ADD, && case_sem_INSN_ADD }, - { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 }, - { M32RXF_INSN_AND, && case_sem_INSN_AND }, - { M32RXF_INSN_AND3, && case_sem_INSN_AND3 }, - { M32RXF_INSN_OR, && case_sem_INSN_OR }, - { M32RXF_INSN_OR3, && case_sem_INSN_OR3 }, - { M32RXF_INSN_XOR, && case_sem_INSN_XOR }, - { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 }, - { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI }, - { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV }, - { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 }, - { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX }, - { M32RXF_INSN_BC8, && case_sem_INSN_BC8 }, - { M32RXF_INSN_BC24, && case_sem_INSN_BC24 }, - { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ }, - { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ }, - { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ }, - { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ }, - { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ }, - { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ }, - { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ }, - { M32RXF_INSN_BL8, && case_sem_INSN_BL8 }, - { M32RXF_INSN_BL24, && case_sem_INSN_BL24 }, - { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 }, - { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 }, - { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 }, - { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 }, - { M32RXF_INSN_BNE, && case_sem_INSN_BNE }, - { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 }, - { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 }, - { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 }, - { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 }, - { M32RXF_INSN_CMP, && case_sem_INSN_CMP }, - { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI }, - { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU }, - { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI }, - { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ }, - { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ }, - { M32RXF_INSN_DIV, && case_sem_INSN_DIV }, - { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU }, - { M32RXF_INSN_REM, && case_sem_INSN_REM }, - { M32RXF_INSN_REMU, && case_sem_INSN_REMU }, - { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH }, - { M32RXF_INSN_JC, && case_sem_INSN_JC }, - { M32RXF_INSN_JNC, && case_sem_INSN_JNC }, - { M32RXF_INSN_JL, && case_sem_INSN_JL }, - { M32RXF_INSN_JMP, && case_sem_INSN_JMP }, - { M32RXF_INSN_LD, && case_sem_INSN_LD }, - { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D }, - { M32RXF_INSN_LDB, && case_sem_INSN_LDB }, - { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D }, - { M32RXF_INSN_LDH, && case_sem_INSN_LDH }, - { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D }, - { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB }, - { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D }, - { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH }, - { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D }, - { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS }, - { M32RXF_INSN_LD24, && case_sem_INSN_LD24 }, - { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 }, - { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 }, - { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK }, - { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A }, - { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A }, - { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A }, - { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A }, - { M32RXF_INSN_MUL, && case_sem_INSN_MUL }, - { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A }, - { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A }, - { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A }, - { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A }, - { M32RXF_INSN_MV, && case_sem_INSN_MV }, - { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A }, - { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A }, - { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A }, - { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC }, - { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A }, - { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A }, - { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC }, - { M32RXF_INSN_NEG, && case_sem_INSN_NEG }, - { M32RXF_INSN_NOP, && case_sem_INSN_NOP }, - { M32RXF_INSN_NOT, && case_sem_INSN_NOT }, - { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI }, - { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI }, - { M32RXF_INSN_RTE, && case_sem_INSN_RTE }, - { M32RXF_INSN_SETH, && case_sem_INSN_SETH }, - { M32RXF_INSN_SLL, && case_sem_INSN_SLL }, - { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 }, - { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI }, - { M32RXF_INSN_SRA, && case_sem_INSN_SRA }, - { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 }, - { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI }, - { M32RXF_INSN_SRL, && case_sem_INSN_SRL }, - { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 }, - { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI }, - { M32RXF_INSN_ST, && case_sem_INSN_ST }, - { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D }, - { M32RXF_INSN_STB, && case_sem_INSN_STB }, - { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D }, - { M32RXF_INSN_STH, && case_sem_INSN_STH }, - { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D }, - { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS }, - { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS }, - { M32RXF_INSN_SUB, && case_sem_INSN_SUB }, - { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV }, - { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX }, - { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP }, - { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK }, - { M32RXF_INSN_SATB, && case_sem_INSN_SATB }, - { M32RXF_INSN_SATH, && case_sem_INSN_SATH }, - { M32RXF_INSN_SAT, && case_sem_INSN_SAT }, - { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ }, - { M32RXF_INSN_SADD, && case_sem_INSN_SADD }, - { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 }, - { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO }, - { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 }, - { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 }, - { M32RXF_INSN_SC, && case_sem_INSN_SC }, - { M32RXF_INSN_SNC, && case_sem_INSN_SNC }, - { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD }, - { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD }, - { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND }, - { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND }, - { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR }, - { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR }, - { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR }, - { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR }, - { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI }, - { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI }, - { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV }, - { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV }, - { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX }, - { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX }, - { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 }, - { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 }, - { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 }, - { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 }, - { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 }, - { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 }, - { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 }, - { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 }, - { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 }, - { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 }, - { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 }, - { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 }, - { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP }, - { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP }, - { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU }, - { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU }, - { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ }, - { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ }, - { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ }, - { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ }, - { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC }, - { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC }, - { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC }, - { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC }, - { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL }, - { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL }, - { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP }, - { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP }, - { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD }, - { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD }, - { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB }, - { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB }, - { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH }, - { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH }, - { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB }, - { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB }, - { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH }, - { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH }, - { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS }, - { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS }, - { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 }, - { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 }, - { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK }, - { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK }, - { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A }, - { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A }, - { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A }, - { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A }, - { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A }, - { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A }, - { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A }, - { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A }, - { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL }, - { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL }, - { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A }, - { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A }, - { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A }, - { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A }, - { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A }, - { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A }, - { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A }, - { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A }, - { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV }, - { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV }, - { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A }, - { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A }, - { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A }, - { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A }, - { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A }, - { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A }, - { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC }, - { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC }, - { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A }, - { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A }, - { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A }, - { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A }, - { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC }, - { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC }, - { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG }, - { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG }, - { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP }, - { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP }, - { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT }, - { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT }, - { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI }, - { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI }, - { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI }, - { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI }, - { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE }, - { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE }, - { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL }, - { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL }, - { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI }, - { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI }, - { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA }, - { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA }, - { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI }, - { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI }, - { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL }, - { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL }, - { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI }, - { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI }, - { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST }, - { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST }, - { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB }, - { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB }, - { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH }, - { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH }, - { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS }, - { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS }, - { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS }, - { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS }, - { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB }, - { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB }, - { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV }, - { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV }, - { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX }, - { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX }, - { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP }, - { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP }, - { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK }, - { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK }, - { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ }, - { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ }, - { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD }, - { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD }, - { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 }, - { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 }, - { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO }, - { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO }, - { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 }, - { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 }, - { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 }, - { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 }, - { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC }, - { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC }, - { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC }, - { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC }, - { 0, 0 } - }; - int i; - - for (i = 0; labels[i].label != 0; ++i) - { -#if FAST_P - CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; -#else - CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; -#endif - } - -#undef DEFINE_LABELS -#endif /* DEFINE_LABELS */ - -#ifdef DEFINE_SWITCH - -/* If hyper-fast [well not unnecessarily slow] execution is selected, turn - off frills like tracing and profiling. */ -/* FIXME: A better way would be to have TRACE_RESULT check for something - that can cause it to be optimized out. Another way would be to emit - special handlers into the instruction "stream". */ - -#if FAST_P -#undef TRACE_RESULT -#define TRACE_RESULT(cpu, abuf, name, type, val) -#endif - -#undef GET_ATTR -#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) -#else -#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) -#endif - -{ - -#if WITH_SCACHE_PBB - -/* Branch to next handler without going around main loop. */ -#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case -SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) - -#else /* ! WITH_SCACHE_PBB */ - -#define NEXT(vpc) BREAK (sem) -#ifdef __GNUC__ -#if FAST_P - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) -#endif -#else - SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) -#endif - -#endif /* ! WITH_SCACHE_PBB */ - - { - - CASE (sem, INSN_X_INVALID) : /* --invalid-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { - /* Update the recorded pc in the cpu state struct. - Only necessary for WITH_SCACHE case, but to avoid the - conditional compilation .... */ - SET_H_PC (pc); - /* Virtual insns have zero size. Overwrite vpc with address of next insn - using the default-insn-bitsize spec. When executing insns in parallel - we may want to queue the fault and continue execution. */ - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_AFTER) : /* --after-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RXF - m32rxf_pbb_after (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEFORE) : /* --before-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RXF - m32rxf_pbb_before (current_cpu, sem_arg); -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RXF -#ifdef DEFINE_SWITCH - vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg, - pbb_br_type, pbb_br_npc); - BREAK (sem); -#else - /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ - vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg, - CPU_PBB_BR_TYPE (current_cpu), - CPU_PBB_BR_NPC (current_cpu)); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_CHAIN) : /* --chain-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RXF - vpc = m32rxf_pbb_chain (current_cpu, sem_arg); -#ifdef DEFINE_SWITCH - BREAK (sem); -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_X_BEGIN) : /* --begin-- */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - { -#if WITH_SCACHE_PBB_M32RXF -#if defined DEFINE_SWITCH || defined FAST_P - /* In the switch case FAST_P is a constant, allowing several optimizations - in any called inline functions. */ - vpc = m32rxf_pbb_begin (current_cpu, FAST_P); -#else -#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ - vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); -#else - vpc = m32rxf_pbb_begin (current_cpu, 0); -#endif -#endif -#endif - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD) : /* add $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND) : /* and $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_and3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR) : /* or $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_and3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR) : /* xor $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_and3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDV) : /* addv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); - temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ADDX) : /* addx $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BC8) : /* bc.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BC24) : /* bc.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_src1), * FLD (i_src2))) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (EQSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (GTSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (LTSI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_src2), 0)) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BL8) : /* bl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BL24) : /* bl.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -{ - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (CPU (h_cond)) { -{ - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_beq.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_src1), * FLD (i_src2))) { - { - USI opval = FLD (i_disp16); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA8) : /* bra.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BRA24) : /* bra.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NOTBI (CPU (h_cond))) { -{ - { - SI opval = ADDSI (pc, 4); - CPU (h_gr[((UINT) 14)]) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp24); - SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (* FLD (i_src1), * FLD (i_src2)); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_CMPZ) : /* cmpz $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (* FLD (i_src2), 0); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIV) : /* div $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVU) : /* divu $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REM) : /* rem $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_REMU) : /* remu $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_DIVH) : /* divh $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - -if (NESI (* FLD (i_sr), 0)) { - { - SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr)); - * FLD (i_dr) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JC) : /* jc $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { - { - USI opval = ANDSI (* FLD (i_sr), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JNC) : /* jnc $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = ANDSI (* FLD (i_sr), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JL) : /* jl $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;USI temp1; - temp0 = ADDSI (ANDSI (pc, -4), 4); - temp1 = ANDSI (* FLD (i_sr), -4); - { - SI opval = temp0; - CPU (h_gr[((UINT) 14)]) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = temp1; - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_JMP) : /* jmp $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = ANDSI (* FLD (i_sr), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD) : /* ld $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;SI temp1; - temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - temp1 = ADDSI (* FLD (i_sr), 4); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = temp1; - * FLD (i_sr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld24.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (i_uimm24); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_simm8); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = FLD (f_simm16); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 1; - CPU (h_lock) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MUL) : /* mul $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))); - SET_H_ACCUMS (FLD (f_acc), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MV) : /* mv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_sr); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_CR (FLD (f_r2)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); - SET_H_ACCUMS (FLD (f_accs), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); - SET_H_ACCUMS (FLD (f_accs), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_sr); - SET_H_CR (FLD (f_r1), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NEG) : /* neg $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = NEGSI (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOP) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_NOT) : /* not $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = INVSI (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_rac_dsi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); - tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); - { - DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); - SET_H_ACCUMS (FLD (f_accd), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_rac_dsi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); - tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000)); - { - DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))); - SET_H_ACCUMS (FLD (f_accd), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_RTE) : /* rte */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - USI opval = GET_H_CR (((UINT) 14)); - SET_H_CR (((UINT) 6), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - SET_H_PSW (opval); - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - UQI opval = CPU (h_bbpsw); - CPU (h_bpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_seth.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SLLSI (FLD (f_hi16), 16); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLL) : /* sll $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRA) : /* sra $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRL) : /* srl $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add3.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST) : /* st $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB) : /* stb $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_src1); - SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - QI opval = * FLD (i_src1); - SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STH) : /* sth $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_src1); - SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_d.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - HI opval = * FLD (i_src1); - SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = ADDSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, tmp_new_src2, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - * FLD (i_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = SUBSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, tmp_new_src2, opval); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - * FLD (i_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUB) : /* sub $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBV) : /* subv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SUBX) : /* subx $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_TRAP) : /* trap $uimm4 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_trap.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_CR (((UINT) 6)); - SET_H_CR (((UINT) 14), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - USI opval = ADDSI (pc, 4); - SET_H_CR (((UINT) 6), opval); - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - CPU (h_bbpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); - } - { - UQI opval = GET_H_PSW (); - CPU (h_bpsw) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } - { - UQI opval = ANDQI (GET_H_PSW (), 128); - SET_H_PSW (opval); - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - SEM_BRANCH_FINI (vpc); -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_lock)) { - { - SI opval = * FLD (i_src1); - SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - { - BI opval = 0; - CPU (h_lock) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } -} - - abuf->written = written; -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SATB) : /* satb $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SATH) : /* sath $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr)); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SAT) : /* sat $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 4); - - { - SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr))); - * FLD (i_dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0); - CPU (h_cond) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SADD) : /* sadd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0))); - SET_H_ACCUMS (((UINT) 0), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8); - SET_H_ACCUMS (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8); - SET_H_ACCUM (opval); - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16); - SET_H_ACCUMS (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8); - SET_H_ACCUMS (((UINT) 1), opval); - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SC) : /* sc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ZEXTBISI (CPU (h_cond))) - SEM_SKIP_INSN (current_cpu, sem_arg, vpc); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_SNC) : /* snc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ZEXTBISI (NOTBI (CPU (h_cond)))) - SEM_SKIP_INSN (current_cpu, sem_arg, vpc); - -#undef FLD -} - NEXT (vpc); - - CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f -#define OPRND(f) par_exec->operands.sfmt_addi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_addi.f -#define OPRND(f) par_exec->operands.sfmt_addi.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addv.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addv.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addx.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addx.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bc8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { - { - USI opval = FLD (i_disp8); - OPRND (pc) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bc8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - if (written & (1 << 2)) - { - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - } - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - OPRND (h_gr_SI_14) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - OPRND (pc) = opval; - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bl8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bcl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - OPRND (h_gr_SI_14) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - OPRND (pc) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bcl8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - if (written & (1 << 3)) - { - CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); - } - if (written & (1 << 4)) - { - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - } - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bc8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = FLD (i_disp8); - OPRND (pc) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bc8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - if (written & (1 << 2)) - { - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - } - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bra8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = FLD (i_disp8); - OPRND (pc) = opval; - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bra8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bcl8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { -{ - { - SI opval = ADDSI (ANDSI (pc, -4), 4); - OPRND (h_gr_SI_14) = opval; - written |= (1 << 3); - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = FLD (i_disp8); - OPRND (pc) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_bl8.f -#define OPRND(f) par_exec->operands.sfmt_bcl8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - if (written & (1 << 3)) - { - CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); - } - if (written & (1 << 4)) - { - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - } - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmp.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmp.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (* FLD (i_src1), * FLD (i_src2)); - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmp.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmpz.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = EQSI (* FLD (i_src2), 0); - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmpz.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_JC) : /* jc $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jc.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (CPU (h_cond)) { - { - USI opval = ANDSI (* FLD (i_sr), -4); - OPRND (pc) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_JC) : /* jc $sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jc.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - if (written & (1 << 2)) - { - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - } - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_JNC) : /* jnc $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jc.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (NOTBI (CPU (h_cond))) { - { - USI opval = ANDSI (* FLD (i_sr), -4); - OPRND (pc) = opval; - written |= (1 << 2); - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jc.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - if (written & (1 << 2)) - { - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - } - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_JL) : /* jl $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jl.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;USI temp1; - temp0 = ADDSI (ANDSI (pc, -4), 4); - temp1 = ANDSI (* FLD (i_sr), -4); - { - SI opval = temp0; - OPRND (h_gr_SI_14) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - USI opval = temp1; - OPRND (pc) = opval; - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_JL) : /* jl $sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jl.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_JMP) : /* jmp $sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jmp.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = ANDSI (* FLD (i_sr), -4); - OPRND (pc) = opval; - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_jl.f -#define OPRND(f) par_exec->operands.sfmt_jmp.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ld.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ld.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldb.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldb.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldh.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldh.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldb.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldb.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldh.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ldh.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ld_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;SI temp1; - temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - temp1 = ADDSI (* FLD (i_sr), 4); - { - SI opval = temp0; - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - SI opval = temp1; - OPRND (sr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_ld_plus.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - * FLD (i_sr) = OPRND (sr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_addi.f -#define OPRND(f) par_exec->operands.sfmt_ldi8.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = FLD (f_simm8); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_addi.f -#define OPRND(f) par_exec->operands.sfmt_ldi8.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_lock.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - BI opval = 1; - OPRND (h_lock_BI) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } - { - SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_lock.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - CPU (h_lock) = OPRND (h_lock_BI); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_machi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))); - OPRND (acc) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_machi_a.f -#define OPRND(f) par_exec->operands.sfmt_mulhi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_acc), OPRND (acc)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mv.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_sr); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mv.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs))); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_mvfachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mvfc.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = GET_H_CR (FLD (f_r2)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mvfc.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); - OPRND (accs) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_accs), OPRND (accs)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); - OPRND (accs) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_mvtachi_a.f -#define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_accs), OPRND (accs)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mvtc.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - USI opval = * FLD (i_sr); - OPRND (dcr) = opval; - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mvtc.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_CR (FLD (f_r1), OPRND (dcr)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mv.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = NEGSI (* FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mv.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_NOP) : /* nop */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_nop.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_NOP) : /* nop */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_nop.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mv.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = INVSI (* FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_ld_plus.f -#define OPRND(f) par_exec->operands.sfmt_mv.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_rac_dsi.f -#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); - tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); - { - DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); - OPRND (accd) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_rac_dsi.f -#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_accd), OPRND (accd)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_rac_dsi.f -#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - DI tmp_tmp1; - tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1)); - tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000)); - { - DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))); - OPRND (accd) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_rac_dsi.f -#define OPRND(f) par_exec->operands.sfmt_rac_dsi.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (FLD (f_accd), OPRND (accd)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_RTE) : /* rte */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_rte.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); - OPRND (pc) = opval; - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } - { - USI opval = GET_H_CR (((UINT) 14)); - OPRND (h_cr_USI_6) = opval; - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - OPRND (h_psw_UQI) = opval; - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - UQI opval = CPU (h_bbpsw); - OPRND (h_bpsw_UQI) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_RTE) : /* rte */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_rte.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_bpsw) = OPRND (h_bpsw_UQI); - SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6)); - SET_H_PSW (OPRND (h_psw_UQI)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f -#define OPRND(f) par_exec->operands.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_slli.f -#define OPRND(f) par_exec->operands.sfmt_slli.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f -#define OPRND(f) par_exec->operands.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_slli.f -#define OPRND(f) par_exec->operands.sfmt_slli.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_slli.f -#define OPRND(f) par_exec->operands.sfmt_slli.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_slli.f -#define OPRND(f) par_exec->operands.sfmt_slli.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_st.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = * FLD (i_src1); - OPRND (h_memory_SI_src2_idx) = * FLD (i_src2); - OPRND (h_memory_SI_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_st.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_stb.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - QI opval = * FLD (i_src1); - OPRND (h_memory_QI_src2_idx) = * FLD (i_src2); - OPRND (h_memory_QI_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_stb.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_sth.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - HI opval = * FLD (i_src1); - OPRND (h_memory_HI_src2_idx) = * FLD (i_src2); - OPRND (h_memory_HI_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_sth.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = ADDSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2; - OPRND (h_memory_SI_new_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - OPRND (src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_st_plus.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2)); - * FLD (i_src2) = OPRND (src2); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_st_plus.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI tmp_new_src2; - tmp_new_src2 = SUBSI (* FLD (i_src2), 4); - { - SI opval = * FLD (i_src1); - OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2; - OPRND (h_memory_SI_new_src2) = opval; - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } - { - SI opval = tmp_new_src2; - OPRND (src2) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_st_plus.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2)); - * FLD (i_src2) = OPRND (src2); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_add.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addv.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); - temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); - { - SI opval = temp0; - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addv.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addx.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - SI temp0;BI temp1; - temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); - { - SI opval = temp0; - OPRND (dr) = opval; - TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); - } - { - BI opval = temp1; - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_add.f -#define OPRND(f) par_exec->operands.sfmt_addx.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - * FLD (i_dr) = OPRND (dr); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_trap.f -#define OPRND(f) par_exec->operands.sfmt_trap.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ - { - USI opval = GET_H_CR (((UINT) 6)); - OPRND (h_cr_USI_14) = opval; - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - USI opval = ADDSI (pc, 4); - OPRND (h_cr_USI_6) = opval; - TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); - } - { - UQI opval = CPU (h_bpsw); - OPRND (h_bbpsw_UQI) = opval; - TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); - } - { - UQI opval = GET_H_PSW (); - OPRND (h_bpsw_UQI) = opval; - TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); - } - { - UQI opval = ANDQI (GET_H_PSW (), 128); - OPRND (h_psw_UQI) = opval; - TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); - } - { - SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); - OPRND (pc) = opval; - TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); - } -} - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_trap.f -#define OPRND(f) par_exec->operands.sfmt_trap.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - SEM_BRANCH_INIT - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_bbpsw) = OPRND (h_bbpsw_UQI); - CPU (h_bpsw) = OPRND (h_bpsw_UQI); - SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14)); - SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6)); - SET_H_PSW (OPRND (h_psw_UQI)); - SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc); - - SEM_BRANCH_FINI (vpc); -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_unlock.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -{ -if (CPU (h_lock)) { - { - SI opval = * FLD (i_src1); - OPRND (h_memory_SI_src2_idx) = * FLD (i_src2); - OPRND (h_memory_SI_src2) = opval; - written |= (1 << 4); - TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); - } -} - { - BI opval = 0; - OPRND (h_lock_BI) = opval; - TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); - } -} - - abuf->written = written; -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_unlock.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_lock) = OPRND (h_lock_BI); - if (written & (1 << 4)) - { - SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2)); - } - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmpz.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0); - OPRND (condbit) = opval; - TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_cmpz.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - CPU (h_cond) = OPRND (condbit); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SADD) : /* sadd */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_sadd.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0))); - OPRND (h_accums_DI_0) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SADD) : /* sadd */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_sadd.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_macwu1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8); - OPRND (h_accums_DI_1) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_macwu1.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_msblo.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8); - OPRND (accum) = opval; - TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_msblo.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUM (OPRND (accum)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_mulwu1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16); - OPRND (h_accums_DI_1) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_mulwu1.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_macwu1.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - - { - DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8); - OPRND (h_accums_DI_1) = opval; - TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval); - } - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.sfmt_st_plus.f -#define OPRND(f) par_exec->operands.sfmt_macwu1.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1)); - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SC) : /* sc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_sc.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ZEXTBISI (CPU (h_cond))) - SEM_SKIP_INSN (current_cpu, sem_arg, vpc); - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SC) : /* sc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_sc.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - CASE (sem, INSN_PAR_SNC) : /* snc */ -{ - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - ARGBUF *abuf = SEM_ARGBUF (sem_arg); -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_sc.f - int UNUSED written = 0; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 2); - -if (ZEXTBISI (NOTBI (CPU (h_cond)))) - SEM_SKIP_INSN (current_cpu, sem_arg, vpc); - -#undef OPRND -#undef FLD -} - NEXT (vpc); - -CASE (sem, INSN_WRITE_SNC) : /* snc */ - { - SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); - const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf; -#define FLD(f) abuf->fields.fmt_empty.f -#define OPRND(f) par_exec->operands.sfmt_sc.f - int UNUSED written = abuf->written; - IADDR UNUSED pc = abuf->addr; - vpc = SEM_NEXT_VPC (sem_arg, pc, 0); - - -#undef OPRND -#undef FLD - } - NEXT (vpc); - - - } - ENDSWITCH (sem) /* End of semantic switch. */ - - /* At this point `vpc' contains the next insn to execute. */ -} - -#undef DEFINE_SWITCH -#endif /* DEFINE_SWITCH */ diff --git a/sim/m32r/sim-if.c b/sim/m32r/sim-if.c deleted file mode 100644 index a7cbe1c..0000000 --- a/sim/m32r/sim-if.c +++ /dev/null @@ -1,292 +0,0 @@ -/* Main simulator entry points specific to the M32R. - Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#include "sim-options.h" -#include "libiberty.h" -#include "bfd.h" - -#ifdef HAVE_STRING_H -#include <string.h> -#else -#ifdef HAVE_STRINGS_H -#include <strings.h> -#endif -#endif -#ifdef HAVE_STDLIB_H -#include <stdlib.h> -#endif - -static void free_state (SIM_DESC); -static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose); - -/* Records simulator descriptor so utilities like m32r_dump_regs can be - called from gdb. */ -SIM_DESC current_state; - -/* Cover function of sim_state_free to free the cpu buffers as well. */ - -static void -free_state (SIM_DESC sd) -{ - if (STATE_MODULES (sd) != NULL) - sim_module_uninstall (sd); - sim_cpu_free_all (sd); - sim_state_free (sd); -} - -/* Create an instance of the simulator. */ - -SIM_DESC -sim_open (kind, callback, abfd, argv) - SIM_OPEN_KIND kind; - host_callback *callback; - struct _bfd *abfd; - char **argv; -{ - SIM_DESC sd = sim_state_alloc (kind, callback); - char c; - int i; - - /* The cpu data is kept in a separately allocated chunk of memory. */ - if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#if 0 /* FIXME: pc is in mach-specific struct */ - /* FIXME: watchpoints code shouldn't need this */ - { - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - STATE_WATCHPOINTS (sd)->pc = &(PC); - STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); - } -#endif - - if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - -#ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */ - if (dv_sockser_install (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } -#endif - -#if 0 /* FIXME: 'twould be nice if we could do this */ - /* These options override any module options. - Obviously ambiguity should be avoided, however the caller may wish to - augment the meaning of an option. */ - if (extra_options != NULL) - sim_add_option_table (sd, extra_options); -#endif - - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ - if (sim_parse_args (sd, argv) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Allocate a handler for the control registers and other devices - if no memory for that range has been allocated by the user. - All are allocated in one chunk to keep things from being - unnecessarily complicated. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0) - sim_core_attach (sd, NULL, - 0 /*level*/, - access_read_write, - 0 /*space ???*/, - M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/, - 0 /*modulo*/, - &m32r_devices, - NULL /*buffer*/); - - /* Allocate core managed memory if none specified by user. - Use address 4 here in case the user wanted address 0 unmapped. */ - if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0) - sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE); - - /* check for/establish the reference program image */ - if (sim_analyze_program (sd, - (STATE_PROG_ARGV (sd) != NULL - ? *STATE_PROG_ARGV (sd) - : NULL), - abfd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Establish any remaining configuration options. */ - if (sim_config (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - if (sim_post_argv_init (sd) != SIM_RC_OK) - { - free_state (sd); - return 0; - } - - /* Open a copy of the cpu descriptor table. */ - { - CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, - CGEN_ENDIAN_BIG); - for (i = 0; i < MAX_NR_PROCESSORS; ++i) - { - SIM_CPU *cpu = STATE_CPU (sd, i); - CPU_CPU_DESC (cpu) = cd; - CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn; - } - m32r_cgen_init_dis (cd); - } - - /* Initialize various cgen things not done by common framework. - Must be done after m32r_cgen_cpu_open. */ - cgen_init (sd); - - for (c = 0; c < MAX_NR_PROCESSORS; ++c) - { - /* Only needed for profiling, but the structure member is small. */ - memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0, - sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)))); - /* Hook in callback for reporting these stats */ - PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i))) - = print_m32r_misc_cpu; - } - - /* Store in a global so things like sparc32_dump_regs can be invoked - from the gdb command line. */ - current_state = sd; - - return sd; -} - -void -sim_close (sd, quitting) - SIM_DESC sd; - int quitting; -{ - m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0))); - sim_module_uninstall (sd); -} - -SIM_RC -sim_create_inferior (sd, abfd, argv, envp) - SIM_DESC sd; - struct _bfd *abfd; - char **argv; - char **envp; -{ - SIM_CPU *current_cpu = STATE_CPU (sd, 0); - SIM_ADDR addr; - - if (abfd != NULL) - addr = bfd_get_start_address (abfd); - else - addr = 0; - sim_pc_set (current_cpu, addr); - -#if 0 - STATE_ARGV (sd) = sim_copy_argv (argv); - STATE_ENVP (sd) = sim_copy_argv (envp); -#endif - - return SIM_RC_OK; -} - -/* PROFILE_CPU_CALLBACK */ - -static void -print_m32r_misc_cpu (SIM_CPU *cpu, int verbose) -{ - SIM_DESC sd = CPU_STATE (cpu); - char buf[20]; - - if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX]) - { - sim_io_printf (sd, "Miscellaneous Statistics\n\n"); - sim_io_printf (sd, " %-*s %s\n\n", - PROFILE_LABEL_WIDTH, "Fill nops:", - sim_add_commas (buf, sizeof (buf), - CPU_M32R_MISC_PROFILE (cpu)->fillnop_count)); - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx) - sim_io_printf (sd, " %-*s %s\n\n", - PROFILE_LABEL_WIDTH, "Parallel insns:", - sim_add_commas (buf, sizeof (buf), - CPU_M32R_MISC_PROFILE (cpu)->parallel_count)); - } -} - -void -sim_do_command (sd, cmd) - SIM_DESC sd; - char *cmd; -{ - char **argv; - - if (cmd == NULL) - return; - - argv = buildargv (cmd); - - if (argv[0] != NULL - && strcasecmp (argv[0], "info") == 0 - && argv[1] != NULL - && strncasecmp (argv[1], "reg", 3) == 0) - { - SI val; - - /* We only support printing bbpsw,bbpc here as there is no equivalent - functionality in gdb. */ - if (argv[2] == NULL) - sim_io_eprintf (sd, "Missing register in `%s'\n", cmd); - else if (argv[3] != NULL) - sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd); - else if (strcasecmp (argv[2], "bbpsw") == 0) - { - val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW); - sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val); - } - else if (strcasecmp (argv[2], "bbpc") == 0) - { - val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC); - sim_io_printf (sd, "bbpc 0x%x %d\n", val, val); - } - else - sim_io_eprintf (sd, "Printing of register `%s' not supported with `sim info'\n", - argv[2]); - } - else - { - if (sim_args_command (sd, cmd) != SIM_RC_OK) - sim_io_eprintf (sd, "Unknown sim command `%s'\n", cmd); - } - - freeargv (argv); -} diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h deleted file mode 100644 index efd1e91..0000000 --- a/sim/m32r/sim-main.h +++ /dev/null @@ -1,88 +0,0 @@ - -/* Main header for the m32r. */ - -#ifndef SIM_MAIN_H -#define SIM_MAIN_H - -#define USING_SIM_BASE_H /* FIXME: quick hack */ - -struct _sim_cpu; /* FIXME: should be in sim-basics.h */ -typedef struct _sim_cpu SIM_CPU; - -#include "symcat.h" -#include "sim-basics.h" -#include "cgen-types.h" -#include "m32r-desc.h" -#include "m32r-opc.h" -#include "arch.h" - -/* These must be defined before sim-base.h. */ -typedef USI sim_cia; - -#define CIA_GET(cpu) CPU_PC_GET (cpu) -#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val)) - -#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \ -do { \ - if (cpu) /* null if ctrl-c */ \ - sim_pc_set ((cpu), (cia)); \ -} while (0) -#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \ -do { \ - sim_pc_set ((cpu), (cia)); \ -} while (0) - -#include "sim-base.h" -#include "cgen-sim.h" -#include "m32r-sim.h" -#include "opcode/cgen.h" - -/* The _sim_cpu struct. */ - -struct _sim_cpu { - /* sim/common cpu base. */ - sim_cpu_base base; - - /* Static parts of cgen. */ - CGEN_CPU cgen_cpu; - - M32R_MISC_PROFILE m32r_misc_profile; -#define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile) - - /* CPU specific parts go here. - Note that in files that don't need to access these pieces WANT_CPU_FOO - won't be defined and thus these parts won't appear. This is ok in the - sense that things work. It is a source of bugs though. - One has to of course be careful to not take the size of this - struct and no structure members accessed in non-cpu specific files can - go after here. Oh for a better language. */ -#if defined (WANT_CPU_M32RBF) - M32RBF_CPU_DATA cpu_data; -#elif defined (WANT_CPU_M32RXF) - M32RXF_CPU_DATA cpu_data; -#endif -}; - -/* The sim_state struct. */ - -struct sim_state { - sim_cpu *cpu; -#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) - - CGEN_STATE cgen_state; - - sim_state_base base; -}; - -/* Misc. */ - -/* Catch address exceptions. */ -extern SIM_CORE_SIGNAL_FN m32r_core_signal; -#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ -m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ - (TRANSFER), (ERROR)) - -/* Default memory size. */ -#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */ - -#endif /* SIM_MAIN_H */ diff --git a/sim/m32r/tconfig.in b/sim/m32r/tconfig.in deleted file mode 100644 index f2599e3..0000000 --- a/sim/m32r/tconfig.in +++ /dev/null @@ -1,47 +0,0 @@ -/* M32R target configuration file. -*- C -*- */ - -#ifndef M32R_TCONFIG_H -#define M32R_TCONFIG_H - -/* Define this if the simulator can vary the size of memory. - See the xxx simulator for an example. - This enables the `-m size' option. - The memory size is stored in STATE_MEM_SIZE. */ -/* Not used for M32R since we use the memory module. */ -/* #define SIM_HAVE_MEM_SIZE */ - -/* See sim-hload.c. We properly handle LMA. */ -#define SIM_HANDLES_LMA 1 - -/* For MSPR support. FIXME: revisit. */ -#define WITH_DEVICES 1 - -/* FIXME: Revisit. */ -#ifdef HAVE_DV_SOCKSER -MODULE_INSTALL_FN dv_sockser_install; -#define MODULE_LIST dv_sockser_install, -#endif - -#if 0 -/* Enable watchpoints. */ -#define WITH_WATCHPOINTS 1 -#endif - -/* Define this to enable the intrinsic breakpoint mechanism. */ -/* FIXME: may be able to remove SIM_HAVE_BREAKPOINT since it essentially - duplicates ifdef SIM_BREAKPOINT (right?) */ -#if 0 -#define SIM_HAVE_BREAKPOINTS -#define SIM_BREAKPOINT { 0x10, 0xf1 } -#define SIM_BREAKPOINT_SIZE 2 -#endif -#if 0 -#define HAVE_DV_SOCKSER -#endif - -/* This is a global setting. Different cpu families can't mix-n-match -scache - and -pbb. However some cpu families may use -simple while others use - one of -scache/-pbb. */ -#define WITH_SCACHE_PBB 1 - -#endif /* M32R_TCONFIG_H */ diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c deleted file mode 100644 index 2721ad8..0000000 --- a/sim/m32r/traps.c +++ /dev/null @@ -1,182 +0,0 @@ -/* m32r exception, interrupt, and trap (EIT) support - Copyright (C) 1998 Free Software Foundation, Inc. - Contributed by Cygnus Solutions. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#include "sim-main.h" -#include "targ-vals.h" - -/* The semantic code invokes this for invalid (unrecognized) instructions. - CIA is the address with the invalid insn. - VPC is the virtual pc of the following insn. */ - -SEM_PC -sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC vpc) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - -#if 0 - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - h_bsm_set (current_cpu, h_sm_get (current_cpu)); - h_bie_set (current_cpu, h_ie_get (current_cpu)); - h_bcond_set (current_cpu, h_cond_get (current_cpu)); - /* sm not changed */ - h_ie_set (current_cpu, 0); - h_cond_set (current_cpu, 0); - - h_bpc_set (current_cpu, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_RSVD_INSN_ADDR); - } - else -#endif - sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL); - return vpc; -} - -/* Process an address exception. */ - -void -m32r_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia, - unsigned int map, int nr_bytes, address_word addr, - transfer_type transfer, sim_core_signals sig) -{ - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - a_m32r_h_cr_set (current_cpu, H_CR_BBPC, - a_m32r_h_cr_get (current_cpu, H_CR_BPC)); - if (MACH_NUM (CPU_MACH (current_cpu)) == MACH_M32R) - { - m32rbf_h_bpsw_set (current_cpu, m32rbf_h_psw_get (current_cpu)); - /* sm not changed */ - m32rbf_h_psw_set (current_cpu, m32rbf_h_psw_get (current_cpu) & 0x80); - } - else - { - m32rxf_h_bpsw_set (current_cpu, m32rxf_h_psw_get (current_cpu)); - /* sm not changed */ - m32rxf_h_psw_set (current_cpu, m32rxf_h_psw_get (current_cpu) & 0x80); - } - a_m32r_h_cr_set (current_cpu, H_CR_BPC, cia); - - sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL, - EIT_ADDR_EXCP_ADDR); - } - else - sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr, - transfer, sig); -} - -/* Read/write functions for system call interface. */ - -static int -syscall_read_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); -} - -static int -syscall_write_mem (host_callback *cb, struct cb_syscall *sc, - unsigned long taddr, const char *buf, int bytes) -{ - SIM_DESC sd = (SIM_DESC) sc->p1; - SIM_CPU *cpu = (SIM_CPU *) sc->p2; - - return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); -} - -/* Trap support. - The result is the pc address to continue at. - Preprocessing like saving the various registers has already been done. */ - -USI -m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num) -{ - SIM_DESC sd = CPU_STATE (current_cpu); - host_callback *cb = STATE_CALLBACK (sd); - -#ifdef SIM_HAVE_BREAKPOINTS - /* Check for breakpoints "owned" by the simulator first, regardless - of --environment. */ - if (num == TRAP_BREAKPOINT) - { - /* First try sim-break.c. If it's a breakpoint the simulator "owns" - it doesn't return. Otherwise it returns and let's us try. */ - sim_handle_breakpoint (sd, current_cpu, pc); - /* Fall through. */ - } -#endif - - if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) - { - /* The new pc is the trap vector entry. - We assume there's a branch there to some handler. */ - USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; - return new_pc; - } - - switch (num) - { - case TRAP_SYSCALL : - { - CB_SYSCALL s; - - CB_SYSCALL_INIT (&s); - s.func = a_m32r_h_gr_get (current_cpu, 0); - s.arg1 = a_m32r_h_gr_get (current_cpu, 1); - s.arg2 = a_m32r_h_gr_get (current_cpu, 2); - s.arg3 = a_m32r_h_gr_get (current_cpu, 3); - - if (s.func == TARGET_SYS_exit) - { - sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1); - } - - s.p1 = (PTR) sd; - s.p2 = (PTR) current_cpu; - s.read_mem = syscall_read_mem; - s.write_mem = syscall_write_mem; - cb_syscall (cb, &s); - a_m32r_h_gr_set (current_cpu, 2, s.errcode); - a_m32r_h_gr_set (current_cpu, 0, s.result); - a_m32r_h_gr_set (current_cpu, 1, s.result2); - break; - } - - case TRAP_BREAKPOINT: - sim_engine_halt (sd, current_cpu, NULL, pc, - sim_stopped, SIM_SIGTRAP); - break; - - default : - { - USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; - return new_pc; - } - } - - /* Fake an "rte" insn. */ - /* FIXME: Should duplicate all of rte processing. */ - return (pc & -4) + 4; -} |