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-rwxr-xr-xsim/igen/compare_igen_models2
-rw-r--r--sim/igen/filter.c2
-rw-r--r--sim/igen/filter.h2
-rw-r--r--sim/igen/filter_host.c2
-rw-r--r--sim/igen/filter_host.h2
-rw-r--r--sim/igen/gen-engine.c4
-rw-r--r--sim/igen/gen-engine.h2
-rw-r--r--sim/igen/gen-icache.c6
-rw-r--r--sim/igen/gen-icache.h2
-rw-r--r--sim/igen/gen-idecode.c2
-rw-r--r--sim/igen/gen-idecode.h2
-rw-r--r--sim/igen/gen-itable.c2
-rw-r--r--sim/igen/gen-itable.h2
-rw-r--r--sim/igen/gen-model.c2
-rw-r--r--sim/igen/gen-model.h2
-rw-r--r--sim/igen/gen-semantics.c4
-rw-r--r--sim/igen/gen-semantics.h6
-rw-r--r--sim/igen/gen-support.c2
-rw-r--r--sim/igen/gen-support.h2
-rw-r--r--sim/igen/gen.c6
-rw-r--r--sim/igen/gen.h2
-rw-r--r--sim/igen/igen.c4
-rw-r--r--sim/igen/igen.h4
-rw-r--r--sim/igen/ld-cache.c2
-rw-r--r--sim/igen/ld-cache.h2
-rw-r--r--sim/igen/ld-decode.c4
-rw-r--r--sim/igen/ld-decode.h6
-rw-r--r--sim/igen/ld-insn.c10
-rw-r--r--sim/igen/ld-insn.h2
-rw-r--r--sim/igen/lf.c2
-rw-r--r--sim/igen/lf.h4
-rw-r--r--sim/igen/local.mk2
-rw-r--r--sim/igen/misc.c2
-rw-r--r--sim/igen/misc.h2
-rw-r--r--sim/igen/table.c2
-rw-r--r--sim/igen/table.h2
36 files changed, 54 insertions, 54 deletions
diff --git a/sim/igen/compare_igen_models b/sim/igen/compare_igen_models
index ff181691..6ec9b74 100755
--- a/sim/igen/compare_igen_models
+++ b/sim/igen/compare_igen_models
@@ -1,7 +1,7 @@
#!/bin/sh
# Script to compare functions and instructions used by different igen models.
-# Copyright (C) 2002-2024 Free Software Foundation, Inc.
+# Copyright (C) 2002-2025 Free Software Foundation, Inc.
# Contributed by Chris Demetriou of Broadcom Corporation (SiByte).
#
# This file is part of GDB, the GNU debugger.
diff --git a/sim/igen/filter.c b/sim/igen/filter.c
index 3cb93d8..54c404f 100644
--- a/sim/igen/filter.c
+++ b/sim/igen/filter.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/filter.h b/sim/igen/filter.h
index a96230d..d937efb 100644
--- a/sim/igen/filter.h
+++ b/sim/igen/filter.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/filter_host.c b/sim/igen/filter_host.c
index 58b98c8..e75c551 100644
--- a/sim/igen/filter_host.c
+++ b/sim/igen/filter_host.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/filter_host.h b/sim/igen/filter_host.h
index 43d3a75..2cb9558 100644
--- a/sim/igen/filter_host.h
+++ b/sim/igen/filter_host.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-engine.c b/sim/igen/gen-engine.c
index cdf77ad..bfb5785 100644
--- a/sim/igen/gen-engine.c
+++ b/sim/igen/gen-engine.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -67,7 +67,7 @@ print_run_body (lf *file, const gen_entry *table)
{
/* Output the function to execute real code:
- Unfortunatly, there are multiple cases to consider vis:
+ Unfortunately, there are multiple cases to consider vis:
<icache> X <smp>
diff --git a/sim/igen/gen-engine.h b/sim/igen/gen-engine.h
index f8301a2..366f2ea 100644
--- a/sim/igen/gen-engine.h
+++ b/sim/igen/gen-engine.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-icache.c b/sim/igen/gen-icache.c
index 77d170d..b8b0541 100644
--- a/sim/igen/gen-icache.c
+++ b/sim/igen/gen-icache.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -152,7 +152,7 @@ print_icache_extraction (lf *file,
switch (what_to_declare)
{
case undef_variables:
- /* We've finished with the #define value - destory it */
+ /* We've finished with the #define value - destroy it */
lf_indent_suppress (file);
lf_printf (file, "#undef %s\n", entry_name);
return;
@@ -632,7 +632,7 @@ print_icache_struct (lf *file, const insn_table *isa, cache_entry *cache_rules)
else
{
/* alernativly, since no cache, emit a dummy definition for
- idecode_cache so that code refering to the type can still compile */
+ idecode_cache so that code referring to the type can still compile */
lf_printf (file, "typedef void %sidecode_cache;\n",
options.module.global.prefix.l);
}
diff --git a/sim/igen/gen-icache.h b/sim/igen/gen-icache.h
index 9418e97..73c0001 100644
--- a/sim/igen/gen-icache.h
+++ b/sim/igen/gen-icache.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-idecode.c b/sim/igen/gen-idecode.c
index e9038a8..7b80d4f 100644
--- a/sim/igen/gen-idecode.c
+++ b/sim/igen/gen-idecode.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-idecode.h b/sim/igen/gen-idecode.h
index c0dc7fa..c1cd7af 100644
--- a/sim/igen/gen-idecode.h
+++ b/sim/igen/gen-idecode.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-itable.c b/sim/igen/gen-itable.c
index 8da56f1..faea73d 100644
--- a/sim/igen/gen-itable.c
+++ b/sim/igen/gen-itable.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-itable.h b/sim/igen/gen-itable.h
index 6e82ca5..90e9ee5 100644
--- a/sim/igen/gen-itable.h
+++ b/sim/igen/gen-itable.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-model.c b/sim/igen/gen-model.c
index 7978878..8ba260e 100644
--- a/sim/igen/gen-model.c
+++ b/sim/igen/gen-model.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-model.h b/sim/igen/gen-model.h
index 784ba4b..3ed834b 100644
--- a/sim/igen/gen-model.h
+++ b/sim/igen/gen-model.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-semantics.c b/sim/igen/gen-semantics.c
index f6cb55a..fe5cb18 100644
--- a/sim/igen/gen-semantics.c
+++ b/sim/igen/gen-semantics.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -246,7 +246,7 @@ print_semantic_body (lf *file,
}
/* Architecture expects a REG to be zero. Instead of having to
- check every read to see if it is refering to that REG just zap it
+ check every read to see if it is referring to that REG just zap it
at the start of every instruction */
if (options.gen.zero_reg)
{
diff --git a/sim/igen/gen-semantics.h b/sim/igen/gen-semantics.h
index 786e5ba..2ea954c 100644
--- a/sim/igen/gen-semantics.h
+++ b/sim/igen/gen-semantics.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -36,9 +36,9 @@
o cached - separate cracker and semantic
- Two independant functions are created. Firstly the
+ Two independent functions are created. Firstly the
function that cracks an instruction entering it into a
- cache and secondly the semantic function propper that
+ cache and secondly the semantic function proper that
uses the cache.
o cached - semantic + cracking semantic
diff --git a/sim/igen/gen-support.c b/sim/igen/gen-support.c
index 35e8ef0..a7f34bd 100644
--- a/sim/igen/gen-support.c
+++ b/sim/igen/gen-support.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen-support.h b/sim/igen/gen-support.h
index f803a5f..03c1b31 100644
--- a/sim/igen/gen-support.h
+++ b/sim/igen/gen-support.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/gen.c b/sim/igen/gen.c
index 1499147..9e75d36 100644
--- a/sim/igen/gen.c
+++ b/sim/igen/gen.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -644,7 +644,7 @@ insns_bit_useless (const insn_list *insns, const decode_table *rule, int bit_nr)
/* Given only one constant value has been found, check through all
the instructions to see if at least one conditional makes it
- usefull */
+ useful */
if (value >= 0 && is_useless)
{
for (entry = insns; entry != NULL; entry = entry->next)
@@ -981,7 +981,7 @@ gen_entry_expand_opcode (gen_entry *table,
condition->field->last);
/* this is a requirement of
a conditonal field
- refering to another field */
+ referring to another field */
ASSERT ((condition->field->first -
condition->field->last) ==
(first_pos - last_pos));
diff --git a/sim/igen/gen.h b/sim/igen/gen.h
index ab64faa..5d5fede 100644
--- a/sim/igen/gen.h
+++ b/sim/igen/gen.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/igen.c b/sim/igen/igen.c
index 94caf6e..eb848da 100644
--- a/sim/igen/igen.c
+++ b/sim/igen/igen.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -481,7 +481,7 @@ print_itrace (lf *file, const insn_entry *insn, int idecode)
{
/* NB: Here we escape each EOLN. This is so that the the compiler
treats a trace function call as a single line. Consequently any
- errors in the line are refered back to the same igen assembler
+ errors in the line are referred back to the same igen assembler
source line */
const char *phase = (idecode) ? "DECODE" : "INSN";
lf_printf (file, "\n");
diff --git a/sim/igen/igen.h b/sim/igen/igen.h
index 7d3b9b4..3869966 100644
--- a/sim/igen/igen.h
+++ b/sim/igen/igen.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -138,7 +138,7 @@ struct _igen_decode_options
int combine;
/* Instruction expansion? Should the semantic code for each
- instruction, when the oportunity arrises, be expanded according
+ instruction, when the opportunity arrises, be expanded according
to the variable opcode files that the instruction decode process
renders constant */
int duplicate;
diff --git a/sim/igen/ld-cache.c b/sim/igen/ld-cache.c
index a337dea5..357cf43 100644
--- a/sim/igen/ld-cache.c
+++ b/sim/igen/ld-cache.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/ld-cache.h b/sim/igen/ld-cache.h
index 23d155e..3b110f0 100644
--- a/sim/igen/ld-cache.h
+++ b/sim/igen/ld-cache.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/ld-decode.c b/sim/igen/ld-decode.c
index 5f67d52..632aa89 100644
--- a/sim/igen/ld-decode.c
+++ b/sim/igen/ld-decode.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -161,7 +161,7 @@ load_decode_table (const char *file_name)
else
new_rule->last = options.insn_bit_size - 1;
if (new_rule->first > new_rule->last)
- error (new_rule->line, "First must preceed last\n");
+ error (new_rule->line, "First must precede last\n");
/* force first/last, with default values based on first/last */
if (entry->nr_fields > decode_force_first_field
diff --git a/sim/igen/ld-decode.h b/sim/igen/ld-decode.h
index e26de29..6dd283c 100644
--- a/sim/igen/ld-decode.h
+++ b/sim/igen/ld-decode.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -89,7 +89,7 @@
If an instruction field was found, enlarge the field size so that
it is forced to at least include bits starting from <force_first>
- (<force_last>). To stop this occuring, use <force_first> = <last>
+ (<force_last>). To stop this occurring, use <force_first> = <last>
+ 1 and <force_last> = <first> - 1.
<force_reserved>
@@ -101,7 +101,7 @@
Treat any contained register (string) fields as constant when
determining the instruction field. For the instruction decode (and
- controled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
+ controlled by IDECODE_EXPAND_SEMANTICS) this forces the expansion of
what would otherwize be non constant bits of an instruction.
<use_switch>
diff --git a/sim/igen/ld-insn.c b/sim/igen/ld-insn.c
index a561bad..02b4527 100644
--- a/sim/igen/ld-insn.c
+++ b/sim/igen/ld-insn.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -201,7 +201,7 @@ parse_insn_word (const line_ref *line, char *string, int word_nr)
{
if (strlen_pos == 0)
{
- /* when the length/pos field is omited, an integer field
+ /* when the length/pos field is omitted, an integer field
is always binary */
uint64_t val = 0;
int i;
@@ -409,7 +409,7 @@ parse_insn_words (insn_entry * insn, char *formats)
insn->word[i] = word;
}
- /* Go over all fields that have conditionals refering to other
+ /* Go over all fields that have conditionals referring to other
fields. Link the fields up. Verify that the two fields have the
same size. Verify that the two fields are different */
{
@@ -442,9 +442,9 @@ parse_insn_words (insn_entry * insn, char *formats)
&& strcmp (refered_field->val_string,
cond->string) == 0)
{
- /* found field being refered to by conditonal */
+ /* found field being referred to by conditonal */
cond->field = refered_field;
- /* check refered to and this field are
+ /* check referred to and this field are
the same size */
if (f->width != refered_field->width)
error (insn->line,
diff --git a/sim/igen/ld-insn.h b/sim/igen/ld-insn.h
index 38743fe..537817d 100644
--- a/sim/igen/ld-insn.h
+++ b/sim/igen/ld-insn.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/lf.c b/sim/igen/lf.c
index bf6d3e4..e58072a 100644
--- a/sim/igen/lf.c
+++ b/sim/igen/lf.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/lf.h b/sim/igen/lf.h
index 6a6c1e2..4e21825 100644
--- a/sim/igen/lf.h
+++ b/sim/igen/lf.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
@@ -47,7 +47,7 @@ lf_file_references;
/* Open the file NAME for writing ("-" for stdout). Use REAL_NAME
- when refering to the opened file. Line number information (in the
+ when referring to the opened file. Line number information (in the
output) can be suppressed with FILE_REFERENCES ==
LF_OMIT_REFERENCES. TYPE is to determine the formatting of some of
the print messages below. */
diff --git a/sim/igen/local.mk b/sim/igen/local.mk
index 38df939..52d642e 100644
--- a/sim/igen/local.mk
+++ b/sim/igen/local.mk
@@ -1,6 +1,6 @@
## The IGEN simulator generator for GDB, the GNU Debugger.
##
-## Copyright 2002-2024 Free Software Foundation, Inc.
+## Copyright 2002-2025 Free Software Foundation, Inc.
##
## Contributed by Andrew Cagney.
##
diff --git a/sim/igen/misc.c b/sim/igen/misc.c
index fd851aa..31ff9db 100644
--- a/sim/igen/misc.c
+++ b/sim/igen/misc.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/misc.h b/sim/igen/misc.h
index 5bd32b0..1ec9834 100644
--- a/sim/igen/misc.h
+++ b/sim/igen/misc.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/table.c b/sim/igen/table.c
index 1fe1457..7b77d7e 100644
--- a/sim/igen/table.c
+++ b/sim/igen/table.c
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.
diff --git a/sim/igen/table.h b/sim/igen/table.h
index 7239412..1d31a93 100644
--- a/sim/igen/table.h
+++ b/sim/igen/table.h
@@ -1,6 +1,6 @@
/* The IGEN simulator generator for GDB, the GNU Debugger.
- Copyright 2002-2024 Free Software Foundation, Inc.
+ Copyright 2002-2025 Free Software Foundation, Inc.
Contributed by Andrew Cagney.