26 files changed, 0 insertions, 9532 deletions
diff --git a/sim/erc32/.Sanitize b/sim/erc32/.Sanitize
deleted file mode 100644
index 55010f6..0000000
--- a/sim/erc32/.Sanitize
+++ /dev/null
@@ -1,53 +0,0 @@
-# .Sanitize for devo/sim/erc32.
-
-# Each directory to survive it's way into a release will need a file
-# like this one called "./.Sanitize".  All keyword lines must exist,
-# and must exist in the order specified by this file.  Each directory
-# in the tree will be processed, top down, in the following order.
-
-# Hash started lines like this one are comments and will be deleted
-# before anything else is done.  Blank lines will also be squashed
-# out.
-
-# The lines between the "Do-first:" line and the "Things-to-keep:"
-# line are executed as a /bin/sh shell script before anything else is
-# done in this 
-
-Do-first:
-
-# All files listed between the "Things-to-keep:" line and the
-# "Files-to-sed:" line will be kept.  All other files will be removed.
-# Directories listed in this section will have their own Sanitize
-# called.  Directories not listed will be removed in their entirety
-# with rm -rf.
-
-Things-to-keep:
-
-ChangeLog
-Makefile.in
-NEWS
-README.erc32
-README.gdb
-README.sis
-acconfig.h
-config.in
-configure
-configure.in
-end.c
-erc32.c
-exec.c
-float.c
-func.c
-help.c
-interf.c
-sis.c
-sis.h
-startsim
-
-Things-to-lose:
-
-examples
-
-Do-last:
-
-# End of file.
diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
deleted file mode 100644
index 59a6b45..0000000
--- a/sim/erc32/ChangeLog
+++ /dev/null
@@ -1,560 +0,0 @@
-1999-01-25  Hugo Tyson  <hmt@cygnus.co.uk>
-
-	* interf.c (run_sim): Fix a bug in the main loop's handling of
-	annulled delay slot instructions.  There is precedent for this
-	change; the _other_ main loop in sis.c gets it right according to
-	my reading of the code.
-
-	The bug is: if an interrupt happens when the next instruction
-	(at sregs->pc) is annulled, the trap is taken (by execute_trap())
-	with the current values of PC and NPC, so when the trap returns,
-	the annulled instruction is indeed executed.  Another giveaway is
-	that the annul flag is cleared in execute_trap(): the information
-	is demonstrably discarded.
-
-	The solution is: perform annulling before looking for traps, in
-	fact it's neater to do annulling, see if there's an interrupt and
-	if not, do the instruction, then handle traps be they generated by
-	interrupts pending or by the instruction we might just have done.
-	That's what the sis.c one does.
-
-1999-01-20  Hugo Tyson  <hmt@cygnus.co.uk>
-
-	* sis.h: Add asr17 register for support of SparcLITE (at least the
-	Hitachi ones I find before me)
-
-	* exec.c (dispatch_instruction): Case WRY: Allow write of asr17 if
-	sparclite.  Other ASR numbers than 17 or 0 (Y) trap out.
-	Case RDY: Allow read of asr17 if sparclite.  Other ASRs ditto.
-	(execute_trap): Do single-vector-trapping if asr17 bit 0 is set.
-	(init_regs): Initialize y and asr17.
-	NB: In instruction-set space, the Y register is asr0; the
-	instructions have different names for human reasons only.
-
-	* sis.c:
-	* interf.c: Set boolean mode variable dumbio if invoked with
-	argument "-dumbio" and mention it of verbose.
-	* erc32.c: if "dumbio" is set, do not assume that there is a
-	terminal type device attached to stdin/stdout.  Do not set
-	buffering or mess with tcsetattr or do any read operations in
-	order to make UART interrupts; not input data is supported.
-	This is necessary to allow the sim to be used within the eCos
-	testing infrastructure where stdin/stdout are pipes to a TCL
-	program; the sim hangs otherwise.
-
-Thu Jul 23 07:17:03 1998  Mark Alexander  <marka@cygnus.com>
-
-	* exec.c (dispatch_instruction): Add SPARClite 'scan' instruction.
-
-Tue Jul  7 21:12:41 1998  Mark Alexander  <marka@cygnus.com>
-
-	* func.c (bfd_load): Add special handling of a.out executables.
-
-Sat Jun 13 08:33:25 1998  Mark Alexander  <marka@cygnus.com>
-
-	* func.c (bfd_load): Print correct endianness.
-	* interf.c (run_sim): Print debugging information if verbosity level
-	is greater than 2.
-	(sim_open): Repeated -v options now increment verbosity level.
-	(sim_store_register): Handle little-endian case.
-	(flush_window): Print debugging information if verbosity level
-	is greater then 2.
-
-Tue Jun  2 15:20:35 1998  Mark Alexander  <marka@cygnus.com>
-
-	* interf.c (sim_open): Use revamped memory_read, which makes
-	byte-swapping unnecessary.  Add -sparclite-board option for
-	emulating RAM found on typical SPARClite boards.  Print
-	error message for unrecognized option.
-	* erc32.c: Change RAM address and size from constants to variables,
-	to allow emulation of SPARClite board RAM.
-	(fetch_bytes, store_bytes): New helper functions for revamped
-	mememory_read and memory_write.
-	(memory_read, memory_write): Rewrite to store bytes in target
-	byte order instead of storing words in host byte order; this
-	greatly simplifies support of little-endian programs.
-	(get_mem_ptr): Remove unnecessary byte parameter.
-	(sis_memory_write, sis_memory_read): Store words in target
-	byte order instead of host byte order.
-	(byte_swap_words): Remove, no longer needed.
-	* sis.h ((byte_swap_words): Remove declaration, no longer needed.
-	(memory_read): Add new sz parameter.
-	* sis.c (run_sim): Use revamped memory_read, which makes
-	byte-swapping unnecessary.
-	* exec.c (dispatch_instruction): Use revamped memory_read, which
-	makes byte-swapping and double-word fetching unnecessary.
-	* func.c (sparclite_board): Declare new variable.
-	(get_regi): Handle little-endian data.
-	(bfd_load): Recognize little-endian SPARClite as having
-	little-endian data.
-	
-Fri May 22 14:23:16 1998  Mark Alexander  <marka@cygnus.com>
-
-	* erc32.c (port_init): Print messages only if sis_verbose is true.
-	* func.c (bfd_load): Ditto.
-	* interf.c (sim_open): Ditto.
-
-Thu May 14 23:10:48 1998  Mark Alexander  <marka@cygnus.com>
-
-	* sis.h (uint64, int64): Define.
-	* exec.c (SDIV, SDIVCC, UDIV, UDIVCC): Define new opcodes.
-	* (mul64): Simplify calculation of negative result.
-	* (div64): New helper function for 64-bit division.
-	* (dispatch_instruction): Add emulation of SDIV, SDIVCC, UDIV,
-	and UDIVCC.
-	
-Wed May 13 14:59:54 1998  Mark Alexander  <marka@cygnus.com>
-
-	* erc32.c (close_port): Don't close stdin; it kills GDB.
-	(byte_swap_words): New function.
-	* sis.h: (byte_swap_words): Declare.
-	* interf.c (run_sim): Always fetch instructions as big-endian.
-	* sis.c (run_sim): Ditto.
-
-Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
-
-        * configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-	* config.in: Ditto.
-
-Sun Apr 26 15:20:17 1998  Tom Tromey  <tromey@cygnus.com>
-
-	* acconfig.h: New file.
-	* configure.in: Reverted change of Apr 24; use sinclude again.
-
-Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-	* config.in: Ditto.
-
-Fri Apr 24 11:19:52 1998  Tom Tromey  <tromey@cygnus.com>
-
-	* configure.in: Don't call sinclude.
-
-Sat Apr 18 12:00:16 1998  Mark Alexander  <marka@cygnus.com>
-
-	* func.c (disp_fpu): Fix build problem on big-endian hosts.
-
-Wed Apr  8 19:33:34 1998  Mark Alexander  <marka@cygnus.com>
-
-	* erc32.c (sim_stop): Handle SIGINT gracefully.
-	* interf.c (sim_open): Don't catch SIGINT; GDB will do that for us.
-
-Wed Apr  8 18:29:40 1998  Mark Alexander  <marka@cygnus.com>
-
-	* exec.c (dispatch_instruction): Change how carry out is calculated
-	in DIVSCC.  Add emulation of SMULCC, UMUL, and UMULCC.
-
-Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr  1 21:19:18 1998  Mark Alexander  <marka@cygnus.com>
-
-	* end.c: Update to version 2.7.5, fix compiler warnings and bugs.
-	* erc32.c: Ditto.
-	* exec.c: Ditto.
-	* float.c: Ditto.
-	* func.c: Ditto.
-	* help.c: Ditto.
-	* interf.c: Ditto.
-	* sis.c: Ditto.
-	* sis.h: Ditto.
-
-Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Feb 17 12:41:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* interf.c (sim_store_register, sim_fetch_register): Pass in
- 	length parameter.  Return -1.
-
-Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-	* config.in: Ditto.
-
-Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-	* config.in: Ditto.
-
-Tue Aug 26 10:38:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* float.c (__setfpucw): Compile on any i386 target.  Not just NT.
-
-	* interf.c (sim_kill): Delete.
-	(sim_create_inferior): Add ABFD argument.  Initialize PC from ABFD
- 	argument.
-	(sim_load): Don't save start address.
-	(start_address): Delete variable.
-
-Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-	* config.in: Ditto.
-
-Mon Aug 25 16:19:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* interf.c (sim_open): Add ABFD argument. Change ARGV to PARGV.
-
-Mon Jun 30 11:45:25 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* Makefile.in (install-sis): Change $(srcdir)/sis to sis.
-
-Wed May 28 09:46:13 1997  Andrew Cagney  <cagney@b1.cygnus.com>
-
-	* interf.c (sim_set_callbacks): Drop SD argument - not applicable.
-	(sim_open): Add callback arg, save it.
-
-Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Tue Apr 22 11:05:01 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* interf.c (sim_open): Undo patch to add -E support.
-
-Thu Apr 17 03:03:56 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* interf.c (sim_open): Ignore -E arg.
-	(start_address): New static local.
-	(sim_load): Return SIM_RC.  New arg abfd.  Set start_address from bfd.
-	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
-
-Tue Apr 15 15:16:11 1997  Ian Lance Taylor  <ian@cygnus.com>
-
-	* Makefile.in (install-sis): Depend upon installdirs.  Use
-	$(program_transform_name) directly, rather than using
-	$(INSTALL_XFORM).
-
-Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-	* config.in: Ditto.
-
-Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* interf.c (sim_open): New arg `kind'.
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
-
-	* configure: Regenerated to track ../common/aclocal.m4 changes.
-
-Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
-
-	* configure: Re-generate.
-
-Thu Mar 13 12:46:04 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* interf.c (sim_open): New SIM_DESC result.  Argument is now in
-	argv form.
-	(other sim_*): New SIM_DESC argument.
-
-Tue Feb  4 13:35:20 1997  Doug Evans  <dje@canuck.cygnus.com>
-
-	* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
-	COMMON_{PRE,POST}_CONFIG_FRAG instead.
-	* configure.in: sinclude ../common/aclocal.m4.
-	* configure: Regenerated.
-
-Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
-
-	* configure configure.in Makefile.in:  Update to new configure
-	scheme which is more compatible with WinGDB builds.
-	* configure.in:  Improve comment on how to run autoconf.
-	* configure:  Re-run autoconf to get new ../common/aclocal.m4.
-	* Makefile.in:  Use autoconf substitution to install common
-	makefile fragment.
-
-Wed Dec  4 18:25:04 1996  Rob Savoye  <rob@chinadoll.cygnus.com>
-
-	* interf.c (run_sim): Stop the simulator and reset the stdio after
-	breakpoints.
-
-Tue Dec  3 11:54:37 1996  Rob Savoye  <rob@chinadoll.cygnus.com>
-
-	* configure.in: Look for libtermcap.a.
-	* Makefile.in: Only link in -ltermcap if it exists.
-	* erc32.c: Update to version 2.6a. Fix uart handling.
-	* exec.c: Update to version 2.6a. Add sparclite support.
-	* float.c: Update to version 2.6a. Convert comments to
-	preprocessor warnings. Add __setfpucw() for i385 hosts so floating
-	point exceptions work on win32.
-	* func.c: Update to version 2.6a. Fix uart handling, add support
-	for user error traps.
-	* help.c: Update to version 2.6a. Add help note on user error
-	traps.
-	* interf.c: Update to version 2.6a. Fix uart handling, and add
-	sparclite support.
-	* examples/gccx: Use sparclite cross compiler, not native gcc.
-	* examples/srt0.S: Use "mov" rather than "wr" for manipulating
-	the psr register.
-
-Mon Nov 25 08:28:10 1996  Fred Fish  <fnf@cygnus.com>
-
-	* Makefile.in (run.o): Remove this rule, it hides the one in
-	../common/Make-common.in that correctly references the source
-	in the sibling ../common directory.
-
-Wed Nov 20 01:30:12 1996  Doug Evans  <dje@canuck.cygnus.com>
-
-	* Makefile.in: Delete stuff moved to ../common/Make-common.in.
-	(SIM_{OBJS,EXTRA_LIBS,EXTRA_LIBDEPS,EXTRA_ALL,EXTRA_INSTALL}): Define.
-	(SIM_{EXTRA_CLEAN,EXTRA_CFLAGS}): Define.
-	* configure.in: Simplify using macros in ../common/aclocal.m4.
-	Call AC_CHECK_HEADERS(stdlib.h).
-	* configure: Regenerated.
-	* config.in: New file.
-	* func.c (sim_set_callbacks): Delete, moved to
-	* interf.c (sim_set_callbacks): here.
-	(sim_callback): New global.
-	Rewrite all calls to printf_filtered to go through callback.
-	(sim_size,sim_trace): New functions.
-	(sim_{insert,remove}_breakpoint): #if 0 out.
-	* sis.c: #include "config.h".  #include <stdlib.h> if present.
-	(main): Coerce fprintf arg to INIT_DISASSEMBLE_INFO to fprintf_ftype.
-	* sis.h: #include "callback.h".
-	* run.c: Deleted, using one in ../common now.
-
-Thu Oct  3 16:12:03 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
-
-	* Makefile.in (clean): Move config.log to distclean.
-
-Wed Oct  2 16:57:57 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
-
-	* Makefile.in (clean): Also remove config.log.
-
-Sat Sep 14 00:00:46 1996  Ian Lance Taylor  <ian@cygnus.com>
-
-	* Makefile.in (CC_FOR_BUILD): New variable.
-	(AR, AR_FLAGS, BISON, MAKEINFO): Remove duplicate variables.
-	(RANLIB, CC): Likewise.
-	(end): Use $(CC_FOR_BUILD), not $(CC).
-	* configure.in: Set CC_FOR_BUILD.
-	* configure: Rebuild.
-
-Sun Sep  8 14:04:37 1996  Stu Grossman  (grossman@critters.cygnus.com)
-
-	* erc32.c (port_init):  Disable this for __GO32__ (got no pty's
-	there either...).
-
-Mon Aug 12 17:04:58 1996  Stu Grossman  (grossman@critters.cygnus.com)
-
-	* erc32.c:  Don't include sys/ioctl.h or sys/file.h.  They aren't
-	necessary.
-	* (port_init):  Don't even *try* to open pty's under _WIN32.
-	* Use SIM_ADDR, not caddr_t for declaring vars that hold addresses.
-	* float.c:  Get rid of #warning.  Makes Microsoft C barf.
-	* interf.c (sim_open):  Cast fprintf to (fprintf_ftype) to fix
-	compiler warning.
-	* (sim_load sim_create_inferior sim_read):  Use prototypes only in
-	decls, not defs.
-	* Get rid of enum sim_stop.  It's defined in remote-sim.h.
-	* (sim_stop_reason):  Define SIGTRAP if _WIN32.
-	* sis.h:  Include ansidecl.h and remote-sim.h.
-
-Wed Jul  3 16:05:23 1996  Stu Grossman  (grossman@critters.cygnus.com)
-
-	* erc32.c (mec_reset mec_read mec_write memory_read memory_write),
-	sis.h:  Get rid of all uses of long long's.
-	* (close_port read_uart write_uart uarta_tx):  Don't seg fault
-	when can't open pty's.
-	* exec.c:  Add two new instructions: smul, and divscc.
-	* interf.c (flush_windows):  New routine to flush the register
-	windows out to the stack just before returning to GDB.  Makes
-	backtraces work much better.
-
-Wed Jun 26 12:19:11 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
-
-        * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
-        INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
-        (docdir, oldincludedir): Removed.
-        * configure.in (AC_PREREQ): autoconf 2.5 or higher.
-        (AC_PROG_INSTALL): Added.
-        * configure: Rebuilt.
-
-Mon Jun 24 14:19:07 1996  Ian Lance Taylor  <ian@cygnus.com>
-
-	* configure.in: Call AC_PROG_CC before running configure.host.
-	* configure: Rebuild with autoconf 2.10.
-
-Tue Jun  4 10:37:12 1996  Tom Tromey  <tromey@csk3.cygnus.com>
-
-	* Makefile.in (install): Don't check to see if tooldir exists.
-	Make $(tooldir) and $(tooldir)/bin.
-
-Mon Jun  3 12:33:38 1996  Ian Lance Taylor  <ian@cygnus.com>
-
-	* Makefile.in (end.h): Use explicit ./ when running end.
-
-Sun May 19 21:05:31 1996  Rob Savoye  <rob@chinadoll.cygnus.com>
-
-	* func.c(bfd_load): Don't try to print the filename if the pfbd is
-	NULL.
-	* interf.c(sim_load): Pass the whole string, not just the first
-	byte.
-
-Version 2.1 26-02-96
---------------------
- 
-* Fixed bug in "go" command.
- 
-version 2.0 05-02-96
---------------------
-
-* Fixed bug in interrupt force register (erc32.c).
-
-* Change file load function to use bfd_openr.
-
-* SIS should now be endian independent.
-
-version 1.8 24-11-95
---------------------
-
-* Fixed FPU timing - some sequences of FPU instructions did not calculate
-  the resource dependencies right.
-
-* Corrected STDFQ when qne = 0 (again!). The ftt is set to sequence_error
-  but no FPU trap is generated.
-
-version 1.7.1 31-10-95
---------------------
-
-* Corrected STDFQ when qne = 0. Now, a trap is immidiately generated but
-  the FPU stays in execute mode.
-
-* Corrected JMPL and RETT timing (these instructions takes two cycles).
-
-
-version 1.7 25-10-95
---------------------
-
-* Interrupt during annuled instruction corrupted return address - fixed.
-
-
-version 1.6.2 25-10-95
---------------------
-
-* Added -DFAST_UART to Makefile
- 
-
-version 1.6.1 24-10-95
---------------------
- 
-* Fixed bug in STDFQ which caused bus error
-
-
-version 1.6 02-10-95
---------------------
- 
-* Modified srt0.s to include code that initiates registers in IU and FPU
-  and initializes the data segment. The simulator 'load' command does not
-  longer initialize the data segment!
-
-* Corrected MEC timer operation; scalers now divide the frequency by 
-  (scaler_value + 1).
-
-* MEC breakpoints are not checked during store operation
-
-
-version 1.5 14-09-95
---------------------
-
-* Fixed some bugs in the cycle counting for IU & FPU instructions.
-
-* Fixed bug that allowed an annuled instruction to cause memory exception.
-
-* The *ws parameter in mem.c should now contain the number of waitstates
-  required by the memory access (was total number of cycles).
-
-* The supplied srt0.s now clears the BSS (thanks Joel).
-
-version 1.4 22-08-95
---------------------
-
-* Added a '-g' switch to enable/disable the GNU readline(), which cause
-some problems on solaris 2.x machines.
-
-* Enabled MEC watchpoint and breakpoint function to mem.c. Performance 
-may suffer a bit ...
-
-NOTE: The UARTs are now connected to /dev/ttypc and /dev/ttypd.
-
-version 1.3 26-07-95
---------------------
-
-* Fixed bug in mulscc instruction (how could that ever have worked?)
-
-* Fixed bug in UART B (flushed characters on UART A), thanks Paul.
-
-version 1.2 13-07-95
---------------------
-
-* Fixed bug in interrupt handling (wrong interrupt selected when more that
-one interrupt pending)
-
-* Fixed updating of condition codes during logical instructions (carry and
-overflow were not reset)
-
-* Fixed bug in WRTBR (tt field was wrongly over-written)
-
-version 1.1 07-07-95
---------------------
-
-* Fixed several bugs in the interrupt handler and callback routines.
-(reported by Paul Warren, Alsys)
diff --git a/sim/erc32/Makefile.in b/sim/erc32/Makefile.in
deleted file mode 100644
index 331e624..0000000
--- a/sim/erc32/Makefile.in
+++ /dev/null
@@ -1,73 +0,0 @@
-#    Makefile template for Configure for the erc32sim library.
-#    Copyright (C) 1993, 1996 Free Software Foundation, Inc.
-#    Written by Cygnus Support
-#    Modified by J.Gaisler ESA/ESTEC
-# 
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-# 
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-# 
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-TERMCAP_LIB = @TERMCAP@
-
-SIM_OBJS = exec.o erc32.o func.o help.o float.o interf.o
-SIM_EXTRA_LIBS = ../../readline/libreadline.a  $(TERMCAP_LIB) -lm
-SIM_EXTRA_LIBDEPS = ../../readline/libreadline.a
-SIM_EXTRA_ALL = sis
-SIM_EXTRA_INSTALL = install-sis
-SIM_EXTRA_CLEAN = clean-sis
-
-
-# UARTS run at about 115200 baud (simulator time). Add -DFAST_UART to
-# CFLAGS if faster (infinite) UART speed is desired. Might affect the
-# behaviour of UART interrupt routines ...
-SIM_EXTRA_CFLAGS = -DSTAT -DFAST_UART -DIUREV0 -DMECREV0
-
-# `sis' doesn't need interf.o.
-SIS_OFILES = exec.o erc32.o func.o help.o float.o
-
-@COMMON_MAKEFILE_FRAG@
-
-sis: sis.o $(SIS_OFILES) $(COMMON_OBJS) $(LIBDEPS)
-	$(CC) $(ALL_CFLAGS) -o sis \
-	  sis.o $(SIS_OFILES) $(COMMON_OBJS) $(EXTRA_LIBS)
-
-# FIXME: This computes the build host's endianness, doesn't it?
-# There is AC_C_BIGENDIAN but it doesn't handle float endianness.
-# [Are int/float endians every different on a sparc?]
-end: $(srcdir)/end.c
-	$(CC_FOR_BUILD) $(srcdir)/end.c -o end
-end.h: end
-	./end > end.h
-
-# Copy the files into directories where they will be run.
-install-sis:
-	$(INSTALL_XFORM) sis $(bindir)/sis
-
-clean-sis:
-	rm -f sis end end.h
-
-configure:
-	@echo "Rebuilding configure..."
-	if [ x"${srcdir}" = x"@srcdir@" ] ; then \
-	  srcdir=. ; export srcdir ; \
-	else true ; fi ; \
-	(cd $${srcdir}; autoconf --localdir=../common)
-
-# Circumvent Sun Make bug with VPATH.
-erc32.o: erc32.c sis.h end.h
-exec.o: exec.c sis.h end.h
-float.o: float.c sis.h end.h
-func.o: func.c
-help.o: help.c
-interf.o: interf.c sis.h end.h 
-sis.o: sis.c sis.h end.h
diff --git a/sim/erc32/NEWS b/sim/erc32/NEWS
deleted file mode 100644
index dd24b7b..0000000
--- a/sim/erc32/NEWS
+++ /dev/null
@@ -1,108 +0,0 @@
-
-version 2.0 05-02-96
---------------------
-
-* Switched to bfd library. Any supported format (elf, coff, ...) can be used.
-* The UART devices can be set through -uart1 and -uart2 switches.
-* Switched to GNU readline.
-* Added -c option to run batch files at startup
-* 'reg' command can show different register windows (eg 'reg w3').
-* Use 'help' for online help on simulator commands
-
-version 1.8.1 20-01-96
---------------------
-
-* added -mevrev0 switch to simulate MEC rev.0 bugs in timer and uart
-
-* added -iurev0 switch to simulate IU rev.0 jmpl/restore bug
-
-* Added sis command 'batch' to run batch files
-
-
-version 1.8 30-10-95
---------------------
-
-* Added s-record support. Use the '-s' switch with sis or the 'load' command.
-
-* IU load dependencies are now modelled
-
-version 1.7 30-10-95
---------------------
-
-* Power-down mode implemented in erc32.c.
-  
-* Performance display shows the ratio between simulator-time and real-time.
-
-
-version 1.6.2 25-10-95
---------------------
-
-* The UARTs can now be run at a given speed (simulator time) to better
-  simulate the behaviour of interrupt routines. The "true mode" is
-  selected through a compile switch in the makefile.
-
-
-version 1.6 28-09-95
---------------------
-
-* Major reorganisation of the code. mec.c and mem.c merged into erc32.c.
-
-* The load command does NOT longer load the initialised data at an address
-  defined by .bdata. This is done in srt0.s using _environ.
-
-* Additional MEC functionallity added - software reset, memory access
-  protection and waitstate configuration register.
-
-* interf.c - a GDB interface added
-
-* -v switch (verbose) added
-
-version 1.5 14-09-95
---------------------
-
-* Added a instruction trace buffer, enabled through the 'hist' command.
-
-* Added a 'perf' command to display statistics such as instruction mix,
-  CPI, FPU holds etc.
-
-* Added -nfp switch to disable FPU.
-
-* Added -freq switch to set simulated frequency.
-
-version 1.4 22-08-95
---------------------
-
-* A -g is provided for those who have problems with GNU readline(). 
-
-version 1.3 26-07-95
---------------------
-
-* No major news, just a bug fix release ...
-
-
-version 1.2 13-07-95
---------------------
-
-* Added setting of IU registers through the 'reg' command. See README.
-
-* The GNU readline() function is used for command input. However, a
-ctrl-D still kills the simulator ...
-
-
-version 1.1 07-07-95
---------------------
-
-
-* Added a 'go' command
-
-* Added cycle counting for interrupt overhead.
-
-* Function 'get_mem_ptr' takes one more parameter to avoid segmentation 
-   faults if a.out files are loaded outside the simulated memory. See README.
-
-* Added user-defined function sim_stop().
-
-* Added a reset command. See README.
-
-* Implemented buffered output for MEC uarts to improve output speed.
-
diff --git a/sim/erc32/README.erc32 b/sim/erc32/README.erc32
deleted file mode 100644
index f413599..0000000
--- a/sim/erc32/README.erc32
+++ /dev/null
@@ -1,130 +0,0 @@
-
-1. MEC and ERC32 emulation
-
-The file 'erc32.c' contains a model of the MEC, 512 K rom and 4 M ram.
-
-The following paragraphs outline the implemented MEC functions.
-
-1.1 UARTs
-
-The UARTs are connected to two pseudo-devices, /dev/ttypc and /dev/ttypd.
-The following registers are implemeted:
-
-- UART A RX and TX register	(0x01f800e0)
-- UART B RX and TX register	(0x01f800e4)
-- UART status register		(0x01f800e8)
-
-To speed up simulation, the UARTs operate at approximately 115200 baud. 
-The UARTs generate interrupt 4 and 5 after each received or transmitted 
-character.  The error interrupt is generated if overflow occurs - other
-errors cannot occure.
-
-1.2 Real-time clock and general pupose timer A
-
-The following registers are implemeted:
-
-- Real-time clock timer				(0x01f80080, read-only)
-- Real-time clock scaler program register 	(0x01f80084, write-only)
-- Real-time clock counter program register 	(0x01f80080, write-only)
-
-- Genearl pupose timer 				(0x01f80088, read-only)
-- Real-time clock scaler program register 	(0x01f8008c, write-only)
-- General purpose timer counter prog. register 	(0x01f80088, write-only)
-
-- Timer control register			(0x01f80098, write-only)
-
-1.3 Interrupt controller
-
-The interrupt controller is implemented as in the MEC specification with
-the exception of the interrupt shape register. Since external interrupts
-are not possible, the interrupt shape register is not implemented. The
-only internal interrupts that are generated are the real-time clock, 
-the general purpose timer and UARTs. However, all 15 interrupts
-can be tested via the interrupt force register.
-
-The following registers are implemeted:
-
-- Interrupt pending register		       (0x01f80048, read-only)
-- Interrupt mask register		       (0x01f8004c, read-write)
-- Interrupt clear register		       (0x01f80050, write-only)
-- Interrupt force register		       (0x01f80054, read-write)
-
-1.4 Breakpoint and watchpoint register
-
-The breakpoint and watchpoint functions are implemented as in the MEC
-specification. Traps are correctly generated, and the system fault status
-register is updated accordingly. Implemeted registers are:
-
-- Debug control register			(0x01f800c0, read-write)
-- Breakpoint register				(0x01f800c4, write-only)
-- Watchpoint register				(0x01f800c8, write-only)
-- System fault status register			(0x01f800a0, read-write)
-- Firts failing address register		(0x01f800a4, read-write)
-
-
-1.5 Memory interface
-
-The following memory areas are valid for the ERC32 simulator:
-
-0x00000000 - 0x00080000		ROM (512 Kbyte, loaded at start-up)
-0x02000000 - 0x02400000		RAM (4 Mbyte, initialised to 0x0)
-0x01f80000 - 0x01f800ff		MEC registers
-
-Access to unimplemented MEC registers or non-existing memory will result
-in a memory exception trap. However, access to unimplemented MEC registers
-in the area 0x01f80000 - 0x01f80100 will not cause a memory exception trap.
-The written value will be stored in a register and can be read back. It
-does however not affect the function in any way. 
-
-The memory configuartion register is used to define available memory
-in the system. The fields RSIZ and PSIZ are used to set RAM and ROM
-size, the remaining fields are not used.  NOTE: after reset, the MEC 
-is set to decode 4 Kbyte of ROM and 256 Kbyte of RAM. The memory 
-configuration register has to be updated to reflect the available memory. 
-
-The waitstate configuration register is used to generate waitstates. 
-This register must also be updated with the correct configuration after 
-reset.
-
-The memory protection scheme is implemented - it is enabled through bit 3
-in the MEC control register.
-
-The following registers are implemeted:
-
-- MEC control register (bit 3 only)		(0x01f80000, read-write)
-- Memory control register			(0x01f80010, read-write)
-- Waitstate configuration register		(0x01f80018, read-write)
-- Memory access register 0			(0x01f80020, read-write)
-- Memory access register 1			(0x01f80024, read-write)
-
-1.6 Watchdog
-
-The watchdog is implemented as in the specification. The input clock is
-always the system clock regardsless of WDCS bit in mec configuration 
-register.
-
-The following registers are implemeted:
- 
-- Watchdog program and acknowledge register	(0x01f80060, write-only)
-- Watchdog trap door set register		(0x01f80064, write-only)
-
-1.7 Software reset register
-
-Implemented as in the specification (0x01f800004, write-only).
-
-1.8 Power-down mode
-
-The power-down register (0x01f800008) is implemented as in the specification.
-However, if the simulator event queue is empty, power-down mode is not
-entered since no interrupt would be generated to exit from the mode. A
-Ctrl-C in the simulator window will exit the power-down mode.
-
-1.9 MEC control register
-
-The following bits are implemented in the MEC control register:
-
-Bit	Name	Function
-0	PRD	Power-down mode enable
-1	SWR	Soft reset enable
-3	APR	Access protection enable
-
diff --git a/sim/erc32/README.gdb b/sim/erc32/README.gdb
deleted file mode 100644
index 619fcb3..0000000
--- a/sim/erc32/README.gdb
+++ /dev/null
@@ -1,67 +0,0 @@
-How to use SIS with GDB
------------------------
-
-1. Building GDB with SIS
-
-To build GDB with the SIS/ERC32 simulator, configure with option
-'--target sparc-erc32-aout' and build as usual.
-
-2. Attaching the simulator
-
-To attach GDB to the simulator, use:
-
-target sim [options] [files]
-
-The following options are supported:
-
- -nfp		Disable FPU. FPops will cause an FPU disabled trap.
-
- -freq <f>	Set the simulated "system clock" to <f> MHz.
-
- -v		Verbose mode.
-
- -nogdb		Disable GDB breakpoint handling (see below)
-
-The listed [files] are expected to be in aout format and will be
-loaded in the simulator memory prior. This could be used to load
-a boot block at address 0x0 if the application is linked to run
-from RAM (0x2000000).
-
-To start debugging a program type 'load <program>' and debug as
-usual. 
-
-The native simulator commands can be reached using the GDB 'sim'
-command:
-
-sim <sis_command>
-
-Direct simulator commands during a GDB session must be issued
-with care not to disturb GDB's operation ... 
-
-For info on supported ERC32 functionality, see README.sis.
-
-
-3. Loading aout files
-
-The GDB load command loads an aout file into the simulator
-memory with the data section starting directly after the text
-section regardless of wich start address was specified for the data
-at link time! This means that your applications either has to include
-a routine that initialise the data segment at the proper address or
-link with the data placed directly after the text section.
-
-A copying routine is fairly simple, just copy all data between
-_etext and _data to a memory loaction starting at _environ. This
-should be done at the same time as the bss is cleared (in srt0.s).
-
-
-4. GDB breakpoint handling
-
-GDB inserts breakpoint in the form of the 'ta 1' instruction. The
-GDB-integrated simulator will therefore recognize the breakpoint
-instruction and return control to GDB. If the application uses
-'ta 1', the breakpoint detection can be disabled with the -nogdb
-switch. In this case however, GDB breakpoints will not work.
-
-
-Report problems to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)
diff --git a/sim/erc32/README.sis b/sim/erc32/README.sis
deleted file mode 100644
index b119f03..0000000
--- a/sim/erc32/README.sis
+++ /dev/null
@@ -1,356 +0,0 @@
-
-SIS - Sparc Instruction Simulator README file  (v2.0, 05-02-1996)
--------------------------------------------------------------------
-
-1. Introduction
-
-The SIS is a SPARC V7 architecture simulator. It consist of two parts,
-the simulator core and a user defined memory module. The simulator
-core executes the instructions while the memory module emulates memory
-and peripherals. 
-
-2. Usage
-
-The simulator is started as follows: 
-
-sis [-uart1 uart_device1] [-uart2 uart_device2] 
-    [-nfp] [-freq frequency] [-c batch_file] [files] 
-
-The default uart devices for SIS are /dev/ptypc and /dev/ptypd. The
--uart[1,2] switch can be used to connect the uarts to other devices.
-Use 'tip /dev/ttypc'  to connect a terminal emulator to the uarts.
-The '-nfp' will disable the simulated FPU, so each FPU instruction will
-generate a FPU disabled trap. The '-freq' switch can be used to define
-which "frequency" the simulator runs at. This is used by the 'perf'
-command to calculated the MIPS figure for a particular configuration.
-The give frequency must be an integer indicating the frequency in MHz.
-
-The -c option indicates that sis commands should be read from 'batch_file' 
-at startup.
-
-Files to be loaded must be in one of the supported formats (see INSTALLATION),
-and will be loaded into the simulated memory. The file formats are
-automatically recognised.
-
-The script 'startsim' will start the simulator in one xterm window and
-open a terminal emulator (tip) connected to the UART A in a second
-xterm window. Below is description of commands  that are recognized by 
-the simulator. The command-line is parsed using GNU readline. A command
-history of 64 commands is maintained. Use the up/down arrows to recall
-previous commands. For more details, see the readline documentation.
-
-batch <file>
-
-Execute a batch file of SIS commands.
-
-+bp <address>
-
-Adds an breakpoint at address <address>.
-
-bp
-
-Prints all breakpoints
-
--bp <num>
-
-Deletes breakpoint <num>. Use 'bp' to see which number is assigned to the 
-breakpoints.
-
-cont [inst_count]
-
-Continue execution at present position, optionally for [inst_count] 
-instructions.
-
-dis [addr] [count]
-
-Disassemble [count] instructions at address [addr]. Default values for
-count is 16 and addr is the present address.
-
-echo <string>
-
-Print <string> to the simulator window.
-
-float
-
-Prints the FPU registers
-
-go <address> [inst_count]
-
-The go command will set pc to <address> and npc to <address> + 4, and start
-execution. No other initialisation will be done. If inst_count is given, 
-execution will stop after the specified number of instructions.
-
-help
-
-Print a small help menu for the SIS commands.
-
-hist [trace_length]
-
-Enable the instruction trace buffer. The 'trace_length' last executed 
-instructions will be placed in the trace buffer. A 'hist' command without 
-a trace_length will display the trace buffer. Specifying a zero trace 
-length will disable the trace buffer.
-
-load  <file_name>
-
-Loads a file into simulator memory. 
-
-mem [addr] [count]
-
-Display memory at [addr] for [count] bytes. Same default values as above.
-
-quit
-
-Exits the simulator.
-
-perf [reset]
-
-The 'perf' command will display various execution statistics. A 'perf reset' 
-command will reset the statistics. This can be used if statistics shall 
-be calculated only over a part of the program. The 'run' and 'reset' 
-command also resets the statistic information.
-
-reg [reg_name] [value]
-
-Prints and sets the IU regiters. 'reg' without parameters prints the IU
-registers. 'reg [reg_name] [value]' sets the corresponding register to
-[value]. Valid register names are psr, tbr, wim, y, g1-g7, o0-o7 and
-l0-l7.
-
-reset
-
-Performs a power-on reset. This command is equal to 'run 0'.
-
-run [inst_count]
-
-Resets the simulator and starts execution from address 0. If an instruction
-count is given (inst_count), the simulator will stop after the specified 
-number of instructions. The event queue is emptied but any set breakpoints
-remain.
-
-step
-
-Equal to 'trace 1'
-
-tra [inst_count]
-
-Starts the simulator at the present position and prints each instruction
-it executes. If an instruction count is given (inst_count), the simulator 
-will stop after the specified number of instructions.
-
-Typing a 'Ctrl-C' will interrupt a running simulator. 
-
-Short forms of the commands are allowed, e.g 'c' 'co' or 'con' are all
-interpreted as 'cont'. 
-
-
-3. Simulator core
-
-The SIS emulates the behavior of the 90C601E and 90C602E sparc IU and
-FPU from Matra MHS. These are roughly equivalent to the Cypress C601
-and C602.  The simulator is cycle true, i.e a simulator time is
-maintained and inremented according the IU and FPU instruction timing.
-The parallel execution between the IU and FPU is modelled, as well as
-stalls due to operand dependencies (FPU). The core interacts with the
-user-defined memory modules through a number of functions. The memory
-module must provide the following functions:
-
-int memory_read(asi,addr,data,ws)
-int asi;
-unsigned int addr;
-unsigned int *data;
-int *ws;
-
-int memory_write(asi,addr,data,sz,ws)
-int asi;
-unsigned int addr;
-unsigned int *data;
-int sz;
-int *ws;
-
-int sis_memory_read(addr, data, length)
-unsigned int addr;
-char   *data;
-unsigned int length;
-
-int sis_memory_write(addr, data, length)
-unsigned int addr;
-char    *data;
-unsigned int length;
-
-int init_sim()
-
-int reset()
-
-int error_mode(pc)
-unsigned int pc;
-
-memory_read() is used by the simulator to fetch instructions and
-operands.  The address space identifier (asi) and address is passed as
-parameters. The read data should be assigned to the data pointer
-(*data) and the number of waitstate to *ws. 'memory_read' should return
-0 on success and 1 on failure. A failure will cause a data or
-instruction fetch trap. memory_read() always reads one 32-bit word.
-
-sis_memory_read() is used by the simulator to display and disassemble
-memory contants. The function should copy 'length' bytes of the simulated
-memory starting at 'addr' to '*data'.
-The sis_memory_read() should return 1 on success and 0 on failure.
-Failure should only be indicated if access to unimplemented memory is attempted.
-
-memory_write() is used to write to memory. In addition to the asi
-and address parameters, the size of the written data is given by 'sz'.
-The pointer *data points to the data to be written. The 'sz' is coded
-as follows:
-
-  sz	access type
-  0	  byte
-  1	  halfword
-  2	  word
-  3	  double-word
-
-If a double word is written, the most significant word is in data[0] and
-the least significant in data[1].
-
-sis_memory_write() is used by the simulator during loading of programs.
-The function should copy 'length' bytes from *data to the simulated
-memory starting at 'addr'. sis_memory_write() should return 1 on 
-success and 0 on failure. Failure should only be indicated if access 
-to unimplemented memory is attempted. See erc32.c for more details 
-on how to define the memory emulation functions.
-
-The 'init_sim' is called once when the simulator is started. This function
-should be used to perform initialisations of user defined memory or 
-peripherals that only have to be done once, such as opening files etc.
-
-The 'reset' is called every time the simulator is reset, i.e. when a
-'run' command is given. This function should be used to simulate a power
-on reset of memory and peripherals.
-
-error_mode() is called by the simulator when the IU goes into error mode,
-typically if a trap is caused when traps are disabled. The memory module
-can then take actions, such as issue a reset.
-
-sys_reset() can be called by the memory module to reset the simulator. A
-reset will empty the event queue and perform a power-on reset.
-
-4. Events and interrupts
-
-The simulator supports an event queue and the generation of processor
-interrupts. The following functions are available to the user-defined
-memory module:
-
-event(cfunc,arg,delta)
-void (*cfunc)();
-int arg;
-unsigned int delta;
-
-set_int(level,callback,arg)
-int level;
-void (*callback)();
-int arg;
-
-clear_int(level)
-int level;
-
-sim_stop()
-
-The 'event' functions will schedule the execution of the function 'cfunc'
-at time 'now + delta' clock cycles. The parameter 'arg' is passed as a 
-parameter to 'cfunc'.
-
-The 'set_int' function set the processor interrupt 'level'. When the interrupt
-is taken, the function 'callback' is called with the argument 'arg'. This
-will also clear the interrupt. An interrupt can be cleared before it is
-taken by calling 'clear_int' with the appropriate interrupt level.
-
-The sim_stop function is called each time the simulator stops execution.
-It can be used to flush buffered devices to get a clean state during
-single stepping etc.
-
-See 'erc32.c' for examples on how to use events and interrupts.
-
-5. Memory module
-
-The supplied memory module (erc32.c) emulates the functions of memory and
-the MEC asic developed for the 90C601/2. It includes the following functions:
-
-* UART A & B
-* Real-time clock
-* General purpose timer
-* Interrupt controller
-* Breakpoint register
-* Watchpoint register
-* 512 Kbyte ROM
-* 4 Mbyte RAM
-
-See README.erc32 on how the MEC functions are emulated.  For a detailed MEC
-specification, look at the ERC32 home page at URL:
-
-http://www.estec.esa.nl/wsmwww/erc32
-
-6. Compile and linking programs
-
-The directory 'examples' contain some code fragments for SIS.
-The script gccx indicates how the native sunos gcc and linker can be used
-to produce executables for the simulator. To compile and link the provided
-'hello.c', type 'gccx hello.c'. This will build the executable 'hello'.
-Start the simulator by running 'startsim hello', and issue the command 'run.
-After the program is terminated, the IU will be force to error mode through
-a software trap and halt. 
-
-The programs are linked with a start-up file, srt0.S. This file includes
-the traptable and window underflow/overflow trap routines.
-
-7. IU and FPU instruction timing.
-
-The simulator provides cycle true simulation. The following table shows
-the emulated instruction timing for 90C601E & 90C602E:
-
-Instructions	      Cycles
-
-jmpl, rett		2
-load			2
-store			3
-load double		3
-store double		4
-other integer ops	1
-fabs			2
-fadds			4
-faddd			4
-fcmps			4
-fcmpd			4
-fdivs			20
-fdivd			35
-fmovs			2
-fmuls			5
-fmuld			9
-fnegs			2
-fsqrts			37
-fsqrtd			65
-fsubs			4
-fsubd			4
-fdtoi			7
-fdots			3
-fitos			6
-fitod			6
-fstoi			6
-fstod			2
-
-The parallel operation between the IU and FPU is modelled. This means
-that a FPU instruction will execute in parallel with other instructions as
-long as no data or resource dependency is detected. See the 90C602E data
-sheet for the various types of dependencies. Tracing using the 'trace'
-command will display the current simulator time in the left column. This
-time indicates when the instruction is fetched. If a dependency is detetected,
-the following fetch will be delayed until the conflict is resolved.
-
-The load dependency in the 90C601E is also modelled - if the destination 
-register of a load instruction is used by the following instruction, an 
-idle cycle is inserted.
-
-8. FPU implementation
-
-The simulator maps floating-point operations on the hosts floating point
-capabilities. This means that accuracy and generation of IEEE exceptions is 
-host dependent.
diff --git a/sim/erc32/acconfig.h b/sim/erc32/acconfig.h
deleted file mode 100644
index f9b87a1..0000000
--- a/sim/erc32/acconfig.h
+++ /dev/null
@@ -1,15 +0,0 @@
-
-/* Define to 1 if NLS is requested.  */
-#undef ENABLE_NLS
-
-/* Define as 1 if you have catgets and don't want to use GNU gettext.  */
-#undef HAVE_CATGETS
-
-/* Define as 1 if you have gettext and don't want to use GNU gettext.  */
-#undef HAVE_GETTEXT
-
-/* Define as 1 if you have the stpcpy function.  */
-#undef HAVE_STPCPY
-
-/* Define if your locale.h file contains LC_MESSAGES.  */
-#undef HAVE_LC_MESSAGES
diff --git a/sim/erc32/config.in b/sim/erc32/config.in
deleted file mode 100644
index f22f4de..0000000
--- a/sim/erc32/config.in
+++ /dev/null
@@ -1,16 +0,0 @@
-/* config.in.  Generated automatically from configure.in by autoheader.  */
-
-/* Define as the return type of signal handlers (int or void).  */
-#undef RETSIGTYPE
-
-/* Define if you have the <stdlib.h> header file.  */
-#undef HAVE_STDLIB_H
-
-/* Define if you have the <string.h> header file.  */
-#undef HAVE_STRING_H
-
-/* Define if you have the <strings.h> header file.  */
-#undef HAVE_STRINGS_H
-
-/* Define if you have the <unistd.h> header file.  */
-#undef HAVE_UNISTD_H
diff --git a/sim/erc32/configure b/sim/erc32/configure
deleted file mode 100755
index 8878eea..0000000
--- a/sim/erc32/configure
+++ /dev/null
@@ -1,2209 +0,0 @@
-#! /bin/sh
-
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-sim_inline="-DDEFAULT_INLINE=0"
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-# Check to see if we're running under Win32, without using
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-# Guess values for system-dependent variables and create Makefiles.
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-
-# Defaults:
-ac_help=
-ac_default_prefix=/usr/local
-# Any additions from configure.in:
-ac_help="$ac_help
-  --enable-maintainer-mode		Enable developer functionality."
-ac_help="$ac_help
-  --enable-sim-bswap			Use Host specific BSWAP instruction."
-ac_help="$ac_help
-  --enable-sim-cflags=opts		Extra CFLAGS for use in building simulator"
-ac_help="$ac_help
-  --enable-sim-debug=opts		Enable debugging flags"
-ac_help="$ac_help
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-ac_help="$ac_help
-  --enable-sim-profile=opts		Enable profiling flags"
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-if test -n "$ac_prev"; then
-  { echo "configure: error: missing argument to --`echo $ac_prev | sed 's/_/-/g'`" 1>&2; exit 1; }
-fi
-
-trap 'rm -fr conftest* confdefs* core core.* *.core $ac_clean_files; exit 1' 1 2 15
-
-# File descriptor usage:
-# 0 standard input
-# 1 file creation
-# 2 errors and warnings
-# 3 some systems may open it to /dev/tty
-# 4 used on the Kubota Titan
-# 6 checking for... messages and results
-# 5 compiler messages saved in config.log
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-else
-  exec 6>&1
-fi
-exec 5>./config.log
-
-echo "\
-This file contains any messages produced by compilers while
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-" 1>&5
-
-# Strip out --no-create and --no-recursion so they do not pile up.
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-ac_configure_args=
-for ac_arg
-do
-  case "$ac_arg" in
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-  -no-recursion | --no-recursion | --no-recursio | --no-recursi \
-  | --no-recurs | --no-recur | --no-recu | --no-rec | --no-re | --no-r) ;;
-  *" "*|*"	"*|*[\[\]\~\#\$\^\&\*\(\)\{\}\\\|\;\<\>\?]*)
-  ac_configure_args="$ac_configure_args '$ac_arg'" ;;
-  *) ac_configure_args="$ac_configure_args $ac_arg" ;;
-  esac
-done
-
-# NLS nuisances.
-# Only set these to C if already set.  These must not be set unconditionally
-# because not all systems understand e.g. LANG=C (notably SCO).
-# Fixing LC_MESSAGES prevents Solaris sh from translating var values in `set'!
-# Non-C LC_CTYPE values break the ctype check.
-if test "${LANG+set}"   = set; then LANG=C;   export LANG;   fi
-if test "${LC_ALL+set}" = set; then LC_ALL=C; export LC_ALL; fi
-if test "${LC_MESSAGES+set}" = set; then LC_MESSAGES=C; export LC_MESSAGES; fi
-if test "${LC_CTYPE+set}"    = set; then LC_CTYPE=C;    export LC_CTYPE;    fi
-
-# confdefs.h avoids OS command line length limits that DEFS can exceed.
-rm -rf conftest* confdefs.h
-# AIX cpp loses on an empty file, so make sure it contains at least a newline.
-echo > confdefs.h
-
-# A filename unique to this package, relative to the directory that
-# configure is in, which we can look for to find out if srcdir is correct.
-ac_unique_file=Makefile.in
-
-# Find the source files, if location was not specified.
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-  ac_confdir=`echo $ac_prog|sed 's%/[^/][^/]*$%%'`
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-  srcdir=$ac_confdir
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-  fi
-else
-  ac_srcdir_defaulted=no
-fi
-if test ! -r $srcdir/$ac_unique_file; then
-  if test "$ac_srcdir_defaulted" = yes; then
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-  else
-    { echo "configure: error: can not find sources in $srcdir" 1>&2; exit 1; }
-  fi
-fi
-srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
-
-# Prefer explicitly selected file to automatically selected ones.
-if test -z "$CONFIG_SITE"; then
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-    CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
-  fi
-fi
-for ac_site_file in $CONFIG_SITE; do
-  if test -r "$ac_site_file"; then
-    echo "loading site script $ac_site_file"
-    . "$ac_site_file"
-  fi
-done
-
-if test -r "$cache_file"; then
-  echo "loading cache $cache_file"
-  . $cache_file
-else
-  echo "creating cache $cache_file"
-  > $cache_file
-fi
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-ac_exeext=
-ac_objext=o
-if (echo "testing\c"; echo 1,2,3) | grep c >/dev/null; then
-  # Stardent Vistra SVR4 grep lacks -e, says ghazi@caip.rutgers.edu.
-  if (echo -n testing; echo 1,2,3) | sed s/-n/xn/ | grep xn >/dev/null; then
-    ac_n= ac_c='
-' ac_t='	'
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-  ac_n= ac_c='\c' ac_t=
-fi
-
-
-
-echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6
-echo "configure:632: checking how to run the C preprocessor" >&5
-# On Suns, sometimes $CPP names a directory.
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-fi
-if test -z "$CPP"; then
-if eval "test \"`echo '$''{'ac_cv_prog_CPP'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-    # This must be in double quotes, not single quotes, because CPP may get
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-  # On the NeXT, cc -E runs the code through the compiler's parser,
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-  cat > conftest.$ac_ext <<EOF
-#line 647 "configure"
-#include "confdefs.h"
-#include <assert.h>
-Syntax Error
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:653: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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-else
-  echo "$ac_err" >&5
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  CPP="${CC-cc} -E -traditional-cpp"
-  cat > conftest.$ac_ext <<EOF
-#line 664 "configure"
-#include "confdefs.h"
-#include <assert.h>
-Syntax Error
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:670: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
-  :
-else
-  echo "$ac_err" >&5
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  CPP="${CC-cc} -nologo -E"
-  cat > conftest.$ac_ext <<EOF
-#line 681 "configure"
-#include "confdefs.h"
-#include <assert.h>
-Syntax Error
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:687: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
-  :
-else
-  echo "$ac_err" >&5
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  CPP=/lib/cpp
-fi
-rm -f conftest*
-fi
-rm -f conftest*
-fi
-rm -f conftest*
-  ac_cv_prog_CPP="$CPP"
-fi
-  CPP="$ac_cv_prog_CPP"
-else
-  ac_cv_prog_CPP="$CPP"
-fi
-echo "$ac_t""$CPP" 1>&6
-
-
-# autoconf.info says this should be called right after AC_INIT.
-
-
-ac_aux_dir=
-for ac_dir in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../..; do
-  if test -f $ac_dir/install-sh; then
-    ac_aux_dir=$ac_dir
-    ac_install_sh="$ac_aux_dir/install-sh -c"
-    break
-  elif test -f $ac_dir/install.sh; then
-    ac_aux_dir=$ac_dir
-    ac_install_sh="$ac_aux_dir/install.sh -c"
-    break
-  fi
-done
-if test -z "$ac_aux_dir"; then
-  { echo "configure: error: can not find install-sh or install.sh in `cd $srcdir;pwd`/../.. $srcdir/`cd $srcdir;pwd`/../.." 1>&2; exit 1; }
-fi
-ac_config_guess=$ac_aux_dir/config.guess
-ac_config_sub=$ac_aux_dir/config.sub
-ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
-
-
-# Do some error checking and defaulting for the host and target type.
-# The inputs are:
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-#
-# The rules are:
-# 1. You are not allowed to specify --host, --target, and nonopt at the
-#    same time.
-# 2. Host defaults to nonopt.
-# 3. If nonopt is not specified, then host defaults to the current host,
-#    as determined by config.guess.
-# 4. Target and build default to nonopt.
-# 5. If nonopt is not specified, then target and build default to host.
-
-# The aliases save the names the user supplied, while $host etc.
-# will get canonicalized.
-case $host---$target---$nonopt in
-NONE---*---* | *---NONE---* | *---*---NONE) ;;
-*) { echo "configure: error: can only configure for one host and one target at a time" 1>&2; exit 1; } ;;
-esac
-
-
-# Make sure we can run config.sub.
-if ${CONFIG_SHELL-/bin/sh} $ac_config_sub sun4 >/dev/null 2>&1; then :
-else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking host system type""... $ac_c" 1>&6
-echo "configure:762: checking host system type" >&5
-
-host_alias=$host
-case "$host_alias" in
-NONE)
-  case $nonopt in
-  NONE)
-    if host_alias=`${CONFIG_SHELL-/bin/sh} $ac_config_guess`; then :
-    else { echo "configure: error: can not guess host type; you must specify one" 1>&2; exit 1; }
-    fi ;;
-  *) host_alias=$nonopt ;;
-  esac ;;
-esac
-
-host=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $host_alias`
-host_cpu=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-host_vendor=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$host" 1>&6
-
-echo $ac_n "checking target system type""... $ac_c" 1>&6
-echo "configure:783: checking target system type" >&5
-
-target_alias=$target
-case "$target_alias" in
-NONE)
-  case $nonopt in
-  NONE) target_alias=$host_alias ;;
-  *) target_alias=$nonopt ;;
-  esac ;;
-esac
-
-target=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $target_alias`
-target_cpu=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-target_vendor=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$target" 1>&6
-
-echo $ac_n "checking build system type""... $ac_c" 1>&6
-echo "configure:801: checking build system type" >&5
-
-build_alias=$build
-case "$build_alias" in
-NONE)
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-  NONE) build_alias=$host_alias ;;
-  *) build_alias=$nonopt ;;
-  esac ;;
-esac
-
-build=`${CONFIG_SHELL-/bin/sh} $ac_config_sub $build_alias`
-build_cpu=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\1/'`
-build_vendor=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\2/'`
-build_os=`echo $build | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
-echo "$ac_t""$build" 1>&6
-
-test "$host_alias" != "$target_alias" &&
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-
-if test "$program_transform_name" = s,x,x,; then
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-  # Double any \ or $.  echo might interpret backslashes.
-  cat <<\EOF_SED > conftestsed
-s,\\,\\\\,g; s,\$,$$,g
-EOF_SED
-  program_transform_name="`echo $program_transform_name|sed -f conftestsed`"
-  rm -f conftestsed
-fi
-test "$program_prefix" != NONE &&
-  program_transform_name="s,^,${program_prefix},; $program_transform_name"
-# Use a double $ so make ignores it.
-test "$program_suffix" != NONE &&
-  program_transform_name="s,\$\$,${program_suffix},; $program_transform_name"
-
-# sed with no file args requires a program.
-test "$program_transform_name" = "" && program_transform_name="s,x,x,"
-
-# Extract the first word of "gcc", so it can be a program name with args.
-set dummy gcc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:845: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  if test -n "$CC"; then
-  ac_cv_prog_CC="$CC" # Let the user override the test.
-else
-  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
-  for ac_dir in $PATH; do
-    test -z "$ac_dir" && ac_dir=.
-    if test -f $ac_dir/$ac_word; then
-      ac_cv_prog_CC="gcc"
-      break
-    fi
-  done
-  IFS="$ac_save_ifs"
-fi
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-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
-  echo "$ac_t""$CC" 1>&6
-else
-  echo "$ac_t""no" 1>&6
-fi
-
-if test -z "$CC"; then
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-set dummy cc; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:874: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  if test -n "$CC"; then
-  ac_cv_prog_CC="$CC" # Let the user override the test.
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-  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
-  ac_prog_rejected=no
-  for ac_dir in $PATH; do
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-    if test -f $ac_dir/$ac_word; then
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-	continue
-      fi
-      ac_cv_prog_CC="cc"
-      break
-    fi
-  done
-  IFS="$ac_save_ifs"
-if test $ac_prog_rejected = yes; then
-  # We found a bogon in the path, so make sure we never use it.
-  set dummy $ac_cv_prog_CC
-  shift
-  if test $# -gt 0; then
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-    # first if we set CC to just the basename; use the full file name.
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-    shift
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-  fi
-fi
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
-  echo "$ac_t""$CC" 1>&6
-else
-  echo "$ac_t""no" 1>&6
-fi
-
-  if test -z "$CC"; then
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-      # Extract the first word of "cl", so it can be a program name with args.
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-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:924: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  if test -n "$CC"; then
-  ac_cv_prog_CC="$CC" # Let the user override the test.
-else
-  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
-  for ac_dir in $PATH; do
-    test -z "$ac_dir" && ac_dir=.
-    if test -f $ac_dir/$ac_word; then
-      ac_cv_prog_CC="cl"
-      break
-    fi
-  done
-  IFS="$ac_save_ifs"
-fi
-fi
-CC="$ac_cv_prog_CC"
-if test -n "$CC"; then
-  echo "$ac_t""$CC" 1>&6
-else
-  echo "$ac_t""no" 1>&6
-fi
- ;;
-    esac
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-  test -z "$CC" && { echo "configure: error: no acceptable cc found in \$PATH" 1>&2; exit 1; }
-fi
-
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
-echo "configure:955: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
-
-ac_ext=c
-# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
-ac_cpp='$CPP $CPPFLAGS'
-ac_compile='${CC-cc} -c $CFLAGS $CPPFLAGS conftest.$ac_ext 1>&5'
-ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS 1>&5'
-cross_compiling=$ac_cv_prog_cc_cross
-
-cat > conftest.$ac_ext <<EOF
-#line 965 "configure"
-#include "confdefs.h"
-main(){return(0);}
-EOF
-if { (eval echo configure:969: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
-  ac_cv_prog_cc_works=yes
-  # If we can't run a trivial program, we are probably using a cross compiler.
-  if (./conftest; exit) 2>/dev/null; then
-    ac_cv_prog_cc_cross=no
-  else
-    ac_cv_prog_cc_cross=yes
-  fi
-else
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  ac_cv_prog_cc_works=no
-fi
-rm -fr conftest*
-
-echo "$ac_t""$ac_cv_prog_cc_works" 1>&6
-if test $ac_cv_prog_cc_works = no; then
-  { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
-fi
-echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
-echo "configure:989: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
-echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
-cross_compiling=$ac_cv_prog_cc_cross
-
-echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
-echo "configure:994: checking whether we are using GNU C" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.c <<EOF
-#ifdef __GNUC__
-  yes;
-#endif
-EOF
-if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1003: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
-  ac_cv_prog_gcc=yes
-else
-  ac_cv_prog_gcc=no
-fi
-fi
-
-echo "$ac_t""$ac_cv_prog_gcc" 1>&6
-
-if test $ac_cv_prog_gcc = yes; then
-  GCC=yes
-else
-  GCC=
-fi
-
-ac_test_CFLAGS="${CFLAGS+set}"
-ac_save_CFLAGS="$CFLAGS"
-CFLAGS=
-echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
-echo "configure:1022: checking whether ${CC-cc} accepts -g" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  echo 'void f(){}' > conftest.c
-if test -z "`${CC-cc} -g -c conftest.c 2>&1`"; then
-  ac_cv_prog_cc_g=yes
-else
-  ac_cv_prog_cc_g=no
-fi
-rm -f conftest*
-
-fi
-
-echo "$ac_t""$ac_cv_prog_cc_g" 1>&6
-if test "$ac_test_CFLAGS" = set; then
-  CFLAGS="$ac_save_CFLAGS"
-elif test $ac_cv_prog_cc_g = yes; then
-  if test "$GCC" = yes; then
-    CFLAGS="-g -O2"
-  else
-    CFLAGS="-g"
-  fi
-else
-  if test "$GCC" = yes; then
-    CFLAGS="-O2"
-  else
-    CFLAGS=
-  fi
-fi
-
-# Find a good install program.  We prefer a C program (faster),
-# so one script is as good as another.  But avoid the broken or
-# incompatible versions:
-# SysV /etc/install, /usr/sbin/install
-# SunOS /usr/etc/install
-# IRIX /sbin/install
-# AIX /bin/install
-# AIX 4 /usr/bin/installbsd, which doesn't work without a -g flag
-# AFS /usr/afsws/bin/install, which mishandles nonexistent args
-# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
-# ./install, which can be erroneously created by make from ./install.sh.
-echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
-echo "configure:1065: checking for a BSD compatible install" >&5
-if test -z "$INSTALL"; then
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-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-    IFS="${IFS= 	}"; ac_save_IFS="$IFS"; IFS=":"
-  for ac_dir in $PATH; do
-    # Account for people who put trailing slashes in PATH elements.
-    case "$ac_dir/" in
-    /|./|.//|/etc/*|/usr/sbin/*|/usr/etc/*|/sbin/*|/usr/afsws/bin/*|/usr/ucb/*) ;;
-    *)
-      # OSF1 and SCO ODT 3.0 have their own names for install.
-      # Don't use installbsd from OSF since it installs stuff as root
-      # by default.
-      for ac_prog in ginstall scoinst install; do
-        if test -f $ac_dir/$ac_prog; then
-	  if test $ac_prog = install &&
-            grep dspmsg $ac_dir/$ac_prog >/dev/null 2>&1; then
-	    # AIX install.  It has an incompatible calling convention.
-	    :
-	  else
-	    ac_cv_path_install="$ac_dir/$ac_prog -c"
-	    break 2
-	  fi
-	fi
-      done
-      ;;
-    esac
-  done
-  IFS="$ac_save_IFS"
-
-fi
-  if test "${ac_cv_path_install+set}" = set; then
-    INSTALL="$ac_cv_path_install"
-  else
-    # As a last resort, use the slow shell script.  We don't cache a
-    # path for INSTALL within a source directory, because that will
-    # break other packages using the cache if that directory is
-    # removed, or if the path is relative.
-    INSTALL="$ac_install_sh"
-  fi
-fi
-echo "$ac_t""$INSTALL" 1>&6
-
-# Use test -z because SunOS4 sh mishandles braces in ${var-val}.
-# It thinks the first close brace ends the variable substitution.
-test -z "$INSTALL_PROGRAM" && INSTALL_PROGRAM='${INSTALL}'
-
-test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644'
-
-
-# Put a plausible default for CC_FOR_BUILD in Makefile.
-if test "x$cross_compiling" = "xno"; then
-  CC_FOR_BUILD='$(CC)'
-else
-  CC_FOR_BUILD=gcc
-fi
-
-
-
-
-AR=${AR-ar}
-
-# Extract the first word of "ranlib", so it can be a program name with args.
-set dummy ranlib; ac_word=$2
-echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
-echo "configure:1131: checking for $ac_word" >&5
-if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  if test -n "$RANLIB"; then
-  ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test.
-else
-  IFS="${IFS= 	}"; ac_save_ifs="$IFS"; IFS=":"
-  for ac_dir in $PATH; do
-    test -z "$ac_dir" && ac_dir=.
-    if test -f $ac_dir/$ac_word; then
-      ac_cv_prog_RANLIB="ranlib"
-      break
-    fi
-  done
-  IFS="$ac_save_ifs"
-  test -z "$ac_cv_prog_RANLIB" && ac_cv_prog_RANLIB=":"
-fi
-fi
-RANLIB="$ac_cv_prog_RANLIB"
-if test -n "$RANLIB"; then
-  echo "$ac_t""$RANLIB" 1>&6
-else
-  echo "$ac_t""no" 1>&6
-fi
-
-
-# Check for common headers.
-# FIXME: Seems to me this can cause problems for i386-windows hosts.
-# At one point there were hardcoded AC_DEFINE's if ${host} = i386-*-windows*.
-for ac_hdr in stdlib.h string.h strings.h unistd.h time.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1165: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.$ac_ext <<EOF
-#line 1170 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1175: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
-  rm -rf conftest*
-  eval "ac_cv_header_$ac_safe=yes"
-else
-  echo "$ac_err" >&5
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
-  echo "$ac_t""yes" 1>&6
-    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
-  cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
- 
-else
-  echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in sys/time.h sys/resource.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1205: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.$ac_ext <<EOF
-#line 1210 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1215: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
-  rm -rf conftest*
-  eval "ac_cv_header_$ac_safe=yes"
-else
-  echo "$ac_err" >&5
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
-  echo "$ac_t""yes" 1>&6
-    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
-  cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
- 
-else
-  echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_hdr in fcntl.h fpu_control.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1245: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.$ac_ext <<EOF
-#line 1250 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1255: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
-  rm -rf conftest*
-  eval "ac_cv_header_$ac_safe=yes"
-else
-  echo "$ac_err" >&5
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  eval "ac_cv_header_$ac_safe=no"
-fi
-rm -f conftest*
-fi
-if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then
-  echo "$ac_t""yes" 1>&6
-    ac_tr_hdr=HAVE_`echo $ac_hdr | sed 'y%abcdefghijklmnopqrstuvwxyz./-%ABCDEFGHIJKLMNOPQRSTUVWXYZ___%'`
-  cat >> confdefs.h <<EOF
-#define $ac_tr_hdr 1
-EOF
- 
-else
-  echo "$ac_t""no" 1>&6
-fi
-done
-
-for ac_func in getrusage time sigaction __setfpucw
-do
-echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1284: checking for $ac_func" >&5
-if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.$ac_ext <<EOF
-#line 1289 "configure"
-#include "confdefs.h"
-/* System header to define __stub macros and hopefully few prototypes,
-    which can conflict with char $ac_func(); below.  */
-#include <assert.h>
-/* Override any gcc2 internal prototype to avoid an error.  */
-/* We use char because int might match the return type of a gcc2
-    builtin and then its argument prototype would still apply.  */
-char $ac_func();
-
-int main() {
-
-/* The GNU C library defines this for functions which it implements
-    to always fail with ENOSYS.  Some functions are actually named
-    something starting with __ and the normal name is an alias.  */
-#if defined (__stub_$ac_func) || defined (__stub___$ac_func)
-choke me
-#else
-$ac_func();
-#endif
-
-; return 0; }
-EOF
-if { (eval echo configure:1312: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
-  rm -rf conftest*
-  eval "ac_cv_func_$ac_func=yes"
-else
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  eval "ac_cv_func_$ac_func=no"
-fi
-rm -f conftest*
-fi
-
-if eval "test \"`echo '$ac_cv_func_'$ac_func`\" = yes"; then
-  echo "$ac_t""yes" 1>&6
-    ac_tr_func=HAVE_`echo $ac_func | tr 'abcdefghijklmnopqrstuvwxyz' 'ABCDEFGHIJKLMNOPQRSTUVWXYZ'`
-  cat >> confdefs.h <<EOF
-#define $ac_tr_func 1
-EOF
- 
-else
-  echo "$ac_t""no" 1>&6
-fi
-done
-
-
-# Check for socket libraries
-echo $ac_n "checking for bind in -lsocket""... $ac_c" 1>&6
-echo "configure:1339: checking for bind in -lsocket" >&5
-ac_lib_var=`echo socket'_'bind | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  ac_save_LIBS="$LIBS"
-LIBS="-lsocket  $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 1347 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error.  */
-/* We use char because int might match the return type of a gcc2
-    builtin and then its argument prototype would still apply.  */
-char bind();
-
-int main() {
-bind()
-; return 0; }
-EOF
-if { (eval echo configure:1358: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
-  rm -rf conftest*
-  eval "ac_cv_lib_$ac_lib_var=yes"
-else
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
-  echo "$ac_t""yes" 1>&6
-    ac_tr_lib=HAVE_LIB`echo socket | sed -e 's/[^a-zA-Z0-9_]/_/g' \
-    -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
-  cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
-  LIBS="-lsocket $LIBS"
-
-else
-  echo "$ac_t""no" 1>&6
-fi
-
-echo $ac_n "checking for gethostbyname in -lnsl""... $ac_c" 1>&6
-echo "configure:1386: checking for gethostbyname in -lnsl" >&5
-ac_lib_var=`echo nsl'_'gethostbyname | sed 'y%./+-%__p_%'`
-if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  ac_save_LIBS="$LIBS"
-LIBS="-lnsl  $LIBS"
-cat > conftest.$ac_ext <<EOF
-#line 1394 "configure"
-#include "confdefs.h"
-/* Override any gcc2 internal prototype to avoid an error.  */
-/* We use char because int might match the return type of a gcc2
-    builtin and then its argument prototype would still apply.  */
-char gethostbyname();
-
-int main() {
-gethostbyname()
-; return 0; }
-EOF
-if { (eval echo configure:1405: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
-  rm -rf conftest*
-  eval "ac_cv_lib_$ac_lib_var=yes"
-else
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  eval "ac_cv_lib_$ac_lib_var=no"
-fi
-rm -f conftest*
-LIBS="$ac_save_LIBS"
-
-fi
-if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then
-  echo "$ac_t""yes" 1>&6
-    ac_tr_lib=HAVE_LIB`echo nsl | sed -e 's/[^a-zA-Z0-9_]/_/g' \
-    -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/'`
-  cat >> confdefs.h <<EOF
-#define $ac_tr_lib 1
-EOF
-
-  LIBS="-lnsl $LIBS"
-
-else
-  echo "$ac_t""no" 1>&6
-fi
-
-
-. ${srcdir}/../../bfd/configure.host
-
-
-
-USE_MAINTAINER_MODE=no
-# Check whether --enable-maintainer-mode or --disable-maintainer-mode was given.
-if test "${enable_maintainer_mode+set}" = set; then
-  enableval="$enable_maintainer_mode"
-  case "${enableval}" in
-  yes)	MAINT="" USE_MAINTAINER_MODE=yes ;;
-  no)	MAINT="#" ;;
-  *)	{ echo "configure: error: "--enable-maintainer-mode does not take a value"" 1>&2; exit 1; }; MAINT="#" ;;
-esac
-if test x"$silent" != x"yes" && test x"$MAINT" = x""; then
-  echo "Setting maintainer mode" 6>&1
-fi
-else
-  MAINT="#"
-fi
-
-
-
-# Check whether --enable-sim-bswap or --disable-sim-bswap was given.
-if test "${enable_sim_bswap+set}" = set; then
-  enableval="$enable_sim_bswap"
-  case "${enableval}" in
-  yes)	sim_bswap="-DWITH_BSWAP=1 -DUSE_BSWAP=1";;
-  no)	sim_bswap="-DWITH_BSWAP=0";;
-  *)	{ echo "configure: error: "--enable-sim-bswap does not take a value"" 1>&2; exit 1; }; sim_bswap="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_bswap" != x""; then
-  echo "Setting bswap flags = $sim_bswap" 6>&1
-fi
-else
-  sim_bswap=""
-fi
-
-
-
-# Check whether --enable-sim-cflags or --disable-sim-cflags was given.
-if test "${enable_sim_cflags+set}" = set; then
-  enableval="$enable_sim_cflags"
-  case "${enableval}" in
-  yes)	 sim_cflags="-O2";;
-  trace) { echo "configure: error: "Please use --enable-sim-debug instead."" 1>&2; exit 1; }; sim_cflags="";;
-  no)	 sim_cflags="";;
-  *)	 sim_cflags=`echo "${enableval}" | sed -e "s/,/ /g"`;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_cflags" != x""; then
-  echo "Setting sim cflags = $sim_cflags" 6>&1
-fi
-else
-  sim_cflags=""
-fi
-
-
-
-# Check whether --enable-sim-debug or --disable-sim-debug was given.
-if test "${enable_sim_debug+set}" = set; then
-  enableval="$enable_sim_debug"
-  case "${enableval}" in
-  yes) sim_debug="-DDEBUG=7 -DWITH_DEBUG=7";;
-  no)  sim_debug="-DDEBUG=0 -DWITH_DEBUG=0";;
-  *)   sim_debug="-DDEBUG='(${enableval})' -DWITH_DEBUG='(${enableval})'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_debug" != x""; then
-  echo "Setting sim debug = $sim_debug" 6>&1
-fi
-else
-  sim_debug=""
-fi
-
-
-
-# Check whether --enable-sim-stdio or --disable-sim-stdio was given.
-if test "${enable_sim_stdio+set}" = set; then
-  enableval="$enable_sim_stdio"
-  case "${enableval}" in
-  yes)	sim_stdio="-DWITH_STDIO=DO_USE_STDIO";;
-  no)	sim_stdio="-DWITH_STDIO=DONT_USE_STDIO";;
-  *)	{ echo "configure: error: "Unknown value $enableval passed to --enable-sim-stdio"" 1>&2; exit 1; }; sim_stdio="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_stdio" != x""; then
-  echo "Setting stdio flags = $sim_stdio" 6>&1
-fi
-else
-  sim_stdio=""
-fi
-
-
-
-# Check whether --enable-sim-trace or --disable-sim-trace was given.
-if test "${enable_sim_trace+set}" = set; then
-  enableval="$enable_sim_trace"
-  case "${enableval}" in
-  yes)	sim_trace="-DTRACE=1 -DWITH_TRACE=-1";;
-  no)	sim_trace="-DTRACE=0 -DWITH_TRACE=0";;
-  [-0-9]*)
-	sim_trace="-DTRACE='(${enableval})' -DWITH_TRACE='(${enableval})'";;
-  [a-z]*)
-	sim_trace=""
-	for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
-	  if test x"$sim_trace" = x; then
-	    sim_trace="-DWITH_TRACE='(TRACE_$x"
-	  else
-	    sim_trace="${sim_trace}|TRACE_$x"
-	  fi
-	done
-	sim_trace="$sim_trace)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_trace" != x""; then
-  echo "Setting sim trace = $sim_trace" 6>&1
-fi
-else
-  sim_trace=""
-fi
-
-
-
-# Check whether --enable-sim-profile or --disable-sim-profile was given.
-if test "${enable_sim_profile+set}" = set; then
-  enableval="$enable_sim_profile"
-  case "${enableval}" in
-  yes)	sim_profile="-DPROFILE=1 -DWITH_PROFILE=-1";;
-  no)	sim_profile="-DPROFILE=0 -DWITH_PROFILE=0";;
-  [-0-9]*)
-	sim_profile="-DPROFILE='(${enableval})' -DWITH_PROFILE='(${enableval})'";;
-  [a-z]*)
-	sim_profile=""
-	for x in `echo "$enableval" | sed -e "s/,/ /g"`; do
-	  if test x"$sim_profile" = x; then
-	    sim_profile="-DWITH_PROFILE='(PROFILE_$x"
-	  else
-	    sim_profile="${sim_profile}|PROFILE_$x"
-	  fi
-	done
-	sim_profile="$sim_profile)'" ;;
-esac
-if test x"$silent" != x"yes" && test x"$sim_profile" != x""; then
-  echo "Setting sim profile = $sim_profile" 6>&1
-fi
-else
-  sim_profile=""
-fi
-
-
-
-echo $ac_n "checking return type of signal handlers""... $ac_c" 1>&6
-echo "configure:1581: checking return type of signal handlers" >&5
-if eval "test \"`echo '$''{'ac_cv_type_signal'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.$ac_ext <<EOF
-#line 1586 "configure"
-#include "confdefs.h"
-#include <sys/types.h>
-#include <signal.h>
-#ifdef signal
-#undef signal
-#endif
-#ifdef __cplusplus
-extern "C" void (*signal (int, void (*)(int)))(int);
-#else
-void (*signal ()) ();
-#endif
-
-int main() {
-int i;
-; return 0; }
-EOF
-if { (eval echo configure:1603: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
-  rm -rf conftest*
-  ac_cv_type_signal=void
-else
-  echo "configure: failed program was:" >&5
-  cat conftest.$ac_ext >&5
-  rm -rf conftest*
-  ac_cv_type_signal=int
-fi
-rm -f conftest*
-fi
-
-echo "$ac_t""$ac_cv_type_signal" 1>&6
-cat >> confdefs.h <<EOF
-#define RETSIGTYPE $ac_cv_type_signal
-EOF
-
-
-
-echo $ac_n "checking for executable suffix""... $ac_c" 1>&6
-echo "configure:1623: checking for executable suffix" >&5
-if eval "test \"`echo '$''{'am_cv_exeext'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  if test "$CYGWIN32" = yes; then
-am_cv_exeext=.exe
-else
-cat > am_c_test.c << 'EOF'
-int main() {
-/* Nothing needed here */
-}
-EOF
-${CC-cc} -o am_c_test $CFLAGS $CPPFLAGS $LDFLAGS am_c_test.c $LIBS 1>&5
-am_cv_exeext=`ls am_c_test.* | grep -v am_c_test.c | sed -e s/am_c_test//`
-rm -f am_c_test*
-fi
-
-test x"${am_cv_exeext}" = x && am_cv_exeext=no
-fi
-EXEEXT=""
-test x"${am_cv_exeext}" != xno && EXEEXT=${am_cv_exeext}
-echo "$ac_t""${am_cv_exeext}" 1>&6
-
-
-sim_link_files=
-sim_link_links=
-
-sim_link_links=tconfig.h
-if test -f ${srcdir}/tconfig.in
-then
-  sim_link_files=tconfig.in
-else
-  sim_link_files=../common/tconfig.in
-fi
-
-# targ-vals.def points to the libc macro description file.
-case "${target}" in
-*-*-*) TARG_VALS_DEF=../common/nltvals.def ;;
-esac
-sim_link_files="${sim_link_files} ${TARG_VALS_DEF}"
-sim_link_links="${sim_link_links} targ-vals.def"
-
-
-
-for ac_hdr in stdlib.h
-do
-ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
-echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1671: checking for $ac_hdr" >&5
-if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
-  echo $ac_n "(cached) $ac_c" 1>&6
-else
-  cat > conftest.$ac_ext <<EOF
-#line 1676 "configure"
-#include "confdefs.h"
-#include <$ac_hdr>
-EOF
-ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1681: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
-ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
-if test -z "$ac_err"; then
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-
-if test "${CONFIG_HEADERS+set}" != set; then
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-cat >> $CONFIG_STATUS <<EOF
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-cat >> $CONFIG_STATUS <<\EOF
-fi
-for ac_file in .. $CONFIG_HEADERS; do if test "x$ac_file" != x..; then
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-  cat $ac_file_inputs > conftest.in
-
-EOF
-
-# Transform confdefs.h into a sed script conftest.vals that substitutes
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-
-cat >> $CONFIG_STATUS <<\EOF
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-cat >> $CONFIG_STATUS <<EOF
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-
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-cat >> $CONFIG_STATUS <<EOF
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-EOF
-cat >> $CONFIG_STATUS <<\EOF
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-   sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >Makesim2.tmp
-   sed -e '/^## COMMON_PRE_/ r Makesim1.tmp' \
-	-e '/^## COMMON_POST_/ r Makesim2.tmp' \
-	<Makefile.sim >Makefile
-   rm -f Makefile.sim Make-common.sim Makesim1.tmp Makesim2.tmp
-   ;;
- esac
- case "x$CONFIG_HEADERS" in xconfig.h:config.in) echo > stamp-h ;; esac
-
-exit 0
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-chmod +x $CONFIG_STATUS
-rm -fr confdefs* $ac_clean_files
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-
-
diff --git a/sim/erc32/configure.in b/sim/erc32/configure.in
deleted file mode 100644
index c139f71..0000000
--- a/sim/erc32/configure.in
+++ /dev/null
@@ -1,13 +0,0 @@
-dnl Process this file with autoconf to produce a configure script.
-sinclude(../common/aclocal.m4)
-AC_PREREQ(2.5)dnl
-AC_INIT(Makefile.in)
-
-SIM_AC_COMMON
-
-AC_CHECK_HEADERS(stdlib.h)
-
-AC_CHECK_LIB(termcap, main, TERMCAP=-ltermcap, TERMCAP="")
-AC_SUBST(TERMCAP)
-
-SIM_AC_OUTPUT
diff --git a/sim/erc32/end.c b/sim/erc32/end.c
deleted file mode 100644
index 5cd454a..0000000
--- a/sim/erc32/end.c
+++ /dev/null
@@ -1,23 +0,0 @@
-main()
-{
-
-    unsigned int    u1;
-    char           *c;
-    double          d1;
-    float          *f1;
-
-    c = (char *) &u1;
-    u1 = 0x0F;
-    if (c[0] == 0x0F)
-	puts("#define HOST_LITTLE_ENDIAN\n");
-    else
-	puts("#define HOST_BIG_ENDIAN\n");
-
-    d1 = 1.0;
-    f1 = (float *) &d1;
-    if (*((int *) f1) != 0x3ff00000)
-	puts("#define HOST_LITTLE_ENDIAN_FLOAT\n");
-    else
-	puts("#define HOST_BIG_ENDIAN_FLOAT\n");
-    exit(0);
-}
diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c
deleted file mode 100644
index 2b0b370..0000000
--- a/sim/erc32/erc32.c
+++ /dev/null
@@ -1,1495 +0,0 @@
-/*
- * This file is part of SIS.
- * 
- * SIS, SPARC instruction simulator V1.8 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- * 
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- * 
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- * 
- */
-
-/* The control space devices */
-
-#include <sys/types.h>
-#include <stdio.h>
-#include <sys/ioctl.h>
-#include <sys/fcntl.h>
-#include <sys/file.h>
-#include "sis.h"
-#include "end.h"
-
-extern int32    sis_verbose;
-extern int      mecrev0;
-extern char     uart_dev1[], uart_dev2[];
-
-#define MEC_WS	0		/* Waitstates per MEC access (0 ws) */
-#define MOK	0
-
-/* MEC register addresses */
-
-#define MEC_UARTA	0x0E0
-#define MEC_UARTB	0x0E4
-#define MEC_UART_CTRL	0x0E8
-#define MEC_TIMER_CTRL	0x098
-#define MEC_RTC_COUNTER	0x080
-#define MEC_RTC_RELOAD	0x080
-#define MEC_RTC_SCALER	0x084
-#define MEC_GPT_COUNTER	0x088
-#define MEC_GPT_RELOAD	0x088
-#define MEC_GPT_SCALER	0x08C
-#define MEC_DBG		0x0C0
-#define MEC_BRK		0x0C4
-#define MEC_WPR		0x0C8
-#define MEC_SFSR	0x0A0
-#define MEC_FFAR	0x0A4
-#define MEC_IPR		0x048
-#define MEC_IMR 	0x04C
-#define MEC_ICR 	0x050
-#define MEC_IFR 	0x054
-#define MEC_MCR		0x000
-#define MEC_MEMCFG	0x010
-#define MEC_WCR		0x018
-#define MEC_MAR0  	0x020
-#define MEC_MAR1  	0x024
-#define MEC_SFR  	0x004
-#define MEC_WDOG  	0x060
-#define MEC_TRAPD  	0x064
-#define MEC_PWDR  	0x008
-#define SIM_LOAD	0x0F0
-
-/* Memory exception causes */
-#define PROT_EXC	0x3
-#define UIMP_ACC	0x4
-#define MEC_ACC		0x6
-#define WATCH_EXC	0xa
-#define BREAK_EXC	0xb
-
-/* Size of UART buffers (bytes) */
-#define UARTBUF	1024
-
-/* Number of simulator ticks between flushing the UARTS. 	 */
-/* For good performance, keep above 1000			 */
-#define UART_FLUSH_TIME	  3000
-
-/* MEC timer control register bits */
-#define TCR_GACR 1
-#define TCR_GACL 2
-#define TCR_GASE 4
-#define TCR_GASL 8
-#define TCR_TCRCR 0x100
-#define TCR_TCRCL 0x200
-#define TCR_TCRSE 0x400
-#define TCR_TCRSL 0x800
-
-/* New uart defines */
-#define UART_TX_TIME	1000
-#define UART_RX_TIME	1000
-#define UARTA_DR	0x1
-#define UARTA_SRE	0x2
-#define UARTA_HRE	0x4
-#define UARTA_OR	0x40
-#define UARTA_CLR	0x80
-#define UARTB_DR	0x10000
-#define UARTB_SRE	0x20000
-#define UARTB_HRE	0x40000
-#define UARTB_OR	0x400000
-#define UARTB_CLR	0x800000
-
-#define UART_DR		0x100
-#define UART_TSE	0x200
-#define UART_THE	0x400
-
-/* MEC registers */
-
-static char     fname[256];
-static uint32   find = 0;
-static char     simfn[] = "simload";
-static uint32   brk_point = 0;
-static uint32   watch_point = 0;
-static uint32   mec_dbg = 0;
-static uint32   mec_sfsr = 0x078;
-static uint32   mec_ffar = 0;
-static uint32   mec_ipr = 0;
-static uint32   mec_imr = 0x3fff;
-static uint32   mec_icr = 0;
-static uint32   mec_ifr = 0;
-static uint32   mec_mcr;	/* MEC control register */
-static uint32   mec_memcfg;	/* Memory control register */
-static uint32   mec_wcr;	/* MEC waitstate register */
-static uint32   mec_mar0;	/* MEC access registers (2) */
-static uint32   mec_mar1;	/* MEC access registers (2) */
-static uint32   mec_regs[64];
-static uint32   posted_irq;
-static uint32   mec_ersr = 0;	/* MEC error and status register */
-static uint32   mec_emr = 0x60;	/* MEC error mask register */
-static uint32   mec_tcr = 0;	/* MEC test comtrol register */
-
-static uint32   rtc_counter = 0xffffffff;
-static uint32   rtc_reload = 0xffffffff;
-static uint32   rtc_scaler = 0xff;
-static uint32   rtc_enabled = 0;
-static uint32   rtc_cr = 0;
-static uint32   rtc_se = 0;
-static uint32   rtc_cont = 0;
-
-static uint32   gpt_counter = 0xffffffff;
-static uint32   gpt_reload = 0xffffffff;
-static uint32   gpt_scaler = 0xffff;
-static uint32   gpt_enabled = 0;
-static uint32   gpt_cr = 0;
-static uint32   gpt_se = 0;
-static uint32   gpt_cont = 0;
-
-static uint32   wdog_scaler;
-static uint32   wdog_counter;
-static uint32   wdog_rst_delay;
-static uint32   wdog_rston;
-
-#ifdef MECREV0
-static uint32   gpt_irqon = 1;
-static uint32   rtc_irqon = 1;
-#endif
-
-enum wdog_type {
-    init, disabled, enabled, stopped
-};
-
-static enum wdog_type wdog_status;
-
-/* Memory support variables */
-
-static uint32   mem_ramr_ws;	/* RAM read waitstates */
-static uint32   mem_ramw_ws;	/* RAM write waitstates */
-static uint32   mem_romr_ws;	/* ROM read waitstates */
-static uint32   mem_romw_ws;	/* ROM write waitstates */
-static uint32   mem_ramsz;	/* RAM size */
-static uint32   mem_romsz;	/* RAM size */
-static uint32   mem_banksz;	/* RAM bank size */
-static uint32   mem_accprot;	/* RAM write protection enabled */
-
-/* UART support variables */
-
-static unsigned char Adata, Bdata;
-static int32    fd1, fd2;	/* file descriptor for input file */
-static int32    Ucontrol;	/* UART status register */
-static unsigned char aq[UARTBUF], bq[UARTBUF];
-static int32    res;
-static int32    anum, aind = 0;
-static int32    bnum, bind = 0;
-static char     wbufa[UARTBUF], wbufb[UARTBUF];
-static unsigned wnuma;
-static unsigned wnumb;
-static FILE    *f1 = NULL, *f2 = NULL;
-
-static char     uarta_sreg, uarta_hreg, uartb_sreg, uartb_hreg;
-static uint32   uart_stat_reg;
-static uint32   uarta_data, uartb_data;
-
-void            uarta_tx();
-void            uartb_tx();
-uint32          read_uart();
-void            write_uart();
-uint32          rtc_counter_read();
-void            rtc_scaler_set();
-void            rtc_reload_set();
-uint32          gpt_counter_read();
-void            gpt_scaler_set();
-void            gpt_reload_set();
-void            timer_ctrl();
-void            port_init();
-void            uart_irq_start();
-void            mec_reset();
-void            wdog_start();
-
-
-/* One-time init */
-
-void
-init_sim()
-{
-    port_init();
-}
-
-/* Power-on reset init */
-
-void
-reset()
-{
-    mec_reset();
-    uart_irq_start();
-    wdog_start();
-}
-
-/* IU error mode manager */
-
-int
-error_mode(pc)
-    uint32          pc;
-{
-
-    if ((mec_emr & 0x1) == 0) {
-	if (mec_mcr & 0x20) {
-	    sys_reset();
-	    mec_ersr = 0x8000;
-	    printf("Error manager reset - IU in error mode at 0x%08x\n", pc);
-	}
-    }
-}
-
-/* Check memory settings */
-
-void
-decode_memcfg()
-{
-    mem_ramsz = (256 * 1024) << ((mec_memcfg >> 10) & 7);
-    mem_banksz = ((mec_memcfg >> 10) & 7) + 18 - 6;
-    mem_romsz = (4 * 1024) << ((mec_memcfg >> 18) & 7);
-    if (sis_verbose)
-	printf("RAM size: %d K, ROM size: %d K, protection bank size: %d K\n",
-	       mem_ramsz >> 10, mem_romsz >> 10, 1 << mem_banksz);
-}
-
-void
-decode_wcr()
-{
-    mem_ramr_ws = mec_wcr & 3;
-    mem_ramw_ws = (mec_wcr >> 2) & 3;
-    mem_romr_ws = (mec_wcr >> 4) & 0x0f;
-    mem_romw_ws = (mec_wcr >> 8) & 0x0f;
-    if (sis_verbose)
-	printf("Waitstates = RAM read: %d, RAM write: %d, ROM read: %d, ROM write: %d\n",
-	       mem_ramr_ws, mem_ramw_ws, mem_romr_ws, mem_romw_ws);
-}
-
-void
-decode_mcr()
-{
-    mem_accprot = (mec_mcr >> 3) & 1;
-    if (sis_verbose && mem_accprot)
-	printf("Memory access protection enabled\n");
-    if (sis_verbose && (mec_mcr & 2))
-	printf("Software reset enabled\n");
-    if (sis_verbose && (mec_mcr & 1))
-	printf("Power-down mode enabled\n");
-}
-
-/* Flush ports when simulator stops */
-
-void
-sim_stop()
-{
-#ifdef FAST_UART
-    flush_uart();
-#endif
-}
-
-void
-close_port()
-{
-  if (f1)
-    fclose(f1);
-  if (f2)
-    fclose(f2);
-}
-
-void
-exit_sim()
-{
-    close_port();
-}
-
-void
-mec_reset()
-{
-
-    find = 0;
-    brk_point = 0;
-    watch_point = 0;
-    mec_dbg = 0;
-    mec_sfsr = 0x078;
-    mec_ffar = 0;
-    mec_ipr = 0;
-    mec_imr = 0x3fff;
-    mec_icr = 0;
-    mec_ifr = 0;
-    mec_memcfg = 0x10000;
-    mec_mcr = 0x01b50014;
-    mec_wcr = -1;
-    mec_mar0 = -1;
-    mec_mar1 = -1;
-    mec_ersr = 0;		/* MEC error and status register */
-    mec_emr = 0x60;		/* MEC error mask register */
-    mec_tcr = 0;		/* MEC test comtrol register */
-
-    decode_memcfg();
-    decode_wcr();
-    decode_mcr();
-
-    posted_irq = 0;
-    wnuma = wnumb = 0;
-    anum = aind = bnum = bind = 0;
-
-    uart_stat_reg = UARTA_SRE | UARTA_HRE | UARTB_SRE | UARTB_HRE;
-    uarta_data = uartb_data = UART_THE | UART_TSE;
-
-    rtc_counter = 0xffffffff;
-    rtc_reload = 0xffffffff;
-    rtc_scaler = 0xff;
-    rtc_enabled = 0;
-    rtc_cr = 0;
-    rtc_se = 0;
-    rtc_cont = 0;
-
-    gpt_counter = 0xffffffff;
-    gpt_reload = 0xffffffff;
-    gpt_scaler = 0xffff;
-    gpt_enabled = 0;
-    gpt_cr = 0;
-    gpt_se = 0;
-    gpt_cont = 0;
-
-    wdog_scaler = 255;
-    wdog_rst_delay = 255;
-    wdog_counter = 0xffff;
-    wdog_rston = 0;
-    wdog_status = init;
-
-#ifdef MECREV0
-    gpt_irqon = 1;
-    rtc_irqon = 1;
-#endif
-
-}
-
-
-
-int32
-mec_intack(level)
-    int32           level;
-{
-    int             irq_test;
-
-    if (sis_verbose) 
-	printf("interrupt %d acknowledged\n",level);
-    irq_test = mec_tcr & 0x80000;
-    if ((irq_test) && (mec_ifr & (1 << level)))
-	mec_ifr &= ~(1 << level);
-    else
-	mec_ipr &= ~(1 << level);
-    posted_irq &= ~(1 << level);
-#ifdef MECREV0
-    if (mecrev0) {
-	if (uart_stat_reg & 1)
-	    mec_ipr |= (1 << 4);
-	if (uart_stat_reg & 0x100)
-	    mec_ipr |= (1 << 5);
-    }
-#endif
-}
-
-int32
-chk_irq()
-{
-    int32           i;
-    uint32          itmp;
-
-    itmp = ((mec_ipr | mec_ifr) & ~mec_imr) & 0x0fffe;
-    if (itmp != 0) {
-	for (i = 15; i > 0; i--) {
-	    if (((itmp >> i) & 1) != 0) {
-		if ((posted_irq & (1 << i)) == 0) {
-		    if (sis_verbose) 
-			printf("interrupt %d generated\n",i);
-		    set_int(i, mec_intack, i);
-		    posted_irq |= (1 << i);
-		}
-	    }
-	}
-    }
-}
-
-void
-mec_irq(level)
-    int32           level;
-{
-    mec_ipr |= (1 << level);
-    chk_irq();
-}
-
-void
-set_sfsr(fault, addr, asi, read)
-    uint32          fault;
-    uint32          addr;
-    uint32          asi;
-    uint32          read;
-{
-    mec_ffar = addr;
-    mec_sfsr = (fault << 3) | (!read << 15);
-    switch (asi) {
-    case 8:
-	mec_sfsr |= 0x2002;
-	break;
-    case 9:
-	mec_sfsr |= 0x3002;
-	break;
-    case 0xa:
-	mec_sfsr |= 0x0004;
-	break;
-    case 0xb:
-	mec_sfsr |= 0x1004;
-	break;
-    }
-}
-
-int32
-chk_brk(addr, asi)
-    uint32          addr;
-{
-    if ((mec_dbg & 0x80000) && (addr == brk_point) &&
-	((asi == 9) || (asi == 8))) {
-	mec_dbg |= 0x00800000;
-	if (mec_dbg & 0x00200000) {
-	    set_sfsr(BREAK_EXC, addr, asi, 1);
-	    return (1);
-	}
-    }
-    return (0);
-}
-
-int32
-chk_watch(addr, read, asi)
-    uint32          addr;
-    uint32          read;
-{
-    uint32          hit;
-
-    if ((mec_dbg & 0x40000) && (asi != 9) && (asi != 8) &&
-	(((mec_dbg & 0x10000) && (read == 0)) || ((mec_dbg & 0x20000) && read))) {
-	if (((addr ^ watch_point) &
-	     (0xffff0000 | (mec_dbg & 0x0ffff))) == 0) {
-	    mec_dbg |= 0x00400000;
-	    if (mec_dbg & 0x100000) {
-		set_sfsr(WATCH_EXC, addr, asi, read);
-		return (1);
-	    }
-	}
-    }
-    return (0);
-}
-
-int32
-mec_read(addr, asi, data)
-    uint32          addr;
-    uint32          asi;
-    uint32         *data;
-{
-
-    switch (addr & 0x0ff) {
-
-    case MEC_SFR:
-    case MEC_WDOG:
-	return (1);
-	break;
-    case MEC_DBG:
-	*data = mec_dbg;
-	break;
-    case MEC_UARTA:
-    case MEC_UARTB:
-	if (asi != 0xb)
-	    return (1);
-	*data = read_uart(addr);
-	break;
-
-    case MEC_UART_CTRL:
-
-	*data = read_uart(addr);
-	break;
-
-    case MEC_RTC_COUNTER:
-	*data = rtc_counter_read();
-	break;
-
-    case MEC_GPT_COUNTER:
-	*data = gpt_counter_read();
-	break;
-
-    case MEC_SFSR:
-	*data = mec_sfsr;
-	break;
-
-    case MEC_FFAR:
-	*data = mec_ffar;
-	break;
-
-    case MEC_IPR:
-	*data = mec_ipr;
-	break;
-
-    case MEC_IMR:
-	*data = mec_imr;
-	break;
-
-    case MEC_IFR:
-	*data = mec_ifr;
-	break;
-
-    case SIM_LOAD:
-	fname[find] = 0;
-	if (find == 0)
-	    strcpy(fname, "simload");
-	*data = bfd_load(fname);
-	find = 0;
-	break;
-
-    case MEC_MCR:
-	*data = mec_mcr;
-	break;
-
-    case MEC_MEMCFG:
-	*data = mec_memcfg;
-	break;
-
-    case MEC_WCR:
-	*data = mec_wcr;
-	break;
-
-    case MEC_MAR0:
-	*data = mec_mar0;
-	break;
-
-    case MEC_MAR1:
-	*data = mec_mar1;
-	break;
-
-    case MEC_PWDR:
-	return (1);
-	break;
-
-    default:
-	if (sis_verbose)
-	    printf("Warning, read from unimplemented MEC register %x\n\r", addr);
-	*data = mec_regs[((addr & 0x0ff) >> 2)];
-	break;
-    }
-    return (MOK);
-}
-
-int
-mec_write(addr, data)
-    uint32          addr;
-    uint32          data;
-{
-
-    switch (addr & 0x0ff) {
-
-    case MEC_SFR:
-	if (mec_mcr & 0x2) {
-	    sys_reset();
-	    mec_ersr = 0x4000;
-	    printf(" Software reset issued\n");
-	}
-	break;
-
-    case MEC_BRK:
-	brk_point = data;
-	break;
-
-    case MEC_DBG:
-	mec_dbg = data;
-	break;
-
-    case MEC_WPR:
-	watch_point = data;
-	break;
-
-    case MEC_UARTA:
-    case MEC_UARTB:
-    case MEC_UART_CTRL:
-	write_uart(addr, data);
-	break;
-
-    case MEC_GPT_RELOAD:
-	gpt_reload_set(data);
-	break;
-
-    case MEC_GPT_SCALER:
-	gpt_scaler_set(data);
-	break;
-
-    case MEC_TIMER_CTRL:
-	timer_ctrl(data);
-	break;
-
-    case MEC_RTC_RELOAD:
-	rtc_reload_set(data);
-	break;
-
-    case MEC_RTC_SCALER:
-	rtc_scaler_set(data);
-	break;
-
-    case MEC_SFSR:
-	mec_sfsr = 0;
-	break;
-
-    case MEC_IMR:
-	mec_imr = data & 0x7ffe;
-	chk_irq();
-	break;
-
-    case MEC_ICR:
-	mec_icr &= ~data & 0x0fffe;
-	break;
-
-    case MEC_IFR:
-	mec_ifr = data & 0xfffe;
-	chk_irq();
-	break;
-    case SIM_LOAD:
-	fname[find++] = (char) data;
-	break;
-
-    case MEC_MCR:
-	mec_mcr = data;
-	decode_mcr();
-	break;
-
-    case MEC_MEMCFG:
-	mec_memcfg = data & ~0xC0e08000;
-	decode_memcfg();
-	break;
-
-    case MEC_WCR:
-	mec_wcr = data;
-	decode_wcr();
-	break;
-
-    case MEC_MAR0:
-	mec_mar0 = data;
-	break;
-
-    case MEC_MAR1:
-	mec_mar1 = data;
-	break;
-
-    case MEC_WDOG:
-	wdog_scaler = (data >> 16) & 0x0ff;
-	wdog_counter = data & 0x0ffff;
-	wdog_rst_delay = data >> 24;
-	wdog_rston = 0;
-	if (wdog_status == stopped)
-	    wdog_start();
-	wdog_status = enabled;
-	break;
-
-    case MEC_TRAPD:
-	if (wdog_status == init) {
-	    wdog_status = disabled;
-	    if (sis_verbose)
-		printf("Watchdog disabled\n");
-	}
-	break;
-
-    case MEC_PWDR:
-	if (mec_mcr & 1)
-	    wait_for_irq();
-	break;
-
-    default:
-	if (sis_verbose)
-	    printf("Warning, write to unimplemented MEC register %x\n\r",
-		   addr);
-	mec_regs[((addr & 0x0ffc) >> 2)] = data;
-	break;
-    }
-    return (MOK);
-}
-
-
-/* MEC UARTS */
-
-
-void
-port_init()
-{
-
-    int32           pty_remote = 1;
-
-
-
-    if ((fd1 = open(uart_dev1, O_RDWR | O_NDELAY | O_NONBLOCK)) < 0) {
-	printf("Warning, couldn't open output device %s\n", uart_dev1);
-    } else {
-	printf("serial port A on %s\n", uart_dev1);
-	f1 = fdopen(fd1, "r+");
-	setbuf(f1, NULL);
-    }
-    if ((fd2 = open(uart_dev2, O_RDWR | O_NDELAY | O_NONBLOCK)) < 0) {
-	printf("Warning, couldn't open output device %s\n", uart_dev2);
-    } else {
-	printf("serial port B on %s\n", uart_dev2);
-	f2 = fdopen(fd2, "r+");
-	setbuf(f2, NULL);
-    }
-
-    wnuma = wnumb = 0;
-}
-
-uint32
-read_uart(addr)
-    uint32          addr;
-{
-
-    unsigned        tmp;
-
-    switch (addr & 0xff) {
-
-    case 0xE0:			/* UART 1 */
-#ifdef FAST_UART
-	if (aind < anum) {
-	    if ((aind + 1) < anum)
-		mec_irq(4);
-	    return (0x700 | (uint32) aq[aind++]);
-	} else {
-	  if (f1)
-	    anum = fread(aq, 1, UARTBUF, f1);
-	  else
-	    anum = 0;
-	    if (anum > 0) {
-		aind = 0;
-		if ((aind + 1) < anum)
-		    mec_irq(4);
-		return (0x700 | (uint32) aq[aind++]);
-	    } else {
-		return (0x600 | (uint32) aq[aind]);
-	    }
-
-	}
-#else
-	tmp = uarta_data;
-	uarta_data &= ~UART_DR;
-	uart_stat_reg &= ~UARTA_DR;
-	return tmp;
-#endif
-	break;
-
-    case 0xE4:			/* UART 2 */
-#ifdef FAST_UART
-	if (bind < bnum) {
-	    if ((bind + 1) < bnum)
-		mec_irq(5);
-	    return (0x700 | (uint32) bq[bind++]);
-	} else {
-	  if (f2)
-	    bnum = fread(bq, 1, UARTBUF, f2);
-	  else
-	    bnum = 0;
-	    if (bnum > 0) {
-		bind = 0;
-		if ((bind + 1) < bnum)
-		    mec_irq(5);
-		return (0x700 | (uint32) bq[bind++]);
-	    } else {
-		return (0x600 | (uint32) bq[bind]);
-	    }
-
-	}
-#else
-	tmp = uartb_data;
-	uartb_data &= ~UART_DR;
-	uart_stat_reg &= ~UARTB_DR;
-	return tmp;
-#endif
-	break;
-
-    case 0xE8:			/* UART status register	 */
-#ifdef FAST_UART
-	Ucontrol = 0;
-	if (aind < anum) {
-	    Ucontrol |= 0x00000001;
-	} else {
-	  if (f1)
-	    anum = fread(aq, 1, UARTBUF, f1);
-	  else
-	    anum = 0;
-	    if (anum > 0) {
-		Ucontrol |= 0x00000001;
-		aind = 0;
-		mec_irq(4);
-	    }
-	}
-	if (bind < bnum) {
-	    Ucontrol |= 0x00010000;
-	} else {
-	  if (f2)
-	    bnum = fread(bq, 1, UARTBUF, f2);
-	  else
-	    bnum = 0;
-	    if (bnum > 0) {
-		Ucontrol |= 0x00010000;
-		bind = 0;
-		mec_irq(5);
-	    }
-	}
-
-	Ucontrol |= 0x00060006;
-	return (Ucontrol);
-#else
-	return (uart_stat_reg);
-#endif
-	break;
-    default:
-	if (sis_verbose)
-	    printf("Read from unimplemented MEC register (%x)\n", addr);
-
-    }
-    return (0);
-}
-
-void
-write_uart(addr, data)
-    uint32          addr;
-    uint32          data;
-{
-
-    int32           wnum = 0;
-    unsigned char   c;
-
-    c = (unsigned char) data;
-    switch (addr & 0xff) {
-
-    case 0xE0:			/* UART A */
-#ifdef FAST_UART
-	if (wnuma < UARTBUF)
-	    wbufa[wnuma++] = c;
-	else {
-	    while (wnuma)
-	      if (f1)
-		wnuma -= fwrite(wbufa, 1, wnuma, f1);
-	      else
-		wnuma--;
-	    wbufa[wnuma++] = c;
-	}
-	mec_irq(4);
-#else
-	if (uart_stat_reg & UARTA_SRE) {
-	    uarta_sreg = c;
-	    uart_stat_reg &= ~UARTA_SRE;
-	    event(uarta_tx, 0, UART_TX_TIME);
-	} else {
-	    uarta_hreg = c;
-	    uart_stat_reg &= ~UARTA_HRE;
-	}
-#endif
-	break;
-
-    case 0xE4:			/* UART B */
-#ifdef FAST_UART
-	if (wnumb < UARTBUF)
-	    wbufb[wnumb++] = c;
-	else {
-	    while (wnumb)
-	      if (f2)
-		wnumb -= fwrite(wbufb, 1, wnumb, f2);
-	      else
-		wnumb--;
-	    wbufb[wnumb++] = c;
-	}
-	mec_irq(5);
-#else
-	if (uart_stat_reg & UARTB_SRE) {
-	    uartb_sreg = c;
-	    uart_stat_reg &= ~UARTB_SRE;
-	    event(uartb_tx, 0, UART_TX_TIME);
-	} else {
-	    uartb_hreg = c;
-	    uart_stat_reg &= ~UARTB_HRE;
-	}
-#endif
-	break;
-    case 0xE8:			/* UART status register */
-#ifndef FAST_UART
-	if (data & UARTA_CLR) {
-	    uart_stat_reg &= 0xFFFF0000;
-	    uart_stat_reg |= UARTA_SRE | UARTA_HRE;
-	}
-	if (data & UARTB_CLR) {
-	    uart_stat_reg &= 0x0000FFFF;
-	    uart_stat_reg |= UARTB_SRE | UARTB_HRE;
-	}
-#endif
-	break;
-    default:
-	if (sis_verbose)
-	    printf("Write to unimplemented MEC register (%x)\n", addr);
-
-    }
-}
-
-flush_uart()
-{
-    while (wnuma)
-      if (f1)
-	wnuma -= fwrite(wbufa, 1, wnuma, f1);
-      else
-	wnuma = 0;
-    while (wnumb)
-      if (f2)
-	wnumb -= fwrite(wbufb, 1, wnumb, f2);
-      else
-	wnumb = 0;
-}
-
-
-
-void 
-uarta_tx()
-{
-
-    while ((f1 ? fwrite(&uarta_sreg, 1, 1, f1) : 1) != 1);
-    if (uart_stat_reg & UARTA_HRE) {
-	uart_stat_reg |= UARTA_SRE;
-    } else {
-	uarta_sreg = uarta_hreg;
-	uart_stat_reg |= UARTA_HRE;
-	event(uarta_tx, 0, UART_TX_TIME);
-    }
-    mec_irq(4);
-}
-
-void 
-uartb_tx()
-{
-    while (fwrite(&uartb_sreg, 1, 1, f2) != 1);
-    if (uart_stat_reg & UARTB_HRE) {
-	uart_stat_reg |= UARTB_SRE;
-    } else {
-	uartb_sreg = uartb_hreg;
-	uart_stat_reg |= UARTB_HRE;
-	event(uartb_tx, 0, UART_TX_TIME);
-    }
-    mec_irq(5);
-}
-
-void
-uart_rx(arg)
-    caddr_t         arg;
-{
-    int32           rsize;
-    char            rxd;
-
-    rsize = fread(&rxd, 1, 1, f1);
-    if (rsize) {
-	uarta_data = UART_DR | rxd;
-	if (uart_stat_reg & UARTA_HRE)
-	    uarta_data |= UART_THE;
-	if (uart_stat_reg & UARTA_SRE)
-	    uarta_data |= UART_TSE;
-	if (uart_stat_reg & UARTA_DR) {
-	    uart_stat_reg |= UARTA_OR;
-	    mec_irq(7);		/* UART error interrupt */
-	}
-	uart_stat_reg |= UARTA_DR;
-	mec_irq(4);
-    }
-    rsize = fread(&rxd, 1, 1, f2);
-    if (rsize) {
-	uartb_data = UART_DR | rxd;
-	if (uart_stat_reg & UARTB_HRE)
-	    uartb_data |= UART_THE;
-	if (uart_stat_reg & UARTB_SRE)
-	    uartb_data |= UART_TSE;
-	if (uart_stat_reg & UARTB_DR) {
-	    uart_stat_reg |= UARTB_OR;
-	    mec_irq(7);		/* UART error interrupt */
-	}
-	uart_stat_reg |= UARTB_DR;
-	mec_irq(5);
-    }
-    event(uart_rx, 0, UART_RX_TIME);
-}
-
-void
-uart_intr(arg)
-    caddr_t         arg;
-{
-    read_uart(0xE8);		/* Check for UART interrupts every 1000 clk */
-    flush_uart();		/* Flush UART ports      */
-    event(uart_intr, 0, UART_FLUSH_TIME);
-}
-
-
-void
-uart_irq_start()
-{
-#ifdef FAST_UART
-    event(uart_intr, 0, UART_FLUSH_TIME);
-#else
-    event(uart_rx, 0, UART_RX_TIME);
-#endif
-}
-
-/* Watch-dog */
-
-void
-wdog_intr(arg)
-    caddr_t         arg;
-{
-    if (wdog_status == disabled) {
-	wdog_status = stopped;
-    } else {
-
-	if (wdog_counter) {
-	    wdog_counter--;
-	    event(wdog_intr, 0, wdog_scaler + 1);
-	} else {
-	    if (wdog_rston) {
-		printf("Watchdog reset!\n");
-		sys_reset();
-		mec_ersr = 0xC000;
-	    } else {
-		mec_irq(15);
-		wdog_rston = 1;
-		wdog_counter = wdog_rst_delay;
-		event(wdog_intr, 0, wdog_scaler + 1);
-	    }
-	}
-    }
-}
-
-void
-wdog_start()
-{
-    event(wdog_intr, 0, wdog_scaler + 1);
-    if (sis_verbose)
-	printf("Watchdog started, scaler = %d, counter = %d\n",
-	       wdog_scaler, wdog_counter);
-}
-
-
-/* MEC timers */
-
-
-void
-rtc_intr(arg)
-    caddr_t         arg;
-{
-    if (rtc_counter == 0) {
-#ifdef MECREV0
-	if (mecrev0) {
-	    if (rtc_cr) {
-		rtc_counter = rtc_reload;
-		mec_irq(13);
-	    } else {
-		rtc_cont = 0;
-		if (rtc_irqon) {
-		    mec_irq(13);
-		    rtc_irqon = 0;
-		} else {
-		    if (sis_verbose)
-			printf("RTC interrupt lost (MEC rev.0)\n");
-		}
-	    }
-	} else {
-	    mec_irq(13);
-	    if (rtc_cr)
-		rtc_counter = rtc_reload;
-	    else
-		rtc_cont = 0;
-	}
-
-#else
-
-	mec_irq(13);
-	if (rtc_cr)
-	    rtc_counter = rtc_reload;
-	else
-	    rtc_cont = 0;
-#endif
-
-    } else
-	rtc_counter -= 1;
-    if (rtc_se && rtc_cont) {
-	event(rtc_intr, 0, rtc_scaler + 1);
-	rtc_enabled = 1;
-    } else {
-	if (sis_verbose)
-	    printf("RTC stopped\n\r");
-	rtc_enabled = 0;
-    }
-}
-
-void
-rtc_start()
-{
-    if (sis_verbose)
-	printf("RTC started (period %d)\n\r", rtc_scaler + 1);
-    event(rtc_intr, 0, rtc_scaler + 1);
-    rtc_enabled = 1;
-}
-
-uint32
-rtc_counter_read()
-{
-    return (rtc_counter);
-}
-
-void
-rtc_scaler_set(val)
-    uint32          val;
-{
-    rtc_scaler = val & 0x0ff;	/* eight-bit scaler only */
-}
-
-void
-rtc_reload_set(val)
-    uint32          val;
-{
-    rtc_reload = val;
-}
-
-void
-gpt_intr(arg)
-    caddr_t         arg;
-{
-    if (gpt_counter == 0) {
-#ifdef MECREV0
-	if (mecrev0) {
-	    if (gpt_cr) {
-		gpt_counter = gpt_reload;
-		mec_irq(12);
-	    } else {
-		gpt_cont = 0;
-		if (gpt_irqon) {
-		    mec_irq(12);
-		    gpt_irqon = 0;
-		} else {
-		    if (sis_verbose)
-			printf("GPT interrupt lost (MEC rev.0)\n");
-		}
-	    }
-	} else {
-	    mec_irq(12);
-	    if (gpt_cr)
-		gpt_counter = gpt_reload;
-	    else
-		gpt_cont = 0;
-	}
-
-#else
-	mec_irq(12);
-	if (gpt_cr)
-	    gpt_counter = gpt_reload;
-	else
-	    gpt_cont = 0;
-#endif
-    } else
-	gpt_counter -= 1;
-    if (gpt_se && gpt_cont) {
-	event(gpt_intr, 0, gpt_scaler + 1);
-	gpt_enabled = 1;
-    } else {
-	if (sis_verbose)
-	    printf("GPT stopped\n\r");
-	gpt_enabled = 0;
-    }
-}
-
-void
-gpt_start()
-{
-    if (sis_verbose)
-	printf("GPT started (period %d)\n\r", gpt_scaler + 1);
-    event(gpt_intr, 0, gpt_scaler + 1);
-    gpt_enabled = 1;
-}
-
-uint32
-gpt_counter_read()
-{
-    return (gpt_counter);
-}
-
-void
-gpt_scaler_set(val)
-    uint32          val;
-{
-    gpt_scaler = val & 0x0ffff;	/* 16-bit scaler */
-}
-
-void
-gpt_reload_set(val)
-    uint32          val;
-{
-    gpt_reload = val;
-}
-
-void
-timer_ctrl(val)
-    uint32          val;
-{
-
-#ifdef MECREV0
-    if ((mecrev0) && (val & 0x500))
-	rtc_irqon = 1;
-#endif
-
-    rtc_cr = ((val & TCR_TCRCR) != 0);
-    if (val & TCR_TCRCL) {
-	rtc_counter = rtc_reload;
-	rtc_cont = 1;
-    }
-    if (val & TCR_TCRSL) {
-	rtc_cont = 1;
-    }
-    rtc_se = ((val & TCR_TCRSE) != 0);
-    if (rtc_cont && rtc_se && (rtc_enabled == 0))
-	rtc_start();
-
-#ifdef MECREV0
-    if ((mecrev0) && (val & 0x5))
-	gpt_irqon = 1;
-#endif
-
-    gpt_cr = (val & TCR_GACR);
-    if (val & TCR_GACL) {
-	gpt_counter = gpt_reload;
-	gpt_cont = 1;
-    }
-    if (val & TCR_GACL) {
-	gpt_cont = 1;
-    }
-    gpt_se = (val & TCR_GASE) >> 2;
-    if (gpt_cont && gpt_se && (gpt_enabled == 0))
-	gpt_start();
-}
-
-
-/* Memory emulation */
-
-/* ROM size 512 Kbyte */
-#define ROM_SZ	 	0x080000
-
-/* RAM size 4 Mbyte */
-#define RAM_START 	0x02000000
-#define RAM_END 	0x02400000
-#define RAM_MASK 	0x003fffff
-
-/* MEC registers */
-#define MEC_START 	0x01f80000
-#define MEC_END 	0x01f80100
-
-/* Memory exception waitstates */
-#define MEM_EX_WS 	1
-
-/* ERC32 always adds one waitstate during ldd/std */
-#define LDD_WS 1
-#define STD_WS 1
-
-extern int32    sis_verbose;
-
-static uint32   romb[ROM_SZ / 4];
-static uint32   ramb[(RAM_END - RAM_START) / 4];
-
-int
-memory_read(asi, addr, data, ws)
-    int32           asi;
-    uint32          addr;
-    uint32         *data;
-    int32          *ws;
-{
-    int32           mexc;
-    uint32         *mem;
-
-#ifdef MECBRK
-
-    if (mec_dbg & 0x80000) {
-	if (chk_brk(addr, asi)) {
-	    *ws = MEM_EX_WS;
-	    return (1);
-	}
-    }
-    if (mec_dbg & 0x40000) {
-	if (chk_watch(addr, 1, asi)) {
-	    *ws = MEM_EX_WS;
-	    return (1);
-	}
-    }
-#endif
-
-    if (addr < mem_romsz) {
-	*data = romb[addr >> 2];
-	*ws = mem_romr_ws;
-	return (0);
-    } else if ((addr >= RAM_START) && (addr < (RAM_START + mem_ramsz))) {
-	*data = ramb[(addr & RAM_MASK) >> 2];
-	*ws = mem_ramr_ws;
-	return (0);
-    } else if ((addr >= MEC_START) && (addr < MEC_END)) {
-	mexc = mec_read(addr, asi, data);
-	if (mexc) {
-	    set_sfsr(MEC_ACC, addr, asi, 1);
-	    *ws = MEM_EX_WS;
-	} else {
-	    *ws = 0;
-	}
-	return (mexc);
-    }
-    printf("Memory exception at %x (illegal address)\n", addr);
-    set_sfsr(UIMP_ACC, addr, asi, 1);
-    *ws = MEM_EX_WS;
-    return (1);
-}
-
-int
-memory_write(asi, addr, data, sz, ws)
-    int32           asi;
-    uint32          addr;
-    uint32         *data;
-    int32           sz;
-    int32          *ws;
-{
-    uint32          byte_addr;
-    uint32          byte_mask;
-    uint32          waddr;
-    uint32          bank;
-    int32           mexc;
-
-#ifdef MECBRK
-    if (mec_dbg & 0x40000) {
-	if (chk_watch(addr, 0, asi)) {
-	    *ws = MEM_EX_WS;
-	    return (1);
-	}
-    }
-#endif
-
-    if ((addr >= RAM_START) && (addr < (RAM_START + mem_ramsz))) {
-	if (mem_accprot) {
-	    bank = (addr & RAM_MASK) >> mem_banksz;
-	    if (bank < 32
-		? !((1 << bank) & mec_mar0)
-		: !((1 << (bank - 32) & mec_mar1))) {
-		printf("Memory access protection error at %x\n", addr);
-		set_sfsr(PROT_EXC, addr, asi, 0);
-		*ws = MEM_EX_WS;
-		return (1);
-	    }
-	}
-	*ws = mem_ramw_ws;
-	waddr = (addr & RAM_MASK) >> 2;
-	switch (sz) {
-	case 0:
-	    byte_addr = addr & 3;
-	    byte_mask = 0x0ff << (24 - (8 * byte_addr));
-	    ramb[waddr] = (ramb[waddr] & ~byte_mask)
-		| ((*data & 0x0ff) << (24 - (8 * byte_addr)));
-	    break;
-	case 1:
-	    byte_addr = (addr & 2) >> 1;
-	    byte_mask = 0x0ffff << (16 - (16 * byte_addr));
-	    ramb[waddr] = (ramb[waddr] & ~byte_mask)
-		| ((*data & 0x0ffff) << (16 - (16 * byte_addr)));
-	    break;
-	case 2:
-	    ramb[waddr] = *data;
-	    break;
-	case 3:
-	    ramb[waddr] = data[0];
-	    ramb[waddr + 1] = data[1];
-	    *ws += mem_ramw_ws + STD_WS;
-	    break;
-	}
-	return (0);
-    } else if ((addr >= MEC_START) && (addr < MEC_END)) {
-	if ((sz != 2) || (asi != 0xb)) {
-	    set_sfsr(MEC_ACC, addr, asi, 0);
-	    *ws = MEM_EX_WS;
-	    return (1);
-	}
-	mexc = mec_write(addr, *data);
-	if (mexc) {
-	    set_sfsr(MEC_ACC, addr, asi, 0);
-	    *ws = MEM_EX_WS;
-	} else {
-	    *ws = 0;
-	}
-	return (mexc);
-
-    }
-    *ws = MEM_EX_WS;
-    set_sfsr(UIMP_ACC, addr, asi, 0);
-    return (1);
-}
-
-unsigned char  *
-get_mem_ptr(addr, size)
-    uint32          addr;
-    uint32          size;
-{
-    char           *bram, *brom;
-
-    brom = (char *) romb;
-    bram = (char *) ramb;
-    if ((addr + size) < ROM_SZ) {
-	return (&brom[addr]);
-    } else if ((addr >= RAM_START) && ((addr + size) < RAM_END)) {
-	return (&bram[(addr & RAM_MASK)]);
-    }
-    return ((char *) -1);
-}
-
-int
-sis_memory_write(addr, data, length)
-    uint32          addr;
-    char           *data;
-    uint32          length;
-{
-    char           *mem;
-    uint32          i;
-
-    if ((mem = get_mem_ptr(addr, length)) == ((char *) -1))
-	return (0);
-#ifdef HOST_LITTLE_ENDIAN
-    for (i = 0; i < length; i++) {
-	mem[i ^ 0x3] = data[i];
-    }
-#else
-    memcpy(mem, data, length);
-#endif
-    return (length);
-}
-
-int
-sis_memory_read(addr, data, length)
-    uint32          addr;
-    char           *data;
-    uint32          length;
-{
-    char           *mem;
-    int		i;
-
-    if ((mem = get_mem_ptr(addr, length)) == ((char *) -1))
-	return (0);
-
-#ifdef HOST_LITTLE_ENDIAN
-    for (i = 0; i < length; i++) {
-	data[i] = mem[i ^ 0x3];
-    }
-#else
-    memcpy(data, mem, length);
-#endif
-    return (length);
-}
diff --git a/sim/erc32/examples/__main.c b/sim/erc32/examples/__main.c
deleted file mode 100644
index 73c52cd..0000000
--- a/sim/erc32/examples/__main.c
+++ /dev/null
@@ -1,4 +0,0 @@
-/* Dummy __main for gccx compiled programs */
-
-__main()
-{}
diff --git a/sim/erc32/examples/clock.c b/sim/erc32/examples/clock.c
deleted file mode 100644
index ec23037..0000000
--- a/sim/erc32/examples/clock.c
+++ /dev/null
@@ -1,8 +0,0 @@
-
-int clock()
-{
-	volatile int *t_addr;
-
-	t_addr = (volatile int * ) 0x01F80080;	/* Real-time clock address */
-	return(*t_addr);
-}
diff --git a/sim/erc32/examples/gccx b/sim/erc32/examples/gccx
deleted file mode 100755
index 5fec6ec..0000000
--- a/sim/erc32/examples/gccx
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-sparclite-aout-gcc -g \
--Xlinker -Bstatic -Xlinker -N -Xlinker -Ttext -Xlinker 0 \
--Xlinker -Tdata -Xlinker 02000000 -Xlinker -e -Xlinker _trap_table -Xlinker -X \
--o $1:r -nostartfiles -nostdlib \
-srt0.S __main.c $* 
-size $1:r
diff --git a/sim/erc32/examples/hello.c b/sim/erc32/examples/hello.c
deleted file mode 100644
index 02903cf..0000000
--- a/sim/erc32/examples/hello.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/* A small test program to demonstrate use of UARTs and clock */
-
-
-#define RXADATA (int *) 0x01F800E0
-#define RXBDATA (int *) 0x01F800E4
-#define RXSTAT (int *) 0x01F800E8
-
-int write (fd, buf, nbyte)
-int fd;
-char *buf;
-int nbyte;
-{
-
-        int *rxadata;
-        int rxmask;
-	int nsave;
-	volatile *rxstat;
-
-	nsave = nbyte;
-
-	switch (fd) {
-		case 0 : 
-			rxadata = RXADATA;
-			rxmask = 6;
-			break;
-		case 1 : 
-			rxadata = RXBDATA;
-			rxmask = 0x60000;
-			break;
-		default:
-			return (-1);
-	}
-	rxstat = RXSTAT;
-        while (nbyte > 0) {
-		while ((*rxstat & rxmask) == 0);
-		*rxadata = *buf;
-		buf++;
-		nbyte--;
-	}
-	return (nsave);
-}
-
-int read (fd, buf, nbyte)
-int fd;
-char *buf;
-int nbyte;
-{
-
-        int rxmask,*rxadata;
-	int nsave;
-	volatile *rxstat;
-
-	nsave = nbyte;
-	switch (fd) {
-		case 0 : 
-			rxadata = RXADATA;
-			rxmask = 1;
-			break;
-		case 1 : 
-			rxadata = RXBDATA;
-			rxmask = 0x10000;
-			break;
-		default:
-			return (-1);
-	}
-	rxstat = RXSTAT;
-        while (nbyte > 0) {
-		while ((*rxstat & rxmask) == 0);
-		*buf =  *rxadata;
-		buf++;
-                nbyte--;
-	}
-	return (nsave);
-}
-
-char *
-puts(s)
-char *s;
-{
-    while (*s) write(0,s++,1);
-}
-
-main()
-{
-    puts("Hello world!\n");
-}
-
diff --git a/sim/erc32/examples/srt0.S b/sim/erc32/examples/srt0.S
deleted file mode 100755
index 1e68951..0000000
--- a/sim/erc32/examples/srt0.S
+++ /dev/null
@@ -1,449 +0,0 @@
-/*
- * srt0.s for ERC32. This file is part of ERC32SIM.
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- */
- 
-/* The traptable has to be the first code in a boot PROM. */
-
-/* Entry for traps which jump to a programmer-specified trap handler.  */
-#define TRAP(H)  mov %psr, %l0; sethi %hi(H), %l4; jmp %l4+%lo(H); nop;
-
-/* Unexcpected trap will halt the processor by forcing it to error state */
-#define BAD_TRAP ta 0; nop; nop; nop;
-
-/* Software trap. Treat as BAD_TRAP for the time being... */
-#define SOFT_TRAP BAD_TRAP
-
-#define PSR_INIT   0x10c0	/* Disable traps, set s and ps */
-#define WIM_INIT   2
-#define SP_INIT	   0x02100000
-
-WINDOWSIZE = (16 * 4)
-ARGPUSHSIZE = (6 * 4)
-ARGPUSH = (WINDOWSIZE + 4)
-MINFRAME = (WINDOWSIZE + ARGPUSHSIZE + 4)
-#define STACK_ALIGN	8
-#define SA(X)	(((X)+(STACK_ALIGN-1)) & ~(STACK_ALIGN-1))
-
-  .seg    "text"
-  .global _trap_table, _mecini, start
-
-  /* Hardware traps */
-_trap_table:
-  TRAP(_mecini);			! 00 reset trap 
-  BAD_TRAP;			! 01 instruction_access_exception
-  BAD_TRAP;			! 02 illegal_instruction
-  BAD_TRAP;			! 03 priveleged_instruction
-  BAD_TRAP;			! 04 fp_disabled
-  TRAP(_window_overflow);	! 05 window_overflow
-  TRAP(_window_underflow);	! 06 window_underflow
-  BAD_TRAP;			! 07 memory_address_not_aligned
-  BAD_TRAP;			! 08 fp_exception
-  BAD_TRAP;			! 09 data_access_exception
-  BAD_TRAP;			! 0A tag_overflow
-
-  /* Trap levels from 0B to 0x10 are not defined (used for MEC init) */
-
-_mecini:
-  sethi		%hi(0x01f80000), %g1	! 0B
-  sethi		%hi(0x001C1000), %g2
-  or 		%g1,%lo(0x001C1000),%g1
-  st		%g2, [%g1 + 0x10]
-
-  st		%g0, [%g1 + 0x18]	! 0C
-  nop
-  nop
-  nop
-
-  TRAP(_hardreset);			! 0D
-
-  BAD_TRAP;			! 0E undefined
-  BAD_TRAP;			! 0F undefined
-  BAD_TRAP;			! 10 undefined
-
-  /* Interrupt entries */
-  BAD_TRAP;			! 11 interrupt level 1
-  BAD_TRAP;			! 12 interrupt level 2
-  BAD_TRAP;			! 13 interrupt level 3
-  BAD_TRAP;			! 14 interrupt level 4
-  BAD_TRAP;			! 15 interrupt level 5
-  BAD_TRAP;			! 16 interrupt level 6
-  BAD_TRAP;			! 17 interrupt level 7
-  BAD_TRAP;			! 18 interrupt level 8
-  BAD_TRAP;			! 19 interrupt level 9
-  BAD_TRAP;			! 1A interrupt level 1
-  BAD_TRAP;			! 1B interrupt level 11
-  BAD_TRAP;			! 1C interrupt level 12
-  BAD_TRAP;			! 1D interrupt level 13
-  BAD_TRAP;			! 1E interrupt level 14
-  BAD_TRAP;			! 1F interrupt level 15
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 20 - 23 undefined
-  BAD_TRAP;					! 24 cp_disabled
-	    BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 25 - 27 undefined
-  BAD_TRAP;					! 28 cp_exception
-	    BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 29 - 2B undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 2C - 2F undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 30 - 33 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 34 - 37 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 38 - 3B undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 3C - 3F undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 40 - 43 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 44 - 47 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 48 - 4B undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 4C - 4F undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 50 - 53 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 54 - 57 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 58 - 5B undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 5C - 5F undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 60 - 63 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 64 - 67 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 68 - 6B undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 6C - 6F undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 70 - 73 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 74 - 77 undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 78 - 7B undefined
-  BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP;	! 7C - 7F undefined
-
-  /* Software traps */
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; 		! 80 - 82
-  TRAP(_flush_windows)				! 83
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 84 - 87
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 88 - 8B
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 8C - 8F
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 90 - 93
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 94 - 97
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 98 - 9B
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! 9C - 9F
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! A0 - A3
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! A4 - A7
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! A8 - AB
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! AC - AF
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! B0 - B3
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! B4 - B7
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! B8 - BB
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! BC - BF
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! C0 - C3
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! C4 - C7
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! C8 - CB
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! CC - CF
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! D0 - D3
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! D4 - D7
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! D8 - DB
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! DC - DF
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! E0 - E3
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! E4 - E7
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! E8 - EB
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! EC - EF
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! F0 - F3
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! F4 - F7
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! F8 - FB 
-  SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP;	! FC - FF
-
-
-!
-! Startup code for standalone system. Wash IU and FPU (if present) registers.
-! The registers have to be written to initiate the parity bits.
-!
-
-_hardreset:
-
-        sethi %hi(0x01FE0),%o0
-        or %o0,%lo(0x01FE0),%o0
-	wr	%o0, %psr		! Set valid PSR
-	nop
-
-	wr	%g0, %wim 		! Set window invalid mask register
-	wr	%g0, %y 		! Init Y-register
-	nop
-	set	_hardreset, %g1
-
-	wr	%g1, %tbr 		! Set TBR
-	sethi %hi(SP_INIT),%sp
-	or	%g0, 1, %o0
-	ld	[%g0], %f0		! Check if FPU is present
-
-	tst	%o0
-	bz	fixiu
-	nop
-	ba      fixfpu
-
-! FPU disabled trap address
-
-	clr	%i0
-	jmpl	%l2, %g0
-	rett	%l2 + 4
-	nop
-	
-
-! Wash register files (fix for 90C601E & 90C602E)
-
-fixfpu:
-
-	ld	[%g0], %f0
-	ld	[%g0], %f1
-	ld	[%g0], %f2
-	ld	[%g0], %f3
-	ld	[%g0], %f4
-	ld	[%g0], %f5
-	ld	[%g0], %f6
-	ld	[%g0], %f7
-	ld	[%g0], %f8
-	ld	[%g0], %f9
-	ld	[%g0], %f10
-	ld	[%g0], %f11
-	ld	[%g0], %f12
-	ld	[%g0], %f13
-	ld	[%g0], %f14
-	ld	[%g0], %f15
-	ld	[%g0], %f16
-	ld	[%g0], %f17
-	ld	[%g0], %f18
-	ld	[%g0], %f19
-	ld	[%g0], %f20
-	ld	[%g0], %f21
-	ld	[%g0], %f22
-	ld	[%g0], %f23
-	ld	[%g0], %f24
-	ld	[%g0], %f25
-	ld	[%g0], %f26
-	ld	[%g0], %f27
-	ld	[%g0], %f28
-	ld	[%g0], %f29
-	ld	[%g0], %f30
-	ld	[%g0], %f31
-
-fixiu:
-	clr	%g1
-	clr	%g2
-	clr	%g3
-	clr	%g4
-	clr	%g5
-	clr	%g6
-	clr	%g7
-	set	8,%g1
-wl0:
-	clr	%i0
-	clr	%i1
-	clr	%i2
-	clr	%i3
-	clr	%i4
-	clr	%i5
-	clr	%i6
-	clr	%i7
-	clr	%l0
-	clr	%l1
-	clr	%l2
-	clr	%l3
-	clr	%l4
-	clr	%l5
-	clr	%l6
-	clr	%l7
-	save
-	subcc	%g1, 1, %g1
-	bne	wl0
-	nop
-
-!
-! Start the real-time clock with a tick of 150 clocks
-!
-
-rtc:
-
-	set 	0x1f80000, %l0		! MEC register base
-	set 	149, %l1
-	st	%l1, [%l0 + 0x84]	! RTC scaler = 149
-	set	0x0d00, %l1
-	st	%l1, [%l0 + 0x98]	! Start RTC
-
-	st	%g0, [%l0 + 0x64]	! Disable watchdog for now
-	ld	[%l0], %g1
-	or	%g1, 1, %g1
-	st	%g1, [%l0]		! Enable power-down mode
-
-! Initialise some registers
-
-_init:
-        set     PSR_INIT, %g1		! Initialize psr
-        wr      %g1, %psr
-        set     WIM_INIT, %g1       	! Initialize WIM
-        wr      %g1, %wim               
-        set     _trap_table, %g1       	! Initialize TBR
-        wr      %g1, %tbr
-        nop;nop;nop                     
-
-        set     PSR_INIT, %g1
-        wr      %g1, 0x20, %psr		! enable traps
-        nop; nop; nop;
-        set     0x02100000, %sp         ! Set stack pointer
-        mov     %sp, %fp
-        nop
-
-start:
-        /* clear the bss */
- 
-        sethi %hi(_edata),%g2
-        or    %g2,%lo(_edata),%g2  ! g2 = start of bss
-        sethi %hi(_end),%g3
-        or    %g3,%lo(_end),%g3         ! g3 = end of bss
-        mov   %g0,%g1                   ! so std has two zeros
-zerobss:
-        std    %g0,[%g2]
-        add    %g2,8,%g2
-        cmp    %g2,%g3
-        bleu,a zerobss
-        nop
-
-        /* move data segment to proper location */
- 
-relocd:
-        set (_etext),%g2 		! g2 = start of data in aout file
-        set (_environ),%g4		! g4 = start of where data should go
-        set (_edata),%g3 		! g3 = end of where data should go
-	subcc	%g3, %g4, %g5		! g5 = length of data
-
-	subcc	%g4, %g2, %g0		! need to relocate data ?
-	ble	initok
-mvdata:
-	subcc	%g5, 8, %g5
-	ldd	[%g2 + %g5], %g6
-	bg	mvdata
-        std    	%g6, [%g4 + %g5]
-
-initok:
-
-        call    _main
-        sub     %sp, 0x40, %sp  	! room for main to save args
-        nop
-
-	ta 	0			! Halt if _main would return ...
-	nop
-
-
-
-/* Number of register windows */
-#define NWINDOWS 	8
-
-  	 		!Window overflow trap handler.
-  	.global _window_overflow
-
-_window_overflow:
-
-  	mov  %wim, %l3       		! Calculate next WIM
-  	mov  %g1, %l7           
-  	srl  %l3, 1, %g1        
-  	sll  %l3, NWINDOWS-1 , %l4
-  	or   %l4, %g1, %g1
-
-  	save                              ! Get into window to be saved.
-  	mov  %g1, %wim
-  	nop; nop; nop
-        st   %l0, [%sp + 0];
-        st   %l1, [%sp + 4];
-        st   %l2, [%sp + 8];
-        st   %l3, [%sp + 12];
-        st   %l4, [%sp + 16]; 
-        st   %l5, [%sp + 20];
-        st   %l6, [%sp + 24]; 
-        st   %l7, [%sp + 28]; 
-        st   %i0, [%sp + 32]; 
-        st   %i1, [%sp + 36]; 
-        st   %i2, [%sp + 40]; 
-        st   %i3, [%sp + 44]; 
-        st   %i4, [%sp + 48]; 
-        st   %i5, [%sp + 52]; 
-        st   %i6, [%sp + 56]; 
-        st   %i7, [%sp + 60];
-  	restore				! Go back to trap window.
-  	mov  %l7, %g1
-  	jmp  %l1			! Re-execute save.
-  	rett %l2
-
-  /* Window underflow trap handler.  */
-
-  	.global  _window_underflow
-
-_window_underflow:
-
-	mov  %wim, %l3			! Calculate next WIM
-	sll  %l3, 1, %l4
-  	srl  %l3, NWINDOWS-1, %l5
-  	or   %l5, %l4, %l5
-  	mov  %l5, %wim
-  	nop; nop; nop
-  	restore				! Two restores to get into the
-  	restore				! window to restore
-        ld   [%sp + 0], %l0; 		! Restore window from the stack
-        ld   [%sp + 4], %l1; 
-        ld   [%sp + 8], %l2; 
-        ld   [%sp + 12], %l3; 
-        ld   [%sp + 16], %l4; 
-        ld   [%sp + 20], %l5; 
-        ld   [%sp + 24], %l6; 
-        ld   [%sp + 28], %l7; 
-        ld   [%sp + 32], %i0; 
-        ld   [%sp + 36], %i1; 
-        ld   [%sp + 40], %i2; 
-        ld   [%sp + 44], %i3; 
-        ld   [%sp + 48], %i4; 
-        ld   [%sp + 52], %i5; 
-        ld   [%sp + 56], %i6; 
-        ld   [%sp + 60], %i7;
-  	save				! Get back to the trap window.
-  	save
-  	jmp  %l1			! Re-execute restore.
-  	rett  %l2
-
-	.global	_flush_windows	
-_flush_windows:		
-
-	mov	%psr, %g1
-	or	%g1, 0x0f00, %g2
-	restore				! enter previous frame (cannot trap)
-        wr      %g2, 0x20, %psr		! enable traps, disable interrupts
-	nop; nop; nop
-	save				! 6 save to flush all windows
-	save
-	save
-	save
-	save
-	save
-	restore				! 5 restore to enter trapped frame
-	restore
-	restore
-	restore
-	restore
-	wr      %g1, %psr		! restore %psr
-	nop; nop; nop
-  	jmp  %l2			! Jump to nPC
-  	rett  %l2 + 4
-
-
-
-
-        .seg    "data"
-        .global .bdata
-.bdata:
-        .align  8
-        .global _environ                ! first symbol in sdata
-_environ:
-        .word   0
-        .global _errno                  ! not defined elsewhere ..?
-_errno:
-        .word   0
- 
-
-
diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c
deleted file mode 100644
index 8690cea..0000000
--- a/sim/erc32/exec.c
+++ /dev/null
@@ -1,1597 +0,0 @@
-/*
- * This file is part of SIS.
- * 
- * SIS, SPARC instruction simulator V1.8 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- * 
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- * 
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- * 
- */
-
-#include "sis.h"
-#include "end.h"
-#include <math.h>
-#include <stdio.h>
-
-extern int32    ext_irl, irqpend, iurev0, sis_verbose;
-
-/* Load/store interlock delay */
-#define FLSTHOLD 1
-
-/* Load delay (delete if unwanted - speeds up simulation) */
-#define LOAD_DEL 1
-
-#define T_LD	2
-#define T_LDD	3
-#define T_ST	3
-#define T_STD	4
-#define T_LDST	4
-#define T_JMPL	2
-#define T_RETT	2
-
-#define FSR_QNE 	0x2000
-#define FP_EXE_MODE 0
-#define	FP_EXC_PE   1
-#define FP_EXC_MODE 2
-
-#define	FBA	8
-#define	FBN	0
-#define	FBNE	1
-#define	FBLG	2
-#define	FBUL	3
-#define	FBL 	4
-#define	FBUG	5
-#define	FBG 	6
-#define	FBU 	7
-
-#define	FCC_E 	0
-#define	FCC_L 	1
-#define	FCC_G 	2
-#define	FCC_U 	3
-
-#define PSR_ET 0x20
-#define PSR_EF 0x1000
-#define PSR_PS 0x40
-#define PSR_S  0x80
-#define PSR_N  0x0800000
-#define PSR_Z  0x0400000
-#define PSR_V  0x0200000
-#define PSR_C  0x0100000
-#define PSR_CC 0x0F00000
-#define PSR_CWP 0x7
-#define PSR_PIL 0x0f00
-
-#define ICC_N	sregs->psr
-#define ICC_Z	(sregs->psr << 1)
-#define ICC_V	(sregs->psr << 2)
-#define ICC_C	(sregs->psr << 3)
-
-#define TRAP_IEXC 1
-#define TRAP_UNIMP 2
-#define TRAP_PRIVI 3
-#define TRAP_FPDIS 4
-#define TRAP_WOFL 5
-#define TRAP_WUFL 6
-#define TRAP_UNALI 7
-#define TRAP_FPEXC 8
-#define TRAP_DEXC 9
-#define TRAP_TAG 10
-
-#define FSR_TT		0x1C000
-#define FP_IEEE		0x04000
-#define FP_UNIMP	0x0C000
-#define FP_SEQ_ERR	0x10000
-
-#define	BICC_BN		0
-#define	BICC_BE		1
-#define	BICC_BLE	2
-#define	BICC_BL		3
-#define	BICC_BLEU	4
-#define	BICC_BCS	5
-#define	BICC_NEG	6
-#define	BICC_BVS	7
-#define	BICC_BA		8
-
-#define INST_SIMM13 0x1fff
-#define INST_RS2    0x1f
-#define INST_I	    0x2000
-#define ADD 	0x00
-#define ADDCC 	0x10
-#define ADDX 	0x08
-#define ADDXCC 	0x18
-#define TADDCC 	0x20
-#define TADDCCTV 	0x22
-#define IAND 	0x01
-#define IANDCC 	0x11
-#define IANDN 	0x05
-#define IANDNCC	0x15
-#define MULScc 	0x24
-#define IOR 	0x02
-#define IORCC 	0x12
-#define IORN 	0x06
-#define IORNCC 	0x16
-#define SLL 	0x25
-#define SRA 	0x27
-#define SRL 	0x26
-#define SUB 	0x04
-#define SUBCC 	0x14
-#define SUBX 	0x0C
-#define SUBXCC 	0x1C
-#define IXNOR 	0x07
-#define IXNORCC	0x17
-#define IXOR 	0x03
-#define IXORCC 	0x13
-#define SETHI 	0x04
-#define BICC 	0x02
-#define FPBCC 	0x06
-#define RDY 	0x28
-#define RDPSR 	0x29
-#define RDWIM 	0x2A
-#define RDTBR 	0x2B
-#define WRY	0x30
-#define WRPSR	0x31
-#define WRWIM	0x32
-#define WRTBR	0x33
-#define JMPL 	0x38
-#define RETT 	0x39
-#define TICC 	0x3A
-#define SAVE 	0x3C
-#define RESTORE 0x3D
-#define LDD	0x03
-#define LDDA	0x13
-#define LD	0x00
-#define LDA	0x10
-#define LDF	0x20
-#define LDDF	0x23
-#define LDSTUB	0x0D
-#define LDSTUBA	0x1D
-#define LDUB	0x01
-#define LDUBA	0x11
-#define LDSB	0x09
-#define LDSBA	0x19
-#define LDUH	0x02
-#define LDUHA	0x12
-#define LDSH	0x0A
-#define LDSHA	0x1A
-#define LDFSR	0x21
-#define ST	0x04
-#define STA	0x14
-#define STB	0x05
-#define STBA	0x15
-#define STD	0x07
-#define STDA	0x17
-#define STF	0x24
-#define STDFQ	0x26
-#define STDF	0x27
-#define STFSR	0x25
-#define STH	0x06
-#define STHA	0x16
-#define SWAP	0x0F
-#define SWAPA	0x1F
-
-/* # of cycles overhead when a trap is taken */
-#define TRAP_C  3
-
-int32           fpexec();
-extern struct estate ebase;
-extern int32    nfp;
-
-sub_cc(operand1, operand2, result, sregs)
-    int32           operand1;
-    int32           operand2;
-    int32           result;
-    struct pstate  *sregs;
-{
-    sregs->psr = ((sregs->psr & ~PSR_N) | ((result >> 8) & PSR_N));
-    if (result)
-	sregs->psr &= ~PSR_Z;
-    else
-	sregs->psr |= PSR_Z;
-    sregs->psr = (sregs->psr & ~PSR_V) | ((
-					 ((operand1 & ~operand2 & ~result) |
-			   (~operand1 & operand2 & result)) >> 10) & PSR_V);
-    sregs->psr = (sregs->psr & ~PSR_C) | ((
-					   ((~operand1 & operand2) |
-			 ((~operand1 | operand2) & result)) >> 11) & PSR_C);
-}
-
-add_cc(operand1, operand2, result, psr)
-    int32           operand1;
-    int32           operand2;
-    int32           result;
-    uint32         *psr;
-{
-    *psr = ((*psr & ~PSR_N) | ((result >> 8) & PSR_N));
-    if (result)
-	*psr &= ~PSR_Z;
-    else
-	*psr |= PSR_Z;
-    *psr = (*psr & ~PSR_V) | ((
-			       ((operand1 & operand2 & ~result) |
-			  (~operand1 & ~operand2 & result)) >> 10) & PSR_V);
-    *psr = (*psr & ~PSR_C) | ((
-			       ((operand1 & operand2) |
-			 ((operand1 | operand2) & ~result)) >> 11) & PSR_C);
-}
-
-log_cc(result, sregs)
-    int32           result;
-    struct pstate  *sregs;
-{
-    sregs->psr &= ~(PSR_CC);	/* Zero CC bits */
-    sregs->psr = (sregs->psr | ((result >> 8) & PSR_N));
-    if (result == 0)
-	sregs->psr |= PSR_Z;
-}
-
-int
-dispatch_instruction(sregs)
-    struct pstate  *sregs;
-{
-
-    uint32          cwp, op, op2, op3, opf, opc, asi, a, rd, cond, rs1,
-                    rs2;
-    uint32          ldep;
-    int32           operand1, operand2, *rdd, result, i, disp22, eicc,
-                    new_cwp;
-    int32           pc, npc, data, address, ws, mexc, fcc;
-
-    sregs->ninst++;
-    sregs->icnt = 1;
-    cwp = ((sregs->psr & PSR_CWP) << 4);
-    op = sregs->inst >> 30;
-    pc = sregs->npc;
-    npc = sregs->npc + 4;
-    if (op > 1) {
-
-	op3 = (sregs->inst >> 19) & 0x3f;
-	rs1 = (sregs->inst >> 14) & 0x1f;
-	rd = (sregs->inst >> 25) & 0x1f;
-
-#ifdef LOAD_DEL
-
-	/* Check if load dependecy is possible */
-	ldep = ((ebase.simtime <= sregs->ildtime) && ((op3 & 0x38) != 0x28) &&
-		((op3 & 0x3e) != 0x34) && (sregs->ildreg != 0));
-	if (sregs->inst & INST_I) {
-	    if (ldep && (sregs->ildreg == rs1))
-		sregs->hold++;
-	    operand2 = sregs->inst & INST_SIMM13;
-	    if (operand2 > 0x0fff)
-		operand2 |= 0xfffff000;
-	} else {
-	    rs2 = sregs->inst & INST_RS2;
-	    if (rs2 > 7)
-		operand2 = sregs->r[(cwp + rs2) & 0x7f];
-	    else
-		operand2 = sregs->g[rs2];
-	    if (ldep && ((sregs->ildreg == rs1) || (sregs->ildreg == rs2)))
-		sregs->hold++;
-	}
-#else
-	if (sregs->inst & INST_I) {
-	    operand2 = sregs->inst & INST_SIMM13;
-	    if (operand2 > 0x0fff)
-		operand2 |= 0xfffff000;
-	} else {
-	    rs2 = sregs->inst & INST_RS2;
-	    if (rs2 > 7)
-		operand2 = sregs->r[(cwp + rs2) & 0x7f];
-	    else
-		operand2 = sregs->g[rs2];
-	}
-#endif
-
-	if (rd > 7)
-	    rdd = &(sregs->r[(cwp + rd) & 0x7f]);
-	else
-	    rdd = &(sregs->g[rd]);
-	if (rs1 > 7)
-	    rs1 = sregs->r[(cwp + rs1) & 0x7f];
-	else
-	    rs1 = sregs->g[rs1];
-    }
-    switch (op) {
-    case 0:
-	op2 = (sregs->inst >> 22) & 0x7;
-	switch (op2) {
-	case SETHI:
-	    rd = (sregs->inst >> 25) & 0x1f;
-	    if (rd > 7)
-		rdd = &(sregs->r[(cwp + rd) & 0x7f]);
-	    else
-		rdd = &(sregs->g[rd]);
-	    *rdd = sregs->inst << 10;
-	    break;
-	case BICC:
-#ifdef STAT
-	    sregs->nbranch++;
-#endif
-	    cond = ((sregs->inst >> 25) & 0x0f);
-	    switch (cond & 0x7) {
-	    case BICC_BN:
-		eicc = 0;
-		break;
-	    case BICC_BE:
-		eicc = ICC_Z;
-		break;
-	    case BICC_BLE:
-		eicc = ICC_Z | (ICC_N ^ ICC_V);
-		break;
-	    case BICC_BL:
-		eicc = (ICC_N ^ ICC_V);
-		break;
-	    case BICC_BLEU:
-		eicc = ICC_C | ICC_Z;
-		break;
-	    case BICC_BCS:
-		eicc = ICC_C;
-		break;
-	    case BICC_NEG:
-		eicc = ICC_N;
-		break;
-	    case BICC_BVS:
-		eicc = ICC_V;
-		break;
-	    }
-	    eicc &= PSR_N;
-	    if (sregs->inst & 0x10000000)
-		eicc = !eicc;
-	    a = sregs->inst & 0x20000000;
-	    if (eicc) {
-		operand1 = sregs->inst & 0x3fffff;
-		if (sregs->inst & 0x200000)
-		    operand1 |= 0xffc00000;
-		npc = sregs->pc + (operand1 << 2);
-		if ((cond == BICC_BA) && (a))
-		    sregs->annul = 1;
-	    } else {
-		if (a)
-		    sregs->annul = 1;
-	    }
-	    break;
-	case FPBCC:
-#ifdef STAT
-	    sregs->nbranch++;
-#endif
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (ebase.simtime < sregs->ftime) {
-		sregs->ftime = ebase.simtime + sregs->hold;
-	    }
-	    cond = ((sregs->inst >> 25) & 0x0f);
-	    fcc = (sregs->fsr >> 10) & 0x3;
-	    switch (cond & 0x7) {
-	    case FBN:
-		eicc = 0;
-		break;
-	    case FBNE:
-		eicc = (fcc != FCC_E);
-		break;
-	    case FBLG:
-		eicc = (fcc == FCC_L) || (fcc == FCC_G);
-		break;
-	    case FBUL:
-		eicc = (fcc == FCC_L) || (fcc == FCC_U);
-		break;
-	    case FBL:
-		eicc = (fcc == FCC_L);
-		break;
-	    case FBUG:
-		eicc = (fcc == FCC_G) || (fcc == FCC_U);
-		break;
-	    case FBG:
-		eicc = (fcc == FCC_G);
-		break;
-	    case FBU:
-		eicc = (fcc == FCC_U);
-		break;
-	    }
-	    if (sregs->inst & 0x10000000)
-		eicc = !eicc;
-	    a = sregs->inst & 0x20000000;
-	    if (eicc) {
-		operand1 = sregs->inst & 0x3fffff;
-		if (sregs->inst & 0x200000)
-		    operand1 |= 0xffc00000;
-		npc = sregs->pc + (operand1 << 2);
-		if ((cond == FBA) && (a))
-		    sregs->annul = 1;
-	    } else {
-		if (a)
-		    sregs->annul = 1;
-	    }
-	    break;
-
-	default:
-	    sregs->trap = TRAP_UNIMP;
-	    break;
-	}
-	break;
-    case 1:			/* CALL */
-#ifdef STAT
-	sregs->nbranch++;
-#endif
-	sregs->r[(cwp + 15) & 0x7f] = sregs->pc;
-	npc = sregs->pc + (sregs->inst << 2);
-	break;
-
-    case 2:
-	if ((op3 >> 1) == 0x1a) {
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-	    } else {
-		rs1 = (sregs->inst >> 14) & 0x1f;
-		rs2 = sregs->inst & 0x1f;
-		sregs->trap = fpexec(op3, rd, rs1, rs2, sregs);
-	    }
-	} else {
-
-	    switch (op3) {
-	    case TICC:
-		cond = ((sregs->inst >> 25) & 0x0f);
-		switch (cond & 0x7) {
-		case BICC_BN:
-		    eicc = 0;
-		    break;
-		case BICC_BE:
-		    eicc = ICC_Z;
-		    break;
-		case BICC_BLE:
-		    eicc = ICC_Z | (ICC_N ^ ICC_V);
-		    break;
-		case BICC_BL:
-		    eicc = (ICC_N ^ ICC_V);
-		    break;
-		case BICC_BLEU:
-		    eicc = ICC_C | ICC_Z;
-		    break;
-		case BICC_BCS:
-		    eicc = ICC_C;
-		    break;
-		case BICC_NEG:
-		    eicc = ICC_N;
-		    break;
-		case BICC_BVS:
-		    eicc = ICC_V;
-		    break;
-		}
-		eicc &= PSR_N;
-		if (sregs->inst & 0x10000000)
-		    eicc = !eicc;
-		if (eicc) {
-		    sregs->trap = (0x80 | ((rs1 + operand2) & 0x7f));
-		}
-		break;
-
-	    case MULScc:
-		operand1 =
-		    (((sregs->psr & PSR_V) ^ ((sregs->psr & PSR_N) >> 2))
-		     << 10) | (rs1 >> 1);
-		if ((sregs->y & 1) == 0)
-		    operand2 = 0;
-		*rdd = operand1 + operand2;
-		sregs->y = (rs1 << 31) | (sregs->y >> 1);
-		add_cc(operand1, operand2, *rdd, &sregs->psr);
-		break;
-	    case IXNOR:
-		*rdd = rs1 ^ ~operand2;
-		break;
-	    case IXNORCC:
-		*rdd = rs1 ^ ~operand2;
-		log_cc(*rdd, sregs);
-		break;
-	    case IXOR:
-		*rdd = rs1 ^ operand2;
-		break;
-	    case IXORCC:
-		*rdd = rs1 ^ operand2;
-		log_cc(*rdd, sregs);
-		break;
-	    case IOR:
-		*rdd = rs1 | operand2;
-		break;
-	    case IORCC:
-		*rdd = rs1 | operand2;
-		log_cc(*rdd, sregs);
-		break;
-	    case IORN:
-		*rdd = rs1 | ~operand2;
-		break;
-	    case IORNCC:
-		*rdd = rs1 | ~operand2;
-		log_cc(*rdd, sregs);
-		break;
-	    case IANDNCC:
-		*rdd = rs1 & ~operand2;
-		log_cc(*rdd, sregs);
-		break;
-	    case IANDN:
-		*rdd = rs1 & ~operand2;
-		break;
-	    case IAND:
-		*rdd = rs1 & operand2;
-		break;
-	    case IANDCC:
-		*rdd = rs1 & operand2;
-		log_cc(*rdd, sregs);
-		break;
-	    case SUB:
-		*rdd = rs1 - operand2;
-		break;
-	    case SUBCC:
-		*rdd = rs1 - operand2;
-		sub_cc(rs1, operand2, *rdd, sregs);
-		break;
-	    case SUBX:
-		*rdd = rs1 - operand2 - ((sregs->psr >> 20) & 1);
-		break;
-	    case SUBXCC:
-		*rdd = rs1 - operand2 - ((sregs->psr >> 20) & 1);
-		sub_cc(rs1, operand2, *rdd, sregs);
-		break;
-	    case ADD:
-		*rdd = rs1 + operand2;
-		break;
-	    case ADDCC:
-		*rdd = rs1 + operand2;
-		add_cc(rs1, operand2, *rdd, &sregs->psr);
-		break;
-	    case ADDX:
-		*rdd = rs1 + operand2 + ((sregs->psr >> 20) & 1);
-		break;
-	    case ADDXCC:
-		*rdd = rs1 + operand2 + ((sregs->psr >> 20) & 1);
-		add_cc(rs1, operand2, *rdd, &sregs->psr);
-		break;
-	    case TADDCC:
-		*rdd = rs1 + operand2;
-		add_cc(rs1, operand2, *rdd, &sregs->psr);
-		if ((rs1 | operand2) & 0x3)
-		    sregs->psr |= PSR_V;
-		break;
-	    case TADDCCTV:
-		*rdd = rs1 + operand2;
-		result = 0;
-		add_cc(rs1, operand2, *rdd, &result);
-		if ((rs1 | operand2) & 0x3)
-		    result |= PSR_V;
-		if (result & PSR_V) {
-		    sregs->trap = TRAP_TAG;
-		} else {
-		    sregs->psr = (sregs->psr & PSR_CC) | result;
-		}
-		break;
-	    case SLL:
-		*rdd = rs1 << (operand2 & 0x1f);
-		break;
-	    case SRL:
-		*rdd = rs1 >> (operand2 & 0x1f);
-		break;
-	    case SRA:
-		*rdd = ((int) rs1) >> (operand2 & 0x1f);
-		break;
-	    case SAVE:
-		new_cwp = ((sregs->psr & PSR_CWP) - 1) & PSR_CWP;
-		if (sregs->wim & (1 << new_cwp)) {
-		    sregs->trap = TRAP_WOFL;
-		    break;
-		}
-		if (rd > 7)
-		    rdd = &(sregs->r[((new_cwp << 4) + rd) & 0x7f]);
-		*rdd = rs1 + operand2;
-		sregs->psr = (sregs->psr & ~PSR_CWP) | new_cwp;
-		break;
-	    case RESTORE:
-
-#ifdef IUREV0
-		if ((iurev0) && ((sregs->jmpltime + 1) == sregs->ninst)) {
-		    if (!(sregs->rett_err)) {
-			sregs->rett_err = 1;
-			if (sis_verbose)
-			    printf("IU rev.0 bug mode entered\n");
-		    }
-		}
-#endif
-
-		new_cwp = ((sregs->psr & PSR_CWP) + 1) & PSR_CWP;
-		if (sregs->wim & (1 << new_cwp)) {
-		    sregs->trap = TRAP_WUFL;
-		    break;
-		}
-		if (rd > 7)
-		    rdd = &(sregs->r[((new_cwp << 4) + rd) & 0x7f]);
-		*rdd = rs1 + operand2;
-		sregs->psr = (sregs->psr & ~PSR_CWP) | new_cwp;
-		break;
-	    case RDPSR:
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		*rdd = sregs->psr;
-#ifdef IUREV0
-
-		if (iurev0 & sregs->rett_err) {
-		    operand2 = sregs->psr;
-		    *rdd |= PSR_ET;
-		    *rdd &= ~(PSR_S);
-		    *rdd |= ((*rdd & PSR_PS) << 1);
-		    if (sis_verbose) {
-			if (operand2 != *rdd)
-			    printf("rdpsr failed: %08X -> %08X\n", operand2, *rdd);
-		    }
-		}
-#endif
-		break;
-	    case RDY:
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		*rdd = sregs->y;
-		break;
-	    case RDWIM:
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		*rdd = sregs->wim;
-		break;
-	    case RDTBR:
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		*rdd = sregs->tbr;
-		break;
-	    case WRPSR:
-		if ((sregs->psr & 0x1f) > 7) {
-		    sregs->trap = TRAP_UNIMP;
-		    break;
-		}
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		sregs->psr = (rs1 ^ operand2) & 0x00f03fff;
-		break;
-	    case WRWIM:
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		sregs->wim = (rs1 ^ operand2) & 0x0ff;
-		break;
-	    case WRTBR:
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		sregs->tbr = (sregs->tbr & 0x00000ff0) |
-		    ((rs1 ^ operand2) & 0xfffff000);
-		break;
-	    case WRY:
-		sregs->y = (rs1 ^ operand2);
-		break;
-	    case JMPL:
-
-#ifdef IUREV0
-		if (iurev0)
-		    sregs->jmpltime = sregs->ninst;
-#endif
-#ifdef STAT
-		sregs->nbranch++;
-#endif
-		sregs->icnt = T_JMPL;	/* JMPL takes two cycles */
-		if (rs1 & 0x3) {
-		    sregs->trap = TRAP_UNALI;
-		    break;
-		}
-		*rdd = sregs->pc;
-		npc = rs1 + operand2;
-		break;
-	    case RETT:
-#ifdef IUREV0
-		if (iurev0 && sregs->rett_err) {
-		    sregs->rett_err = 0;
-		    if (sis_verbose)
-			printf("IU rev.0 bug mode reset\n");
-		}
-#endif
-
-		address = rs1 + operand2;
-		new_cwp = ((sregs->psr & PSR_CWP) + 1) & PSR_CWP;
-		sregs->icnt = T_RETT;	/* RETT takes two cycles */
-		if (sregs->psr & PSR_ET) {
-		    sregs->trap = TRAP_UNIMP;
-		    break;
-		}
-		if (!(sregs->psr & PSR_S)) {
-		    sregs->trap = TRAP_PRIVI;
-		    break;
-		}
-		if (sregs->wim & (1 << new_cwp)) {
-		    sregs->trap = TRAP_WUFL;
-		    break;
-		}
-		if (address & 0x3) {
-		    sregs->trap = TRAP_UNALI;
-		    break;
-		}
-		sregs->psr = (sregs->psr & ~PSR_CWP) | new_cwp | PSR_ET;
-		sregs->psr =
-		    (sregs->psr & ~PSR_S) | ((sregs->psr & PSR_PS) << 1);
-		npc = address;
-		break;
-
-	    default:
-		sregs->trap = TRAP_UNIMP;
-		break;
-	    }
-	}
-	break;
-    case 3:			/* Load/store instructions */
-
-	address = rs1 + operand2;
-
-	/* Check for load/store to alternate address space */
-
-	if ((op3 >> 4) == 1) {
-	    if (!(sregs->psr & PSR_S)) {
-		sregs->trap = TRAP_PRIVI;
-		break;
-	    } else if (sregs->inst & INST_I) {
-		sregs->trap = TRAP_UNIMP;
-		break;
-	    } else
-		asi = (sregs->inst >> 5) & 0x0ff;
-	} else {
-	    if (sregs->psr & PSR_S)
-		asi = 11;
-	    else
-		asi = 10;
-#ifdef IUREV0
-	    if (iurev0 && sregs->rett_err) {
-		asi &= ~0x1;
-		asi |= ((sregs->psr & PSR_PS) >> 6);
-	    }
-#endif
-	}
-
-	if (op3 & 4) {
-	    sregs->icnt = T_ST;	/* Set store instruction count */
-#ifdef STAT
-	    sregs->nstore++;
-#endif
-	} else {
-	    sregs->icnt = T_LD;	/* Set load instruction count */
-#ifdef STAT
-	    sregs->nload++;
-#endif
-	}
-
-	/* Decode load/store instructions */
-
-	switch (op3) {
-	case LDDA:
-	case LDD:
-	    if (address & 0x7) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (rd & 1) {
-		rd &= 0x1e;
-		if (rd > 7)
-		    rdd = &(sregs->r[(cwp + rd) & 0x7f]);
-		else
-		    rdd = &(sregs->g[rd]);
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_LDD;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    } else {
-		rdd[0] = data;
-		address += 4;
-		mexc = memory_read(asi, address, &data, &ws);
-		sregs->hold += ws;
-#ifdef STAT
-		sregs->nload++;	/* Double load counts twice */
-#endif
-		if (mexc) {
-		    sregs->trap = TRAP_DEXC;
-		} else {
-		    rdd[1] = data;
-		}
-	    }
-	    break;
-
-	case LDA:
-	case LD:
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    } else {
-		*rdd = data;
-	    }
-	    break;
-	case LDSTUB:
-	case LDSTUBA:
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_LDST;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    }
-	    data = (data >> ((3 - (address & 0x3)) << 3)) & 0x0ff;
-	    *rdd = data;
-	    data = 0x0ff;
-	    mexc = memory_write(asi, address, &data, 0, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-#ifdef STAT
-	    sregs->nload++;
-#endif
-	    break;
-	case LDSBA:
-	case LDUBA:
-	case LDSB:
-	case LDUB:
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    }
-	    data = (data >> ((3 - (address & 0x3)) << 3)) & 0x0ff;
-	    if ((op3 == LDSB) && (data >> 7))
-		data |= 0xffffff00;
-	    *rdd = data;
-	    break;
-	case LDSHA:
-	case LDUHA:
-	case LDSH:
-	case LDUH:
-	    if (address & 0x1) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    }
-	    if (!(address & 0x2))
-		data >>= 16;
-	    data &= 0x0ffff;
-	    if ((op3 == LDSH) && (data >> 15))
-		data |= 0xffff0000;
-	    *rdd = data;
-	    break;
-	case LDF:
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (ebase.simtime < sregs->ftime) {
-		if ((sregs->frd == rd) || (sregs->frs1 == rd) ||
-		    (sregs->frs2 == rd))
-		    sregs->fhold += (sregs->ftime - ebase.simtime);
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    sregs->flrd = rd;
-	    sregs->ltime = ebase.simtime + sregs->icnt + FLSTHOLD +
-		sregs->hold + sregs->fhold;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    } else {
-		sregs->fs[rd] = *((float32 *) & data);
-	    }
-	    break;
-	case LDDF:
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x7) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (ebase.simtime < sregs->ftime) {
-		if (((sregs->frd >> 1) == (rd >> 1)) ||
-		    ((sregs->frs1 >> 1) == (rd >> 1)) ||
-		    ((sregs->frs2 >> 1) == (rd >> 1)))
-		    sregs->fhold += (sregs->ftime - ebase.simtime);
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_LDD;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    } else {
-		rd &= 0x1E;
-		sregs->flrd = rd;
-		sregs->fs[rd] = *((float32 *) & data);
-		mexc = memory_read(asi, address + 4, &data, &ws);
-		sregs->hold += ws;
-#ifdef STAT
-		sregs->nload++;	/* Double load counts twice */
-#endif
-		if (mexc) {
-		    sregs->trap = TRAP_DEXC;
-		} else {
-		    sregs->fs[rd + 1] = *((float32 *) & data);
-		    sregs->ltime = ebase.simtime + sregs->icnt + FLSTHOLD +
-			sregs->hold + sregs->fhold;
-		}
-	    }
-	    break;
-	case LDFSR:
-	    if (ebase.simtime < sregs->ftime) {
-		sregs->fhold += (sregs->ftime - ebase.simtime);
-	    }
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    } else {
-		sregs->fsr =
-		    (sregs->fsr & 0x7FF000) | (data & ~0x7FF000);
-		set_fsr(sregs->fsr);
-	    }
-	    break;
-	case STFSR:
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (ebase.simtime < sregs->ftime) {
-		sregs->fhold += (sregs->ftime - ebase.simtime);
-	    }
-	    mexc = memory_write(asi, address, &sregs->fsr, 2, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-	    break;
-
-	case ST:
-	case STA:
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    mexc = memory_write(asi, address, rdd, 2, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-	    break;
-	case STB:
-	case STBA:
-	    mexc = memory_write(asi, address, rdd, 0, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-	    break;
-	case STD:
-	case STDA:
-	    if (address & 0x7) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (rd & 1) {
-		rd &= 0x1e;
-		if (rd > 7)
-		    rdd = &(sregs->r[(cwp + rd) & 0x7f]);
-		else
-		    rdd = &(sregs->g[rd]);
-	    }
-	    mexc = memory_write(asi, address, rdd, 3, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_STD;
-#ifdef STAT
-	    sregs->nstore++;	/* Double store counts twice */
-#endif
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    }
-	    break;
-	case STDFQ:
-	    if ((sregs->psr & 0x1f) > 7) {
-		sregs->trap = TRAP_UNIMP;
-		break;
-	    }
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x7) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (!(sregs->fsr & FSR_QNE)) {
-		sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_SEQ_ERR;
-		break;
-	    }
-	    rdd = &(sregs->fpq[0]);
-	    mexc = memory_write(asi, address, rdd, 3, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_STD;
-#ifdef STAT
-	    sregs->nstore++;	/* Double store counts twice */
-#endif
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    } else {
-		sregs->fsr &= ~FSR_QNE;
-		sregs->fpstate = FP_EXE_MODE;
-	    }
-	    break;
-	case STHA:
-	case STH:
-	    if (address & 0x1) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    mexc = memory_write(asi, address, rdd, 1, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-	    break;
-	case STF:
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    if (ebase.simtime < sregs->ftime) {
-		if (sregs->frd == rd)
-		    sregs->fhold += (sregs->ftime - ebase.simtime);
-	    }
-	    mexc = memory_write(asi, address, &sregs->fsi[rd], 2, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-	    break;
-	case STDF:
-	    if (!((sregs->psr & PSR_EF) && chk_fp(sregs))) {
-		sregs->trap = TRAP_FPDIS;
-		break;
-	    }
-	    if (address & 0x7) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    rd &= 0x1E;
-	    if (ebase.simtime < sregs->ftime) {
-		if ((sregs->frd == rd) || (sregs->frd + 1 == rd))
-		    sregs->fhold += (sregs->ftime - ebase.simtime);
-	    }
-	    mexc = memory_write(asi, address, &sregs->fsi[rd], 3, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_STD;
-#ifdef STAT
-	    sregs->nstore++;	/* Double store counts twice */
-#endif
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-	    }
-	    break;
-	case SWAP:
-	case SWAPA:
-	    if (address & 0x3) {
-		sregs->trap = TRAP_UNALI;
-		break;
-	    }
-	    mexc = memory_read(asi, address, &data, &ws);
-	    sregs->hold += ws;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    }
-	    mexc = memory_write(asi, address, rdd, 2, &ws);
-	    sregs->hold += ws;
-	    sregs->icnt = T_LDST;
-	    if (mexc) {
-		sregs->trap = TRAP_DEXC;
-		break;
-	    } else
-		*rdd = data;
-#ifdef STAT
-	    sregs->nload++;
-#endif
-	    break;
-
-
-	default:
-	    sregs->trap = TRAP_UNIMP;
-	    break;
-	}
-
-#ifdef LOAD_DEL
-
-	if (!(op3 & 4)) {
-	    sregs->ildtime = ebase.simtime + sregs->hold + sregs->icnt;
-	    sregs->ildreg = rd;
-	    if ((op3 | 0x10) == 0x13)
-		sregs->ildreg |= 1;	/* Double load, odd register loaded
-					 * last */
-	}
-#endif
-	break;
-
-    default:
-	sregs->trap = TRAP_UNIMP;
-	break;
-    }
-    sregs->g[0] = 0;
-    if (!sregs->trap) {
-	sregs->pc = pc;
-	sregs->npc = npc;
-    }
-    return (0);
-}
-
-#define T_FABSs		2
-#define T_FADDs		4
-#define T_FADDd		4
-#define T_FCMPs		4
-#define T_FCMPd		4
-#define T_FDIVs		20
-#define T_FDIVd		35
-#define T_FMOVs		2
-#define T_FMULs		5
-#define T_FMULd		9
-#define T_FNEGs		2
-#define T_FSQRTs	37
-#define T_FSQRTd	65
-#define T_FSUBs		4
-#define T_FSUBd		4
-#define T_FdTOi		7
-#define T_FdTOs		3
-#define T_FiTOs		6
-#define T_FiTOd		6
-#define T_FsTOi		6
-#define T_FsTOd		2
-
-#define FABSs	0x09
-#define FADDs	0x41
-#define FADDd	0x42
-#define FCMPs	0x51
-#define FCMPd	0x52
-#define FCMPEs	0x55
-#define FCMPEd	0x56
-#define FDIVs	0x4D
-#define FDIVd	0x4E
-#define FMOVs	0x01
-#define FMULs	0x49
-#define FMULd	0x4A
-#define FNEGs	0x05
-#define FSQRTs	0x29
-#define FSQRTd	0x2A
-#define FSUBs	0x45
-#define FSUBd	0x46
-#define FdTOi	0xD2
-#define FdTOs	0xC6
-#define FiTOs	0xC4
-#define FiTOd	0xC8
-#define FsTOi	0xD1
-#define FsTOd	0xC9
-
-
-int
-fpexec(op3, rd, rs1, rs2, sregs)
-    uint32          op3, rd, rs1, rs2;
-    struct pstate  *sregs;
-{
-    uint32          opf, tem, accex;
-    float32         ftmps;
-    float64         ftmpd;
-    int32           fcc;
-    char           *res;
-    uint32          ldadj;
-
-    if (sregs->fpstate == FP_EXC_MODE) {
-	sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_SEQ_ERR;
-	sregs->fpstate == FP_EXC_PE;
-	return (0);
-    }
-    if (sregs->fpstate == FP_EXC_PE) {
-	sregs->fpstate = FP_EXC_MODE;
-	return (TRAP_FPEXC);
-    }
-    opf = (sregs->inst >> 5) & 0x1ff;
-
-    /*
-     * Check if we already have an FPop in the pipe. If so, halt until it is
-     * finished by incrementing fhold with the remaining execution time
-     */
-
-    if (ebase.simtime < sregs->ftime) {
-	sregs->fhold = (sregs->ftime - ebase.simtime);
-    } else {
-	sregs->fhold = 0;
-
-	/* Check load dependencies. */
-
-	if (ebase.simtime < sregs->ltime) {
-
-	    /* Don't check rs1 if single operand instructions */
-
-	    if (((opf >> 6) == 0) || ((opf >> 6) == 3))
-		rs1 = 32;
-
-	    /* Adjust for double floats */
-
-	    ldadj = opf & 1;
-	    if (!(((sregs->flrd - rs1) >> ldadj) && ((sregs->flrd - rs2) >> ldadj)))
-		sregs->fhold++;
-	}
-    }
-
-    sregs->finst++;
-
-    sregs->frs1 = rs1;		/* Store src and dst for dependecy check */
-    sregs->frs2 = rs2;
-    sregs->frd = rd;
-
-    sregs->ftime = ebase.simtime + sregs->hold + sregs->fhold;
-
-    /* SPARC is big-endian - swap double floats if host is little-endian */
-    /* This is ugly - I know ... */
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
-    rs1 &= 0x1f;
-    switch (opf) {
-	case FADDd:
-	case FDIVd:
-	case FMULd:
-	case FSQRTd:
-	case FSUBd:
-        case FCMPd:
-        case FCMPEd:
-	case FdTOi:
-	case FdTOs:
-    	    sregs->fdp[rs1 | 1] = sregs->fs[rs1 & ~1];
-    	    sregs->fdp[rs1 & ~1] = sregs->fs[rs1 | 1];
-    	    sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
-    	    sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
-    default:
-    }
-#endif
-
-    clear_accex();
-
-    switch (opf) {
-    case FABSs:
-	sregs->fs[rd] = fabs(sregs->fs[rs2]);
-	sregs->ftime += T_FABSs;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FADDs:
-	sregs->fs[rd] = sregs->fs[rs1] + sregs->fs[rs2];
-	sregs->ftime += T_FADDs;
-	break;
-    case FADDd:
-	sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] + sregs->fd[rs2 >> 1];
-	sregs->ftime += T_FADDd;
-	break;
-    case FCMPs:
-    case FCMPEs:
-	if (sregs->fs[rs1] == sregs->fs[rs2])
-	    fcc = 3;
-	else if (sregs->fs[rs1] < sregs->fs[rs2])
-	    fcc = 2;
-	else if (sregs->fs[rs1] > sregs->fs[rs2])
-	    fcc = 1;
-	else
-	    fcc = 0;
-	sregs->fsr |= 0x0C00;
-	sregs->fsr &= ~(fcc << 10);
-	sregs->ftime += T_FCMPs;
-	sregs->frd = 32;	/* rd ignored */
-	if ((fcc == 0) && (opf == FCMPEs)) {
-	    sregs->fpstate == FP_EXC_PE;
-	    sregs->fsr = (sregs->fsr & ~0x1C000) | (1 << 14);
-	}
-	break;
-    case FCMPd:
-    case FCMPEd:
-	if (sregs->fd[rs1 >> 1] == sregs->fd[rs2 >> 1])
-	    fcc = 3;
-	else if (sregs->fd[rs1 >> 1] < sregs->fd[rs2 >> 1])
-	    fcc = 2;
-	else if (sregs->fd[rs1 >> 1] > sregs->fd[rs2 >> 1])
-	    fcc = 1;
-	else
-	    fcc = 0;
-	sregs->fsr |= 0x0C00;
-	sregs->fsr &= ~(fcc << 10);
-	sregs->ftime += T_FCMPd;
-	sregs->frd = 32;	/* rd ignored */
-	if ((fcc == 0) && (opf == FCMPEd)) {
-	    sregs->fpstate == FP_EXC_PE;
-	    sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
-	}
-	break;
-    case FDIVs:
-	sregs->fs[rd] = sregs->fs[rs1] / sregs->fs[rs2];
-	sregs->ftime += T_FDIVs;
-	break;
-    case FDIVd:
-	sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] / sregs->fd[rs2 >> 1];
-	sregs->ftime += T_FDIVd;
-	break;
-    case FMOVs:
-	sregs->fs[rd] = sregs->fs[rs2];
-	sregs->ftime += T_FMOVs;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FMULs:
-	sregs->fs[rd] = sregs->fs[rs1] * sregs->fs[rs2];
-	sregs->ftime += T_FMULs;
-	break;
-    case FMULd:
-	sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] * sregs->fd[rs2 >> 1];
-	sregs->ftime += T_FMULd;
-	break;
-    case FNEGs:
-	sregs->fs[rd] = -sregs->fs[rs2];
-	sregs->ftime += T_FNEGs;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FSQRTs:
-	if (sregs->fs[rs2] < 0.0) {
-	    sregs->fpstate == FP_EXC_PE;
-	    sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
-	    sregs->fsr = (sregs->fsr & 0x1f) | 0x10;
-	    break;
-	}
-	sregs->fs[rd] = sqrt(sregs->fs[rs2]);
-	sregs->ftime += T_FSQRTs;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FSQRTd:
-	if (sregs->fd[rs2 >> 1] < 0.0) {
-	    sregs->fpstate == FP_EXC_PE;
-	    sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
-	    sregs->fsr = (sregs->fsr & 0x1f) | 0x10;
-	    break;
-	}
-	sregs->fd[rd >> 1] = sqrt(sregs->fd[rs2 >> 1]);
-	sregs->ftime += T_FSQRTd;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FSUBs:
-	sregs->fs[rd] = sregs->fs[rs1] - sregs->fs[rs2];
-	sregs->ftime += T_FSUBs;
-	break;
-    case FSUBd:
-	sregs->fd[rd >> 1] = sregs->fd[rs1 >> 1] - sregs->fd[rs2 >> 1];
-	sregs->ftime += T_FSUBd;
-	break;
-    case FdTOi:
-	sregs->fsi[rd] = (int) sregs->fd[rs2 >> 1];
-	sregs->ftime += T_FdTOi;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FdTOs:
-	sregs->fs[rd] = (float32) sregs->fd[rs2 >> 1];
-	sregs->ftime += T_FdTOs;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FiTOs:
-	sregs->fs[rd] = (float32) sregs->fsi[rs2];
-	sregs->ftime += T_FiTOs;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FiTOd:
-	sregs->fd[rd >> 1] = (float64) sregs->fsi[rs2];
-	sregs->ftime += T_FiTOd;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FsTOi:
-	sregs->fsi[rd] = (int) sregs->fs[rs2];
-	sregs->ftime += T_FsTOi;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-    case FsTOd:
-	sregs->fd[rd >> 1] = sregs->fs[rs2];
-	sregs->ftime += T_FsTOd;
-	sregs->frs1 = 32;	/* rs1 ignored */
-	break;
-
-    default:
-	sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_UNIMP;
-	sregs->fpstate == FP_EXC_PE;
-    }
-
-    accex = get_accex();
-
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
-    switch (opf) {
-    case FADDd:
-    case FDIVd:
-    case FMULd:
-    case FSQRTd:
-    case FSUBd:
-    case FiTOd:
-    case FsTOd:
-	sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
-	sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
-    default:
-    }
-#endif
-    if (sregs->fpstate == FP_EXC_PE) {
-	sregs->fpq[0] = sregs->pc;
-	sregs->fpq[1] = sregs->inst;
-	sregs->fsr |= FSR_QNE;
-    } else {
-	tem = (sregs->fsr >> 23) & 0x1f;
-	if (tem & accex) {
-	    sregs->fpstate = FP_EXC_PE;
-	    sregs->fsr = (sregs->fsr & ~FSR_TT) | FP_IEEE;
-	    sregs->fsr = ((sregs->fsr & ~0x1f) | accex);
-	} else {
-	    sregs->fsr = ((((sregs->fsr >> 5) | accex) << 5) | accex);
-	}
-	if (sregs->fpstate == FP_EXC_PE) {
-	    sregs->fpq[0] = sregs->pc;
-	    sregs->fpq[1] = sregs->inst;
-	    sregs->fsr |= FSR_QNE;
-	}
-    }
-    clear_accex();
-
-    return (0);
-
-
-}
-
-int
-execute_trap(sregs)
-    struct pstate  *sregs;
-{
-    int32           cwp;
-
-    if (sregs->trap == 256) {
-	sregs->pc = 0;
-	sregs->npc = 4;
-	sregs->trap = 0;
-    } else {
-
-	if ((sregs->psr & PSR_ET) == 0)
-	    return (ERROR);
-
-	sregs->tbr = (sregs->tbr & 0xfffff000) | (sregs->trap << 4);
-	sregs->trap = 0;
-	sregs->psr &= ~PSR_ET;
-	sregs->psr |= ((sregs->psr & PSR_S) >> 1);
-	sregs->annul = 0;
-	sregs->psr = (((sregs->psr & PSR_CWP) - 1) & 0x7) | (sregs->psr & ~PSR_CWP);
-	cwp = ((sregs->psr & PSR_CWP) << 4);
-	sregs->r[(cwp + 17) & 0x7f] = sregs->pc;
-	sregs->r[(cwp + 18) & 0x7f] = sregs->npc;
-	sregs->psr |= PSR_S;
-	sregs->pc = sregs->tbr;
-	sregs->npc = sregs->tbr + 4;
-
-	/* Increase simulator time */
-	sregs->icnt = TRAP_C;
-
-    }
-
-
-    return (0);
-
-}
-
-extern struct irqcell irqarr[16];
-
-void
-check_interrupts(sregs)
-    struct pstate  *sregs;
-{
-    if ((ext_irl) && (sregs->psr & PSR_ET) &&
-	((ext_irl == 15) || (ext_irl > ((sregs->psr & PSR_PIL) >> 8)))) {
-	if (sregs->trap == 0) {
-	    sregs->trap = 16 + ext_irl;
-	    irqarr[ext_irl & 0x0f].callback(irqarr[ext_irl & 0x0f].arg);
-	    clear_int(ext_irl);
-	}
-    }
-}
-
-init_regs(sregs)
-    struct pstate  *sregs;
-{
-    int32           i;
-
-    sregs->pc = 0;
-    sregs->npc = 4;
-    sregs->trap = 0;
-    sregs->psr &= 0x00f03fdf;
-    sregs->psr |= 0x080;	/* Set supervisor bit */
-    sregs->breakpoint = 0;
-    sregs->annul = 0;
-    sregs->fpstate = FP_EXE_MODE;
-    sregs->fpqn = 0;
-    sregs->ftime = 0;
-    sregs->ltime = 0;
-    sregs->err_mode = 0;
-    ext_irl = 0;
-    irqpend = 0;
-    sregs->g[0] = 0;
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
-    sregs->fdp = (float32 *) sregs->fd;
-    sregs->fsi = (int32 *) sregs->fs;
-#else
-    sregs->fs = (float32 *) sregs->fd;
-    sregs->fsi = (int32 *) sregs->fd;
-#endif
-    sregs->fsr = 0;
-    sregs->fpu_pres = !nfp;
-    set_fsr(sregs->fsr);
-    sregs->bphit = 0;
-    sregs->ildreg = 0;
-    sregs->ildtime = 0;
-
-    sregs->rett_err = 0;
-    sregs->jmpltime = 0;
-}
-
-chk_fp(sregs)
-    struct pstate  *sregs;
-{
-    return (sregs->fpu_pres);
-}
diff --git a/sim/erc32/float.c b/sim/erc32/float.c
deleted file mode 100644
index 30ffffa..0000000
--- a/sim/erc32/float.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/*
- * This file is part of SIS.
- *
- * SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
- * Space Agency
- *
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * This file implements the interface between the host and the simulated
- * FPU. IEEE trap handling is done as follows: 
- * 1. In the host, all IEEE traps are masked
- * 2. After each simulated FPU instruction, check if any exception occured 
- *    by reading the exception bits from the host FPU status register 
- *    (get_accex()).
- * 3. Propagate any exceptions to the simulated FSR.
- * 4. Clear host exception bits
- *
- *
- * This can also be done using ieee_flags() library routine on sun.
- */
-
-#include "sis.h"
-
-/* This host dependent routine should return the accrued exceptions */
-int
-get_accex()
-{
-#ifdef sparc
-    return ((_get_fsr_raw() >> 5) & 0x1F);
-#elif i386
-    uint32 accx;
-
-    accx = _get_sw() & 0x3f;
-    accx = ((accx & 1) << 4) | ((accx & 2) >> 1) | ((accx & 4) >> 1) |
-	   (accx & 8) | ((accx & 16) >> 2) | ((accx & 32) >> 5);
-    return(accx);
-#else
-    return(0);
-#warning no fpu trap support for this target
-#endif
-
-}
-
-/* How to clear the accrued exceptions */
-int
-clear_accex()
-{
-#ifdef sparc
-    set_fsr((_get_fsr_raw() & ~0x3e0));
-#elif i386
-    asm("
-.text
-	fnclex
-
-    ");
-#else
-#warning no fpu trap support for this target
-#endif
-}
-
-/* How to map SPARC FSR onto the host */
-int
-set_fsr(fsr)
-uint32 fsr;
-{
-#ifdef sparc
-	_set_fsr_raw(fsr & ~0x0f800000);
-#elif i386
-     uint32 rawfsr;
-
-     fsr >>= 30;
-     switch (fsr) {
-	case 0: 
-	case 2: break;
-	case 1: fsr = 3;
-	case 3: fsr = 1;
-    }
-    rawfsr = _get_cw();
-    rawfsr |= (fsr << 10) | 0x3ff;
-    __setfpucw(rawfsr);
-#else
-#warning no fpu trap support for this target
-#endif
-}
-
-
-/* Host dependent support functions */
-
-#ifdef sparc
-
-    asm("
-
-.text
-        .align 4
-        .global __set_fsr_raw,_set_fsr_raw
-__set_fsr_raw:
-_set_fsr_raw:
-        save %sp,-104,%sp
-        st %i0,[%fp+68]
-        ld [%fp+68], %fsr
-        mov 0,%i0
-        ret
-        restore
- 
-        .align 4
-        .global __get_fsr_raw
-        .global _get_fsr_raw
-__get_fsr_raw:
-_get_fsr_raw:
-        save %sp,-104,%sp
-        st %fsr,[%fp+68]
-        ld [%fp+68], %i0
-        ret
-        restore
- 
-    ");
-
-#elif i386
-	/* both these align statements were 16, not 8 */
-
-    asm("
-
-.text
-        .align 8
-.globl _get_sw,__get_sw
-__get_sw:
-_get_sw:
-        pushl %ebp
-        movl %esp,%ebp
-        movl $0,%eax
-        fnstsw %ax
-        movl %ebp,%esp
-        popl %ebp
-        ret
-
-        .align 8
-.globl _get_cw,__get_cw
-__get_cw:
-_get_cw:
-        pushl %ebp
-        movl %esp,%ebp
-        subw $2,%esp
-        fnstcw -2(%ebp)
-        movw -2(%ebp),%eax
-        movl %ebp,%esp
-        popl %ebp
-        ret
-
-
-    ");
-
-
-#else
-#warning no fpu trap support for this target
-#endif
-
diff --git a/sim/erc32/func.c b/sim/erc32/func.c
deleted file mode 100644
index d2427b7..0000000
--- a/sim/erc32/func.c
+++ /dev/null
@@ -1,1139 +0,0 @@
-/*
- * func.c, misc simulator functions. This file is part of SIS.
- * 
- * SIS, SPARC instruction simulator V1.8 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- * 
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- * 
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- * 
- */
-
-#include <signal.h>
-#include <string.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include "sis.h"
-#include "end.h"
-#include <dis-asm.h>
-#include "sim-config.h"
-
-
-#define	VAL(x)	strtoul(x,(char **)NULL,0)
-
-extern int	current_target_byte_order;
-struct disassemble_info dinfo;
-struct pstate   sregs;
-extern struct estate ebase;
-int             ctrl_c = 0;
-int             sis_verbose = 0;
-char           *sis_version = "2.7.5";
-int             nfp = 0;
-int             ift = 0;
-int             wrp = 0;
-int             rom8 = 0;
-int             uben = 0;
-int		termsave;
-int             sparclite = 0;		/* emulating SPARClite instructions? */
-int             sparclite_board = 0;	/* emulating SPARClite board RAM? */
-char            uart_dev1[128] = "";
-char            uart_dev2[128] = "";
-extern	int	ext_irl;
-uint32		last_load_addr = 0;
-
-#ifdef ERRINJ
-uint32		errcnt = 0;
-uint32		errper = 0;
-uint32		errtt = 0;
-uint32		errftt = 0;
-uint32		errmec = 0;
-#endif
-
-/* Forward declarations */
-
-static int	batch PARAMS ((struct pstate *sregs, char *fname));
-static void	set_rega PARAMS ((struct pstate *sregs, char *reg, uint32 rval));
-static void	disp_reg PARAMS ((struct pstate *sregs, char *reg));
-static uint32	limcalc PARAMS ((float32 freq));
-static void	int_handler PARAMS ((int32 sig));
-static void	init_event PARAMS ((void));
-static int	disp_fpu PARAMS ((struct pstate  *sregs));
-static void	disp_regs PARAMS ((struct pstate  *sregs, int cwp));
-static void	disp_ctrl PARAMS ((struct pstate *sregs));
-static void	disp_mem PARAMS ((uint32 addr, uint32 len));
-
-static int 
-batch(sregs, fname)
-    struct pstate  *sregs;
-    char           *fname;
-{
-    FILE           *fp;
-    char            lbuf[1024];
-
-    if ((fp = fopen(fname, "r")) == NULL) {
-	fprintf(stderr, "couldn't open batch file %s\n", fname);
-	return (0);
-    }
-    while (!feof(fp)) {
-	lbuf[0] = 0;
-	fgets(lbuf, 1023, fp);
-	if ((strlen(lbuf) > 0) && (lbuf[strlen(lbuf) - 1] == '\n'))
-	    lbuf[strlen(lbuf) - 1] = 0;
-	printf("sis> %s\n", lbuf);
-	exec_cmd(sregs, lbuf);
-    }
-    fclose(fp);
-    return (1);
-}
-
-void
-set_regi(sregs, reg, rval)
-    struct pstate  *sregs;
-    int32           reg;
-    uint32          rval;
-{
-    uint32          cwp;
-
-    cwp = ((sregs->psr & 0x7) << 4);
-    if ((reg > 0) && (reg < 8)) {
-	sregs->g[reg] = rval;
-    } else if ((reg >= 8) && (reg < 32)) {
-	sregs->r[(cwp + reg) & 0x7f] = rval;
-    } else if ((reg >= 32) && (reg < 64)) {
-	sregs->fsi[reg - 32] = rval;
-    } else {
-	switch (reg) {
-	case 64:
-	    sregs->y = rval;
-	    break;
-	case 65:
-	    sregs->psr = rval;
-	    break;
-	case 66:
-	    sregs->wim = rval;
-	    break;
-	case 67:
-	    sregs->tbr = rval;
-	    break;
-	case 68:
-	    sregs->pc = rval;
-	    break;
-	case 69:
-	    sregs->npc = rval;
-	    break;
-	case 70:
-	    sregs->fsr = rval;
-	    set_fsr(rval);
-	    break;
-    default:break;
-	}
-    }
-}
-
-void
-get_regi(struct pstate * sregs, int32 reg, char *buf)
-{
-    uint32          cwp;
-    uint32          rval = 0;
-
-    cwp = ((sregs->psr & 0x7) << 4);
-    if ((reg >= 0) && (reg < 8)) {
-	rval = sregs->g[reg];
-    } else if ((reg >= 8) && (reg < 32)) {
-	rval = sregs->r[(cwp + reg) & 0x7f];
-    } else if ((reg >= 32) && (reg < 64)) {
-	rval = sregs->fsi[reg - 32];
-    } else {
-	switch (reg) {
-	case 64:
-	    rval = sregs->y;
-	    break;
-	case 65:
-	    rval = sregs->psr;
-	    break;
-	case 66:
-	    rval = sregs->wim;
-	    break;
-	case 67:
-	    rval = sregs->tbr;
-	    break;
-	case 68:
-	    rval = sregs->pc;
-	    break;
-	case 69:
-	    rval = sregs->npc;
-	    break;
-	case 70:
-	    rval = sregs->fsr;
-	    break;
-    default:break;
-	}
-    }
-    if (current_target_byte_order == BIG_ENDIAN) {
-	buf[0] = (rval >> 24) & 0x0ff;
-	buf[1] = (rval >> 16) & 0x0ff;
-	buf[2] = (rval >> 8) & 0x0ff;
-	buf[3] = rval & 0x0ff;
-    }
-    else {
-	buf[3] = (rval >> 24) & 0x0ff;
-	buf[2] = (rval >> 16) & 0x0ff;
-	buf[1] = (rval >> 8) & 0x0ff;
-	buf[0] = rval & 0x0ff;
-    }
-}
-
-
-static void
-set_rega(sregs, reg, rval)
-    struct pstate  *sregs;
-    char           *reg;
-    uint32          rval;
-{
-    uint32          cwp;
-    int32           err = 0;
-
-    cwp = ((sregs->psr & 0x7) << 4);
-    if (strcmp(reg, "psr") == 0)
-	sregs->psr = (rval = (rval & 0x00f03fff));
-    else if (strcmp(reg, "tbr") == 0)
-	sregs->tbr = (rval = (rval & 0xfffffff0));
-    else if (strcmp(reg, "wim") == 0)
-	sregs->wim = (rval = (rval & 0x0ff));
-    else if (strcmp(reg, "y") == 0)
-	sregs->y = rval;
-    else if (strcmp(reg, "pc") == 0)
-	sregs->pc = rval;
-    else if (strcmp(reg, "npc") == 0)
-	sregs->npc = rval;
-    else if (strcmp(reg, "fsr") == 0) {
-	sregs->fsr = rval;
-	set_fsr(rval);
-    } else if (strcmp(reg, "g0") == 0)
-	err = 2;
-    else if (strcmp(reg, "g1") == 0)
-	sregs->g[1] = rval;
-    else if (strcmp(reg, "g2") == 0)
-	sregs->g[2] = rval;
-    else if (strcmp(reg, "g3") == 0)
-	sregs->g[3] = rval;
-    else if (strcmp(reg, "g4") == 0)
-	sregs->g[4] = rval;
-    else if (strcmp(reg, "g5") == 0)
-	sregs->g[5] = rval;
-    else if (strcmp(reg, "g6") == 0)
-	sregs->g[6] = rval;
-    else if (strcmp(reg, "g7") == 0)
-	sregs->g[7] = rval;
-    else if (strcmp(reg, "o0") == 0)
-	sregs->r[(cwp + 8) & 0x7f] = rval;
-    else if (strcmp(reg, "o1") == 0)
-	sregs->r[(cwp + 9) & 0x7f] = rval;
-    else if (strcmp(reg, "o2") == 0)
-	sregs->r[(cwp + 10) & 0x7f] = rval;
-    else if (strcmp(reg, "o3") == 0)
-	sregs->r[(cwp + 11) & 0x7f] = rval;
-    else if (strcmp(reg, "o4") == 0)
-	sregs->r[(cwp + 12) & 0x7f] = rval;
-    else if (strcmp(reg, "o5") == 0)
-	sregs->r[(cwp + 13) & 0x7f] = rval;
-    else if (strcmp(reg, "o6") == 0)
-	sregs->r[(cwp + 14) & 0x7f] = rval;
-    else if (strcmp(reg, "o7") == 0)
-	sregs->r[(cwp + 15) & 0x7f] = rval;
-    else if (strcmp(reg, "l0") == 0)
-	sregs->r[(cwp + 16) & 0x7f] = rval;
-    else if (strcmp(reg, "l1") == 0)
-	sregs->r[(cwp + 17) & 0x7f] = rval;
-    else if (strcmp(reg, "l2") == 0)
-	sregs->r[(cwp + 18) & 0x7f] = rval;
-    else if (strcmp(reg, "l3") == 0)
-	sregs->r[(cwp + 19) & 0x7f] = rval;
-    else if (strcmp(reg, "l4") == 0)
-	sregs->r[(cwp + 20) & 0x7f] = rval;
-    else if (strcmp(reg, "l5") == 0)
-	sregs->r[(cwp + 21) & 0x7f] = rval;
-    else if (strcmp(reg, "l6") == 0)
-	sregs->r[(cwp + 22) & 0x7f] = rval;
-    else if (strcmp(reg, "l7") == 0)
-	sregs->r[(cwp + 23) & 0x7f] = rval;
-    else if (strcmp(reg, "i0") == 0)
-	sregs->r[(cwp + 24) & 0x7f] = rval;
-    else if (strcmp(reg, "i1") == 0)
-	sregs->r[(cwp + 25) & 0x7f] = rval;
-    else if (strcmp(reg, "i2") == 0)
-	sregs->r[(cwp + 26) & 0x7f] = rval;
-    else if (strcmp(reg, "i3") == 0)
-	sregs->r[(cwp + 27) & 0x7f] = rval;
-    else if (strcmp(reg, "i4") == 0)
-	sregs->r[(cwp + 28) & 0x7f] = rval;
-    else if (strcmp(reg, "i5") == 0)
-	sregs->r[(cwp + 29) & 0x7f] = rval;
-    else if (strcmp(reg, "i6") == 0)
-	sregs->r[(cwp + 30) & 0x7f] = rval;
-    else if (strcmp(reg, "i7") == 0)
-	sregs->r[(cwp + 31) & 0x7f] = rval;
-    else
-	err = 1;
-    switch (err) {
-    case 0:
-	printf("%s = %d (0x%08x)\n", reg, rval, rval);
-	break;
-    case 1:
-	printf("no such regiser: %s\n", reg);
-	break;
-    case 2:
-	printf("cannot set g0\n");
-	break;
-    default:
-	break;
-    }
-
-}
-
-static void
-disp_reg(sregs, reg)
-    struct pstate  *sregs;
-    char           *reg;
-{
-    if (strncmp(reg, "w",1) == 0)
-	disp_regs(sregs, VAL(&reg[1]));
-}
-
-#ifdef ERRINJ
-
-void
-errinj()
-{
-    int	err;
-
-    switch (err = (random() % 12)) {
-	case 0: errtt = 0x61; break;
-	case 1: errtt = 0x62; break;
-	case 2: errtt = 0x63; break;
-	case 3: errtt = 0x64; break;
-	case 4: errtt = 0x65; break;
-	case 5: 
-	case 6: 
-	case 7: errftt = err; 
-		break;
-	case 8: errmec = 1; break;
-	case 9: errmec = 2; break;
-	case 10: errmec = 5; break;
-	case 11: errmec = 6; break;
-    }
-    errcnt++;
-    if (errper) event(errinj, 0, (random()%errper));
-}
-
-void
-errinjstart()
-{
-    if (errper) event(errinj, 0, (random()%errper));
-}
-
-#endif
-
-static uint32
-limcalc (freq)
-    float32		freq;
-{
-    uint32          unit, lim;
-    double	    flim;
-    char           *cmd1, *cmd2;
-
-    unit = 1;
-    lim = -1;
-    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-        lim = VAL(cmd1);
-        if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
-            if (strcmp(cmd2,"us")==0) unit = 1;
-      	    if (strcmp(cmd2,"ms")==0) unit = 1000;
-            if (strcmp(cmd2,"s")==0)  unit = 1000000;
-        }
-        flim = (double) lim * (double) unit * (double) freq + 
-	   (double) ebase.simtime;
-        if ((flim > ebase.simtime) && (flim < 4294967296.0)) {
-            lim = (uint32) flim;
-        } else  {
-            printf("error in expression\n");
-            lim = -1;
-        }
-    }
-    return (lim);
-}
-    
-int
-exec_cmd(sregs, cmd)
-    char           *cmd;
-    struct pstate  *sregs;
-{
-    char           *cmd1, *cmd2;
-    int32           stat;
-    uint32          len, i, clen, j;
-    static uint32   daddr = 0;
-    char           *cmdsave;
-
-    stat = OK;
-    cmdsave = strdup(cmd);
-    if ((cmd1 = strtok(cmd, " \t")) != NULL) {
-	clen = strlen(cmd1);
-	if (strncmp(cmd1, "bp", clen) == 0) {
-	    for (i = 0; i < sregs->bptnum; i++) {
-		printf("  %d : 0x%08x\n", i + 1, sregs->bpts[i]);
-	    }
-	} else if (strncmp(cmd1, "+bp", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		sregs->bpts[sregs->bptnum] = VAL(cmd1) & ~0x3;
-		printf("added breakpoint %d at 0x%08x\n",
-		       sregs->bptnum + 1, sregs->bpts[sregs->bptnum]);
-		sregs->bptnum += 1;
-	    }
-	} else if (strncmp(cmd1, "-bp", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		i = VAL(cmd1) - 1;
-		if ((i >= 0) && (i < sregs->bptnum)) {
-		    printf("deleted breakpoint %d at 0x%08x\n", i + 1,
-			   sregs->bpts[i]);
-		    for (; i < sregs->bptnum - 1; i++) {
-			sregs->bpts[i] = sregs->bpts[i + 1];
-		    }
-		    sregs->bptnum -= 1;
-		}
-	    }
-	} else if (strncmp(cmd1, "batch", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
-		printf("no file specified\n");
-	    } else {
-		batch(sregs, cmd1);
-	    }
-	} else if (strncmp(cmd1, "cont", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
-		stat = run_sim(sregs, -1, 0);
-	    } else {
-		stat = run_sim(sregs, VAL(cmd1), 0);
-	    }
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "debug", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		sis_verbose = VAL(cmd1);
-	    }
-	    printf("Debug level = %d\n",sis_verbose);
-	} else if (strncmp(cmd1, "dis", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		daddr = VAL(cmd1);
-	    }
-	    if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
-		len = VAL(cmd2);
-	    } else
-		len = 16;
-	    printf("\n");
-	    dis_mem(daddr, len, &dinfo);
-	    printf("\n");
-	    daddr += len * 4;
-	} else if (strncmp(cmd1, "echo", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		printf("%s\n", (&cmdsave[clen+1]));
-	    }
-#ifdef ERRINJ
-	} else if (strncmp(cmd1, "error", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		errper = VAL(cmd1);
-	        if (errper) {
-		    event(errinj, 0, (len = (random()%errper)));
-		    printf("Error injection started with period %d\n",len);
-	        } 
-	     } else printf("Injected errors: %d\n",errcnt);
-#endif
-	} else if (strncmp(cmd1, "float", clen) == 0) {
-	    stat = disp_fpu(sregs);
-	} else if (strncmp(cmd1, "go", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
-		len = last_load_addr;
-	    } else {
-		len = VAL(cmd1);
-	    }
-	    sregs->pc = len & ~3;
-	    sregs->npc = sregs->pc + 4;
-	    printf("resuming at 0x%08x\n",sregs->pc);
-	    if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
-		stat = run_sim(sregs, VAL(cmd2), 0);
-	    } else {
-		stat = run_sim(sregs, -1, 0);
-	    }
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "help", clen) == 0) {
-	    gen_help();
-	} else if (strncmp(cmd1, "history", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		sregs->histlen = VAL(cmd1);
-		if (sregs->histbuf != NULL)
-		    free(sregs->histbuf);
-		sregs->histbuf = (struct histype *) calloc(sregs->histlen, sizeof(struct histype));
-		printf("trace history length = %d\n\r", sregs->histlen);
-		sregs->histind = 0;
-
-	    } else {
-		j = sregs->histind;
-		for (i = 0; i < sregs->histlen; i++) {
-		    if (j >= sregs->histlen)
-			j = 0;
-		    printf(" %8d ", sregs->histbuf[j].time);
-		    dis_mem(sregs->histbuf[j].addr, 1, &dinfo);
-		    j++;
-		}
-	    }
-
-	} else if (strncmp(cmd1, "load", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		last_load_addr = bfd_load(cmd1);
-		while ((cmd1 = strtok(NULL, " \t\n\r")) != NULL)
-		    last_load_addr = bfd_load(cmd1);
-	    } else {
-		printf("load: no file specified\n");
-	    }
-	} else if (strncmp(cmd1, "mem", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL)
-		daddr = VAL(cmd1);
-	    if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL)
-		len = VAL(cmd2);
-	    else
-		len = 64;
-	    disp_mem(daddr, len);
-	    daddr += len;
-	} else if (strncmp(cmd1, "perf", clen) == 0) {
-	    cmd1 = strtok(NULL, " \t\n\r");
-	    if ((cmd1 != NULL) &&
-		(strncmp(cmd1, "reset", strlen(cmd1)) == 0)) {
-		reset_stat(sregs);
-	    } else
-		show_stat(sregs);
-	} else if (strncmp(cmd1, "quit", clen) == 0) {
-	    exit(0);
-	} else if (strncmp(cmd1, "reg", clen) == 0) {
-	    cmd1 = strtok(NULL, " \t\n\r");
-	    cmd2 = strtok(NULL, " \t\n\r");
-	    if (cmd2 != NULL)
-		set_rega(sregs, cmd1, VAL(cmd2));
-	    else if (cmd1 != NULL)
-		disp_reg(sregs, cmd1);
-	    else {
-		disp_regs(sregs,sregs->psr);
-		disp_ctrl(sregs);
-	    }
-	} else if (strncmp(cmd1, "reset", clen) == 0) {
-	    ebase.simtime = 0;
-	    reset_all();
-	    reset_stat(sregs);
-	} else if (strncmp(cmd1, "run", clen) == 0) {
-	    ebase.simtime = 0;
-	    reset_all();
-	    reset_stat(sregs);
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
-		stat = run_sim(sregs, -1, 0);
-	    } else {
-		stat = run_sim(sregs, VAL(cmd1), 0);
-	    }
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "shell", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) != NULL) {
-		system(&cmdsave[clen]);
-	    }
-	} else if (strncmp(cmd1, "step", clen) == 0) {
-	    stat = run_sim(sregs, 1, 1);
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "tcont", clen) == 0) {
-	    sregs->tlimit = limcalc(sregs->freq);
-	    stat = run_sim(sregs, -1, 0);
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "tgo", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
-		len = last_load_addr;
-	    } else {
-		len = VAL(cmd1);
-	        sregs->tlimit = limcalc(sregs->freq);
-	    }
-	    sregs->pc = len & ~3;
-	    sregs->npc = sregs->pc + 4;
-	    printf("resuming at 0x%08x\n",sregs->pc);
-	    stat = run_sim(sregs, -1, 0);
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "tlimit", clen) == 0) {
-	   sregs->tlimit = limcalc(sregs->freq);
-	   if (sregs->tlimit != (uint32) -1)
-              printf("simulation limit = %u (%.3f ms)\n",(uint32) sregs->tlimit,
-		sregs->tlimit / sregs->freq / 1000);
-	} else if (strncmp(cmd1, "tra", clen) == 0) {
-	    if ((cmd1 = strtok(NULL, " \t\n\r")) == NULL) {
-		stat = run_sim(sregs, -1, 1);
-	    } else {
-		stat = run_sim(sregs, VAL(cmd1), 1);
-	    }
-	    printf("\n");
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else if (strncmp(cmd1, "trun", clen) == 0) {
-	    ebase.simtime = 0;
-	    reset_all();
-	    reset_stat(sregs);
-	    sregs->tlimit = limcalc(sregs->freq);
-	    stat = run_sim(sregs, -1, 0);
-	    daddr = sregs->pc;
-	    sim_halt();
-	} else
-	    printf("syntax error\n");
-    }
-    if (cmdsave != NULL)
-	free(cmdsave);
-    return (stat);
-}
-
-
-void
-reset_stat(sregs)
-    struct pstate  *sregs;
-{
-    sregs->tottime = 0;
-    sregs->pwdtime = 0;
-    sregs->ninst = 0;
-    sregs->fholdt = 0;
-    sregs->holdt = 0;
-    sregs->icntt = 0;
-    sregs->finst = 0;
-    sregs->nstore = 0;
-    sregs->nload = 0;
-    sregs->nbranch = 0;
-    sregs->simstart = ebase.simtime;
-
-}
-
-void
-show_stat(sregs)
-    struct pstate  *sregs;
-{
-    uint32          iinst;
-    uint32          stime, tottime;
-
-    if (sregs->tottime == 0) tottime = 1; else tottime = sregs->tottime;
-    stime = ebase.simtime - sregs->simstart;	/* Total simulated time */
-#ifdef STAT
-
-    iinst = sregs->ninst - sregs->finst - sregs->nload - sregs->nstore -
-	sregs->nbranch;
-#endif
-
-    printf("\n Cycles       : %9d\n\r", ebase.simtime - sregs->simstart);
-    printf(" Instructions : %9d\n", sregs->ninst);
-
-#ifdef STAT
-    printf("   integer    : %9.2f %%\n", 100.0 * (float) iinst / (float) sregs->ninst);
-    printf("   load       : %9.2f %%\n",
-	   100.0 * (float) sregs->nload / (float) sregs->ninst);
-    printf("   store      : %9.2f %%\n",
-	   100.0 * (float) sregs->nstore / (float) sregs->ninst);
-    printf("   branch     : %9.2f %%\n",
-	   100.0 * (float) sregs->nbranch / (float) sregs->ninst);
-    printf("   float      : %9.2f %%\n",
-	   100.0 * (float) sregs->finst / (float) sregs->ninst);
-    printf(" Integer CPI  : %9.2f\n",
-	   ((float) (stime - sregs->pwdtime - sregs->fholdt - sregs->finst))
-	   /
-	   (float) (sregs->ninst - sregs->finst));
-    printf(" Float CPI    : %9.2f\n",
-	   ((float) sregs->fholdt / (float) sregs->finst) + 1.0);
-#endif
-    printf(" Overall CPI  : %9.2f\n",
-	   (float) (stime - sregs->pwdtime) / (float) sregs->ninst);
-    printf("\n ERC32 performance (%4.1f MHz): %5.2f MOPS (%5.2f MIPS, %5.2f MFLOPS)\n",
-	   sregs->freq, sregs->freq * (float) sregs->ninst / (float) (stime - sregs->pwdtime),
-	   sregs->freq * (float) (sregs->ninst - sregs->finst) /
-	   (float) (stime - sregs->pwdtime),
-     sregs->freq * (float) sregs->finst / (float) (stime - sregs->pwdtime));
-    printf(" Simulated ERC32 time        : %5.2f ms\n", (float) (ebase.simtime - sregs->simstart) / 1000.0 / sregs->freq);
-    printf(" Processor utilisation       : %5.2f %%\n", 100.0 * (1.0 - ((float) sregs->pwdtime / (float) stime)));
-    printf(" Real-time / simulator-time  : 1/%.2f \n",
-      ((float) sregs->tottime) / ((float) (stime) / (sregs->freq * 1.0E6)));
-    printf(" Simulator performance       : %d KIPS\n",sregs->ninst/tottime/1000);
-    printf(" Used time (sys + user)      : %3d s\n\n", sregs->tottime);
-}
-
-
-
-void
-init_bpt(sregs)
-    struct pstate  *sregs;
-{
-    sregs->bptnum = 0;
-    sregs->histlen = 0;
-    sregs->histind = 0;
-    sregs->histbuf = NULL;
-    sregs->tlimit = -1;
-}
-
-static void
-int_handler(sig)
-    int32           sig;
-{
-    if (sig != 2)
-	printf("\n\n Signal handler error  (%d)\n\n", sig);
-    ctrl_c = 1;
-}
-
-void
-init_signals()
-{
-    typedef void    (*PFI) ();
-    static PFI      int_tab[2];
-
-    int_tab[0] = signal(SIGTERM, int_handler);
-    int_tab[1] = signal(SIGINT, int_handler);
-}
-
-
-extern struct disassemble_info dinfo;
-
-struct estate   ebase;
-struct evcell   evbuf[EVENT_MAX];
-struct irqcell  irqarr[16];
-
-static int
-disp_fpu(sregs)
-    struct pstate  *sregs;
-{
-
-    int         i;
-    float	t;
-
-    printf("\n fsr: %08X\n\n", sregs->fsr);
-
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
-    for (i = 0; i < 32; i++)
-      sregs->fdp[i ^ 1] = sregs->fs[i];
-#endif
-
-    for (i = 0; i < 32; i++) {
-	t = sregs->fs[i];
-	printf(" f%02d  %08x  %14e  ", i, sregs->fsi[i], sregs->fs[i]);
-	if (!(i & 1))
-	    printf("%14e\n", sregs->fd[i >> 1]);
-	else
-	    printf("\n");
-    }
-    printf("\n");
-    return (OK);
-}
-
-static void
-disp_regs(sregs,cwp)
-    struct pstate  *sregs;
-    int cwp;
-{
-
-    int           i;
-
-    cwp = ((cwp & 0x7) << 4);
-    printf("\n\t  INS       LOCALS      OUTS     GLOBALS\n");
-    for (i = 0; i < 8; i++) {
-	printf("   %d:  %08X   %08X   %08X   %08X\n", i,
-	       sregs->r[(cwp + i + 24) & 0x7f],
-	    sregs->r[(cwp + i + 16) & 0x7f], sregs->r[(cwp + i + 8) & 0x7f],
-	       sregs->g[i]);
-    }
-}
-
-static void
-disp_ctrl(sregs)
-    struct pstate  *sregs;
-{
-
-    unsigned char           i[4];
-
-    printf("\n psr: %08X   wim: %08X   tbr: %08X   y: %08X\n",
-	   sregs->psr, sregs->wim, sregs->tbr, sregs->y);
-    sis_memory_read(sregs->pc, i, 4);
-    printf("\n  pc: %08X = %02X%02X%02X%02X    ", sregs->pc,i[0],i[1],i[2],i[3]);
-    print_insn_sparc(sregs->pc, &dinfo);
-    sis_memory_read(sregs->npc, i, 4);
-    printf("\n npc: %08X = %02X%02X%02X%02X    ",sregs->npc,i[0],i[1],i[2],i[3]);
-    print_insn_sparc(sregs->npc, &dinfo);
-    if (sregs->err_mode)
-	printf("\n IU in error mode");
-    printf("\n\n");
-}
-
-static void
-disp_mem(addr, len)
-    uint32          addr;
-    uint32          len;
-{
-
-    uint32          i;
-    unsigned char   data[4];
-    uint32          mem[4], j;
-    char           *p;
-
-    for (i = addr & ~3; i < ((addr + len) & ~3); i += 16) {
-	printf("\n %8X  ", i);
-	for (j = 0; j < 4; j++) {
-	    sis_memory_read((i + (j * 4)), data, 4);
-	    printf("%02x%02x%02x%02x  ", data[0],data[1],data[2],data[3]);
-	    mem[j] = *((int *) &data);
-	}
-	printf("  ");
-	p = (char *) mem;
-	for (j = 0; j < 16; j++) {
-	    if (isprint(p[j]))
-		putchar(p[j]);
-	    else
-		putchar('.');
-	}
-    }
-    printf("\n\n");
-}
-
-void
-dis_mem(addr, len, info)
-    uint32          addr;
-    uint32          len;
-    struct disassemble_info *info;
-{
-    uint32          i;
-    unsigned char   data[4];
-
-    for (i = addr & -3; i < ((addr & -3) + (len << 2)); i += 4) {
-	sis_memory_read(i, data, 4);
-	printf(" %08x  %02x%02x%02x%02x  ", i, data[0],data[1],data[2],data[3]);
-	print_insn_sparc(i, info);
-        if (i >= 0xfffffffc) break;
-	printf("\n");
-    }
-}
-
-int
-buffer_read_memory(addr, buffer, size, info)
-    bfd_vma         addr;
-    bfd_byte       *buffer;
-    int32           size;
-    struct disassemble_info *info;
-{
-    if (size == sis_memory_read(addr, buffer, size))
-	return (0);
-    else
-	return (1);
-}
-
-void
-perror_memory(status, addr, info)
-    int32           status;
-    bfd_vma         addr;
-    struct disassemble_info *info;
-{
-
-    printf("Could not read address 0x%08x\n", (unsigned int) addr);
-}
-
-void
-generic_print_address(addr, info)
-    bfd_vma         addr;
-    struct disassemble_info *info;
-{
-
-    printf("0x%x", (unsigned int) addr);
-}
-
-/* Just return the given address.  */
-
-int
-generic_symbol_at_address (addr, info)
-     bfd_vma addr;
-     struct disassemble_info * info;
-{
-  return 1;
-}
-
-
-/* Add event to event queue */
-
-void
-event(cfunc, arg, delta)
-    void            (*cfunc) ();
-    int32           arg;
-    uint32          delta;
-{
-    struct evcell  *ev1, *evins;
-
-    if (ebase.freeq == NULL) {
-	printf("Error, too many events in event queue\n");
-	return;
-    }
-    ev1 = &ebase.eq;
-    delta += ebase.simtime;
-    while ((ev1->nxt != NULL) && (ev1->nxt->time <= delta)) {
-	ev1 = ev1->nxt;
-    }
-    if (ev1->nxt == NULL) {
-	ev1->nxt = ebase.freeq;
-	ebase.freeq = ebase.freeq->nxt;
-	ev1->nxt->nxt = NULL;
-    } else {
-	evins = ebase.freeq;
-	ebase.freeq = ebase.freeq->nxt;
-	evins->nxt = ev1->nxt;
-	ev1->nxt = evins;
-    }
-    ev1->nxt->time = delta;
-    ev1->nxt->cfunc = cfunc;
-    ev1->nxt->arg = arg;
-}
-
-#if 0	/* apparently not used */
-void
-stop_event()
-{
-}
-#endif
-
-void
-init_event()
-{
-    int32           i;
-
-    ebase.eq.nxt = NULL;
-    ebase.freeq = evbuf;
-    for (i = 0; i < EVENT_MAX; i++) {
-	evbuf[i].nxt = &evbuf[i + 1];
-    }
-    evbuf[EVENT_MAX - 1].nxt = NULL;
-}
-
-void
-set_int(level, callback, arg)
-    int32           level;
-    void            (*callback) ();
-    int32           arg;
-{
-    irqarr[level & 0x0f].callback = callback;
-    irqarr[level & 0x0f].arg = arg;
-}
-
-/* Advance simulator time */
-
-void
-advance_time(sregs)
-    struct pstate  *sregs;
-{
-
-    struct evcell  *evrem;
-    void            (*cfunc) ();
-    uint32          arg, endtime;
-
-#ifdef STAT
-    sregs->fholdt += sregs->fhold;
-    sregs->holdt += sregs->hold;
-    sregs->icntt += sregs->icnt;
-#endif
-
-    endtime = ebase.simtime + sregs->icnt + sregs->hold + sregs->fhold;
-
-    while ((ebase.eq.nxt->time <= (endtime)) && (ebase.eq.nxt != NULL)) {
-	ebase.simtime = ebase.eq.nxt->time;
-	cfunc = ebase.eq.nxt->cfunc;
-	arg = ebase.eq.nxt->arg;
-	evrem = ebase.eq.nxt;
-	ebase.eq.nxt = ebase.eq.nxt->nxt;
-	evrem->nxt = ebase.freeq;
-	ebase.freeq = evrem;
-	cfunc(arg);
-    }
-    ebase.simtime = endtime;
-
-}
-
-uint32
-now()
-{
-    return(ebase.simtime);
-}
-
-
-/* Advance time until an external interrupt is seen */
-
-int
-wait_for_irq()
-{
-    struct evcell  *evrem;
-    void            (*cfunc) ();
-    int32           arg, endtime;
-
-    if (ebase.eq.nxt == NULL)
-	printf("Warning: event queue empty - power-down mode not entered\n");
-    endtime = ebase.simtime;
-    while (!ext_irl && (ebase.eq.nxt != NULL)) {
-	ebase.simtime = ebase.eq.nxt->time;
-	cfunc = ebase.eq.nxt->cfunc;
-	arg = ebase.eq.nxt->arg;
-	evrem = ebase.eq.nxt;
-	ebase.eq.nxt = ebase.eq.nxt->nxt;
-	evrem->nxt = ebase.freeq;
-	ebase.freeq = evrem;
-	cfunc(arg);
-	if (ctrl_c) {
-	    printf("\bwarning: power-down mode interrupted\n");
-	    break;
-	}
-    }
-    sregs.pwdtime += ebase.simtime - endtime;
-    return (ebase.simtime - endtime);
-}
-
-int
-check_bpt(sregs)
-    struct pstate  *sregs;
-{
-    int32           i;
-
-    if ((sregs->bphit) || (sregs->annul))
-	return (0);
-    for (i = 0; i < (int32) sregs->bptnum; i++) {
-	if (sregs->pc == sregs->bpts[i])
-	    return (BPT_HIT);
-    }
-    return (0);
-}
-
-void
-reset_all()
-{
-    init_event();		/* Clear event queue */
-    init_regs(&sregs);
-    reset();
-#ifdef ERRINJ
-    errinjstart();
-#endif
-}
-
-void
-sys_reset()
-{
-    reset_all();
-    sregs.trap = 256;		/* Force fake reset trap */
-}
-
-void
-sys_halt()
-{
-    sregs.trap = 257;           /* Force fake halt trap */
-}
-
-#include "ansidecl.h"
-
-#ifdef ANSI_PROTOTYPES
-#include <stdarg.h>
-#else
-#include <varargs.h>
-#endif
-
-#include "libiberty.h"
-#include "bfd.h"
-
-#define min(A, B) (((A) < (B)) ? (A) : (B))
-#define LOAD_ADDRESS 0
-
-int
-bfd_load(fname)
-    char           *fname;
-{
-    asection       *section;
-    bfd            *pbfd;
-    const bfd_arch_info_type *arch;
-
-    pbfd = bfd_openr(fname, 0);
-
-    if (pbfd == NULL) {
-	printf("open of %s failed\n", fname);
-	return (-1);
-    }
-    if (!bfd_check_format(pbfd, bfd_object)) {
-	printf("file %s  doesn't seem to be an object file\n", fname);
-	return (-1);
-    }
-
-    arch = bfd_get_arch_info (pbfd);
-    if (bfd_little_endian (pbfd) || arch->mach == bfd_mach_sparc_sparclite_le)
-        current_target_byte_order = LITTLE_ENDIAN;
-    else
-	current_target_byte_order = BIG_ENDIAN;
-    if (sis_verbose)
-	printf("file %s is little-endian.\n", fname);
-
-    if (sis_verbose)
-	printf("loading %s:", fname);
-    for (section = pbfd->sections; section; section = section->next) {
-	if (bfd_get_section_flags(pbfd, section) & SEC_ALLOC) {
-	    bfd_vma         section_address;
-	    unsigned long   section_size;
-	    const char     *section_name;
-
-	    section_name = bfd_get_section_name(pbfd, section);
-
-	    section_address = bfd_get_section_vma(pbfd, section);
-	    /*
-	     * Adjust sections from a.out files, since they don't carry their
-	     * addresses with.
-	     */
-	    if (bfd_get_flavour(pbfd) == bfd_target_aout_flavour)
-		section_address += bfd_get_start_address (pbfd);
-	    section_size = bfd_section_size(pbfd, section);
-
-	    if (sis_verbose)
-		printf("\nsection %s at 0x%08lx (%ld bytes)",
-		       section_name, section_address, section_size);
-
-	    /* Text, data or lit */
-	    if (bfd_get_section_flags(pbfd, section) & SEC_LOAD) {
-		file_ptr        fptr;
-
-		fptr = 0;
-
-		while (section_size > 0) {
-		    char            buffer[1024];
-		    int             count;
-
-		    count = min(section_size, 1024);
-
-		    bfd_get_section_contents(pbfd, section, buffer, fptr, count);
-
-		    sis_memory_write(section_address, buffer, count);
-
-		    section_address += count;
-		    fptr += count;
-		    section_size -= count;
-		}
-	    } else		/* BSS */
-		if (sis_verbose)
-		    printf("(not loaded)");
-	}
-    }
-    if (sis_verbose)
-	printf("\n");
-
-    return(bfd_get_start_address (pbfd));
-}
diff --git a/sim/erc32/help.c b/sim/erc32/help.c
deleted file mode 100644
index 8f57d8e..0000000
--- a/sim/erc32/help.c
+++ /dev/null
@@ -1,30 +0,0 @@
-usage()
-{
-
-    printf("usage: sis [-uart1 uart_device1] [-uart2 uart_device2]\n");
-    printf("[-nfp] [-freq frequency] [-c batch_file] [files]\n");
-}
-
-gen_help()
-{
-
-  printf("\n batch <file>          execute a batch file of SIS commands\n");
-    printf(" +bp <addr>            add a breakpoint at <addr>\n");
-    printf(" -bp <num>             delete breakpoint <num>\n");
-    printf(" bp                    print all breakpoints\n");
-    printf(" cont [icnt]           continue execution for [icnt] instructions\n");
-    printf(" dis [addr] [count]    disassemble [count] instructions at address [addr]\n");
-    printf(" echo <string>         print <string> to the simulator window\n");
-    printf(" float                 print the FPU registers\n");
-    printf(" go <addr> [icnt]      start execution at <addr> for [icnt] instructions\n");
-    printf(" hist [trace_length]   enable/show trace history\n");
-    printf(" load  <file_name>     load a file into simulator memory\n");
-    printf(" mem [addr] [count]    display memory at [addr] for [count] bytes\n");
-    printf(" quit                  exit the simulator\n");
-    printf(" perf [reset]          show/reset performance statistics\n");
-    printf(" reg [w<0-7>]          show integer registers (or windows, eg 're w2')\n");
-    printf(" run [inst_count]      reset and start execution for [icnt] instruction\n");
-    printf(" step                  single step\n");
-    printf(" tra [inst_count]      trace [inst_count] instructions\n");
-    printf("\n type Ctrl-C to interrupt execution\n\n");
-}
diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c
deleted file mode 100644
index d4a84c3..0000000
--- a/sim/erc32/interf.c
+++ /dev/null
@@ -1,498 +0,0 @@
-/*
- * This file is part of SIS.
- * 
- * SIS, SPARC instruction simulator V1.6 Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- * 
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- * 
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- * 
- */
-
-#include <signal.h>
-#include <string.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <time.h>
-#include <sys/fcntl.h>
-#include "sis.h"
-#include "bfd.h"
-#include <dis-asm.h>
-#include "sim-config.h"
-
-#include "remote-sim.h"
-
-#ifndef fprintf
-extern          fprintf();
-#endif
-
-#define PSR_CWP 0x7
-
-#define	VAL(x)	strtol(x,(char **)NULL,0)
-
-extern char   **buildargv(char *input);
-
-extern struct disassemble_info dinfo;
-extern struct pstate sregs;
-extern struct estate ebase;
-
-extern int	current_target_byte_order;
-extern int      ctrl_c;
-extern int      nfp;
-extern int      ift;
-extern int      rom8;
-extern int      wrp;
-extern int      uben;
-extern int      sis_verbose;
-extern char    *sis_version;
-extern struct estate ebase;
-extern struct evcell evbuf[];
-extern struct irqcell irqarr[];
-extern int      irqpend, ext_irl;
-extern int      sparclite;
-extern int      sparclite_board;
-extern int      termsave;
-extern char     uart_dev1[], uart_dev2[];
-
-int             sis_gdb_break = 1;
-
-host_callback *sim_callback;
-
-int
-run_sim(sregs, icount, dis)
-    struct pstate  *sregs;
-    unsigned int    icount;
-    int             dis;
-{
-    int             mexc;
-
-    if (sis_verbose)
-	(*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n",
-					  sregs->pc);
-   init_stdio();
-   sregs->starttime = time(NULL);
-   while (!sregs->err_mode & (icount > 0)) {
-
-	sregs->fhold = 0;
-	sregs->hold = 0;
-	sregs->icnt = 1;
-
-	check_interrupts(sregs);
-	if (sregs->trap) {
-	    sregs->err_mode = execute_trap(sregs);
-	} else {
-	    if (sregs->psr & 0x080)
-		sregs->asi = 8;
-	    else
-		sregs->asi = 9;
-
-#if 0	/* DELETE ME! for debugging purposes only */
-	    printf("pc = %08x, npc = %08x\n", sregs->pc, sregs->npc);
-	    if (sregs->pc == 0 || sregs->npc == 0)
-		printf ("bogus pc or npc\n");
-#endif
-	    mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst,
-			       2, &sregs->hold);
-	    if (sregs->annul) {
-		sregs->annul = 0;
-		sregs->icnt = 1;
-		sregs->pc = sregs->npc;
-		sregs->npc = sregs->npc + 4;
-	    } else {
-		if (mexc) {
-		    sregs->trap = I_ACC_EXC;
-		} else {
-		    if ((sis_gdb_break) && (sregs->inst == 0x91d02001)) {
-			if (sis_verbose)
-			    (*sim_callback->printf_filtered) (sim_callback,
-							      "SW BP hit at %x\n", sregs->pc);
-                        sim_halt();
-			restore_stdio();
-			clearerr(stdin);
-			return (BPT_HIT);
-		    } else
-			dispatch_instruction(sregs);
-		}
-		icount--;
-	    }
-	    if (sregs->trap) {
-		sregs->err_mode = execute_trap(sregs);
-	    }
-	}
-	advance_time(sregs);
-	if (ctrl_c) {
-	    icount = 0;
-	}
-    }
-    sim_halt();
-    sregs->tottime += time(NULL) - sregs->starttime;
-    restore_stdio();
-    clearerr(stdin);
-    if (sregs->err_mode)
-	error_mode(sregs->pc);
-    if (sregs->err_mode)
-	return (ERROR);
-    if (sregs->bphit) {
-	if (sis_verbose)
-	    (*sim_callback->printf_filtered) (sim_callback,
-					      "HW BP hit at %x\n", sregs->pc);
-	return (BPT_HIT);
-    }
-    if (ctrl_c) {
-	ctrl_c = 0;
-	return (CTRL_C);
-    }
-    return (TIME_OUT);
-}
-
-void
-sim_set_callbacks (ptr)
-     host_callback *ptr;
-{
-  sim_callback = ptr;
-}
-
-void
-sim_size (memsize)
-     int memsize;
-{
-}
-
-SIM_DESC
-sim_open (kind, callback, abfd, argv)
-     SIM_OPEN_KIND kind;
-     struct host_callback_struct *callback;
-     struct _bfd *abfd;
-     char **argv;
-{
-
-    int             argc = 0;
-    int             stat = 1;
-    int             freq = 0;
-
-    sim_callback = callback;
-
-    while (argv[argc])
-      argc++;
-    while (stat < argc) {
-	if (argv[stat][0] == '-') {
-	    if (strcmp(argv[stat], "-v") == 0) {
-		sis_verbose = 1;
-	    } else
-	    if (strcmp(argv[stat], "-nfp") == 0) {
-		nfp = 1;
-	    } else
-            if (strcmp(argv[stat], "-ift") == 0) {
-                ift = 1;
-	    } else
-	    if (strcmp(argv[stat], "-sparclite") == 0) {
-		sparclite = 1;
-	    } else
-	    if (strcmp(argv[stat], "-sparclite-board") == 0) {
-		sparclite_board = 1;
-	    } else
-            if (strcmp(argv[stat], "-wrp") == 0) {
-                wrp = 1;
-	    } else
-            if (strcmp(argv[stat], "-rom8") == 0) {
-                rom8 = 1;
-	    } else 
-            if (strcmp(argv[stat], "-uben") == 0) {
-                uben = 1;
-	    } else 
-	    if (strcmp(argv[stat], "-uart1") == 0) {
-		if ((stat + 1) < argc)
-		    strcpy(uart_dev1, argv[++stat]);
-	    } else
-	    if (strcmp(argv[stat], "-uart2") == 0) {
-		if ((stat + 1) < argc)
-		    strcpy(uart_dev2, argv[++stat]);
-	    } else
-	    if (strcmp(argv[stat], "-nogdb") == 0) {
-		sis_gdb_break = 0;
-	    } else
-	    if (strcmp(argv[stat], "-freq") == 0) {
-		if ((stat + 1) < argc) {
-		    freq = VAL(argv[++stat]);
-		}
-	    } else {
-		(*sim_callback->printf_filtered) (sim_callback,
-						  "unknown option %s\n",
-						  argv[stat]);
-	    }
-	} else
-	    bfd_load(argv[stat]);
-	stat++;
-    }
-
-    if (sis_verbose) {
-	(*sim_callback->printf_filtered) (sim_callback, "\n SIS - SPARC instruction simulator %s\n", sis_version);
-	(*sim_callback->printf_filtered) (sim_callback, " Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
-	if (nfp)
-	  (*sim_callback->printf_filtered) (sim_callback, "no FPU\n");
-	if (sparclite)
-	  (*sim_callback->printf_filtered) (sim_callback, "simulating Sparclite\n");
-	if (sis_gdb_break == 0)
-	  (*sim_callback->printf_filtered) (sim_callback, "disabling GDB trap handling for breakpoints\n");
-	if (freq)
-	  (*sim_callback->printf_filtered) (sim_callback, " ERC32 freq %d Mhz\n", freq);
-    }
-
-    sregs.freq = freq ? freq : 15;
-    termsave = fcntl(0, F_GETFL, 0);
-    INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf);
-    dinfo.endian = BFD_ENDIAN_BIG;
-    reset_all();
-    ebase.simtime = 0;
-    init_sim();
-    init_bpt(&sregs);
-    reset_stat(&sregs);
-
-    /* Fudge our descriptor for now.  */
-    return (SIM_DESC) 1;
-}
-
-void
-sim_close(sd, quitting)
-     SIM_DESC sd;
-     int quitting;
-{
-
-    exit_sim();
-    fcntl(0, F_SETFL, termsave);
-
-};
-
-SIM_RC
-sim_load(sd, prog, abfd, from_tty)
-     SIM_DESC sd;
-     char *prog;
-     bfd *abfd;
-     int from_tty;
-{
-    bfd_load (prog);
-    return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior(sd, abfd, argv, env)
-     SIM_DESC sd;
-     struct _bfd *abfd;
-     char **argv;
-     char **env;
-{
-    bfd_vma start_address = 0;
-    if (abfd != NULL)
-      start_address = bfd_get_start_address (abfd);
-
-    ebase.simtime = 0;
-    reset_all();
-    reset_stat(&sregs);
-    sregs.pc = start_address & ~3;
-    sregs.npc = sregs.pc + 4;
-    return SIM_RC_OK;
-}
-
-int
-sim_store_register(sd, regno, value, length)
-     SIM_DESC sd;
-    int             regno;
-    unsigned char  *value;
-     int length;
-{
-    /* FIXME: Review the computation of regval.  */
-    int             regval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
-    set_regi(&sregs, regno, regval);
-    return -1;
-}
-
-
-int
-sim_fetch_register(sd, regno, buf, length)
-     SIM_DESC sd;
-    int             regno;
-    unsigned char  *buf;
-     int length;
-{
-    get_regi(&sregs, regno, buf);
-    return -1;
-}
-
-int
-sim_write(sd, mem, buf, length)
-     SIM_DESC sd;
-    SIM_ADDR             mem;
-    unsigned char  *buf;
-    int             length;
-{
-    return (sis_memory_write(mem, buf, length));
-}
-
-int
-sim_read(sd, mem, buf, length)
-     SIM_DESC sd;
-     SIM_ADDR mem;
-     unsigned char *buf;
-     int length;
-{
-    return (sis_memory_read(mem, buf, length));
-}
-
-void
-sim_info(sd, verbose)
-     SIM_DESC sd;
-     int verbose;
-{
-    show_stat(&sregs);
-}
-
-int             simstat = OK;
-
-void
-sim_stop_reason(sd, reason, sigrc)
-     SIM_DESC sd;
-     enum sim_stop * reason;
-     int *sigrc;
-{
-
-    switch (simstat) {
-	case CTRL_C:
-	*reason = sim_stopped;
-	*sigrc = SIGINT;
-	break;
-    case OK:
-    case TIME_OUT:
-    case BPT_HIT:
-	*reason = sim_stopped;
-#ifdef _WIN32
-#define SIGTRAP 5
-#endif
-	*sigrc = SIGTRAP;
-	break;
-    case ERROR:
-	*sigrc = 0;
-	*reason = sim_exited;
-    }
-    ctrl_c = 0;
-    simstat = OK;
-}
-
-/* Flush all register windows out to the stack.  Starting after the invalid
-   window, flush all windows up to, and including the current window.  This
-   allows GDB to do backtraces and look at local variables for frames that
-   are still in the register windows.  Note that strictly speaking, this
-   behavior is *wrong* for several reasons.  First, it doesn't use the window
-   overflow handlers.  It therefore assumes standard frame layouts and window
-   handling policies.  Second, it changes system state behind the back of the
-   target program.  I expect this to mainly pose problems when debugging trap
-   handlers.
-*/
-
-static void
-flush_windows ()
-{
-  int invwin;
-  int cwp;
-  int win;
-  int ws;
-
-  /* Keep current window handy */
-
-  cwp = sregs.psr & PSR_CWP;
-
-  /* Calculate the invalid window from the wim. */
-
-  for (invwin = 0; invwin <= PSR_CWP; invwin++)
-    if ((sregs.wim >> invwin) & 1)
-      break;
-
-  /* Start saving with the window after the invalid window. */
-
-  invwin = (invwin - 1) & PSR_CWP;
-
-  for (win = invwin; ; win = (win - 1) & PSR_CWP)
-    {
-      uint32 sp;
-      int i;
-
-      sp = sregs.r[(win * 16 + 14) & 0x7f];
-
-      for (i = 0; i < 16; i++)
-	memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
-		      &ws);
-
-      if (win == cwp)
-	break;
-    }
-}
-
-void
-sim_resume(SIM_DESC sd, int step, int siggnal)
-{
-    simstat = run_sim(&sregs, -1, 0);
-
-    if (sis_gdb_break) flush_windows ();
-}
-
-int
-sim_trace (sd)
-     SIM_DESC sd;
-{
-  /* FIXME: unfinished */
-  sim_resume (sd, 0, 0);
-  return 1;
-}
-
-void
-sim_do_command(sd, cmd)
-     SIM_DESC sd;
-    char           *cmd;
-{
-    exec_cmd(&sregs, cmd);
-}
-
-#if 0 /* FIXME: These shouldn't exist.  */
-
-int
-sim_insert_breakpoint(int addr)
-{
-    if (sregs.bptnum < BPT_MAX) {
-	sregs.bpts[sregs.bptnum] = addr & ~0x3;
-	sregs.bptnum++;
-	if (sis_verbose)
-	    (*sim_callback->printf_filtered) (sim_callback, "inserted HW BP at %x\n", addr);
-	return 0;
-    } else
-	return 1;
-}
-
-int
-sim_remove_breakpoint(int addr)
-{
-    int             i = 0;
-
-    while ((i < sregs.bptnum) && (sregs.bpts[i] != addr))
-	i++;
-    if (addr == sregs.bpts[i]) {
-	for (; i < sregs.bptnum - 1; i++)
-	    sregs.bpts[i] = sregs.bpts[i + 1];
-	sregs.bptnum -= 1;
-	if (sis_verbose)
-	    (*sim_callback->printf_filtered) (sim_callback, "removed HW BP at %x\n", addr);
-	return 0;
-    }
-    return 1;
-}
-
-#endif
diff --git a/sim/erc32/sis.c b/sim/erc32/sis.c
deleted file mode 100644
index 5834e5a..0000000
--- a/sim/erc32/sis.c
+++ /dev/null
@@ -1,277 +0,0 @@
-/*
- * This file is part of SIS.
- * 
- * SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
- * Space Agency
- * 
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- * 
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- * 
- */
-
-#include "config.h"
-
-#include <signal.h>
-#include <string.h>
-#ifdef HAVE_STDLIB_H
-#include <stdlib.h>
-#endif
-#include <stdio.h>
-#include "sis.h"
-#include <dis-asm.h>
-
-#ifndef fprintf
-extern          fprintf();
-#endif
-
-#define	VAL(x)	strtol(x,(char *)NULL,0)
-
-extern char    *readline(char *prompt);	/* GNU readline function */
-
-/* Command history buffer length - MUST be binary */
-#define HIST_LEN	64
-
-extern struct disassemble_info dinfo;
-extern struct pstate sregs;
-extern struct estate ebase;
-
-extern int      ctrl_c;
-extern int      nfp;
-extern int      sis_verbose;
-extern char    *sis_version;
-extern struct estate ebase;
-extern struct evcell evbuf[];
-extern struct irqcell irqarr[];
-extern int      irqpend, ext_irl;
-extern char     uart_dev1[];
-extern char     uart_dev2[];
-
-#ifdef IUREV0
-extern int      iurev0;
-#endif
-
-#ifdef MECREV0
-extern int      mecrev0;
-#endif
-
-run_sim(sregs, go, icount, dis)
-    struct pstate  *sregs;
-    int             go;
-    unsigned int    icount;
-    int             dis;
-{
-    int             mexc, ws;
-
-    sregs->starttime = time(NULL);
-    while (!sregs->err_mode & (go || (icount > 0))) {
-	if (sregs->bptnum && check_bpt(sregs))
-	    return (BPT_HIT);
-	sregs->bphit = 0;
-	sregs->fhold = 0;
-	sregs->hold = 0;
-	sregs->icnt = 0;
-
-	sregs->asi = 9 - ((sregs->psr & 0x080) >> 7);
-
-#ifdef IUREV0
-	if (iurev0 && sregs->rett_err) {
-	    sregs->asi &= ~0x1;
-	    sregs->asi |= ((sregs->psr & 0x040) >> 6);
-	}
-#endif
-
-	mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst, &sregs->hold);
-
-	if (sregs->annul) {
-	    sregs->annul = 0;
-	    sregs->icnt = 1;
-	    sregs->pc = sregs->npc;
-	    sregs->npc = sregs->npc + 4;
-	    mexc = 0;		/* Traps ignored during annul */
-	} else {
-	    check_interrupts(sregs);
-	    if (sregs->trap) {
-		sregs->err_mode = execute_trap(sregs);
-	    } else {
-		if (mexc) {
-		    sregs->trap = I_ACC_EXC;
-		} else {
-		    if (sregs->histlen) {
-			sregs->histbuf[sregs->histind].addr = sregs->pc;
-			sregs->histbuf[sregs->histind].time = ebase.simtime;
-			sregs->histind++;
-			if (sregs->histind >= sregs->histlen)
-			    sregs->histind = 0;
-		    }
-		    if (dis) {
-			printf(" %8u ", ebase.simtime);
-			dis_mem(sregs->pc, 1, &dinfo);
-		    }
-		    dispatch_instruction(sregs);
-		}
-		icount--;
-	    }
-	    if (sregs->trap) {
-		sregs->err_mode = execute_trap(sregs);
-	    }
-	}
-	advance_time(sregs);
-	if (ctrl_c) {
-	    go = icount = 0;
-	}
-    }
-    sregs->tottime += time(NULL) - sregs->starttime;
-    if (sregs->err_mode)
-	error_mode(sregs->pc);
-    if (sregs->err_mode)
-	return (ERROR);
-    if (ctrl_c) {
-	ctrl_c = 0;
-	return (CTRL_C);
-    }
-    return (TIME_OUT);
-}
-
-main(argc, argv)
-    int             argc;
-    char          **argv;
-{
-
-    int             cont = 1;
-    int             stat = 1;
-    int             freq = 14;
-    int             copt = 0;
-
-    char            lastcmd[128] = "reg";
-    char           *cmd, *cfile, *bacmd;
-    char           *cmdq[HIST_LEN];
-    int             cmdi = 0;
-    int             i;
-
-    for (i = 0; i < 64; i++)
-	cmdq[i] = 0;
-    printf("\n SIS - SPARC intruction simulator %s,  copyright Jiri Gaisler 1995\n", sis_version);
-    printf(" Bug-reports to jgais@wd.estec.esa.nl\n\n");
-    while (stat < argc) {
-	if (argv[stat][0] == '-') {
-	    if (strcmp(argv[stat], "-v") == 0) {
-		sis_verbose = 1;
-	    } else if (strcmp(argv[stat], "-c") == 0) {
-		if ((stat + 1) < argc) {
-		    copt = 1;
-		    cfile = argv[++stat];
-		}
-	    } else if (strcmp(argv[stat], "-nfp") == 0)
-		nfp = 1;
-#ifdef IUREV0
-	    else if (strcmp(argv[stat], "-iurev0") == 0)
-		iurev0 = 1;
-#endif
-#ifdef MECREV0
-	    else if (strcmp(argv[stat], "-mecrev0") == 0)
-		mecrev0 = 1;
-#endif
-	    else if (strcmp(argv[stat], "-uart1") == 0) {
-		if ((stat + 1) < argc)
-		    strcpy(uart_dev1, argv[++stat]);
-	    } else if (strcmp(argv[stat], "-uart2") == 0) {
-		if ((stat + 1) < argc)
-		    strcpy(uart_dev2, argv[++stat]);
-	    } else if (strcmp(argv[stat], "-freq") == 0) {
-		if ((stat + 1) < argc)
-		    freq = VAL(argv[++stat]);
-	    } else {
-		printf("unknown option %s\n", argv[stat]);
-		usage();
-		exit(1);
-	    }
-	} else {
-	    bfd_load(argv[stat]);
-	}
-	stat++;
-    }
-#ifdef IUREV0
-    if (iurev0)
-	printf(" simulating IU rev.0 jmpl/restore bug\n");
-#endif
-#ifdef MECREV0
-    if (iurev0)
-	printf(" simulating MEC rev.0 timer and uart interrupt bug\n");
-#endif
-    if (nfp)
-	printf("FPU disabled\n");
-    sregs.freq = freq;
-
-    INIT_DISASSEMBLE_INFO(dinfo, stdout, (fprintf_ftype) fprintf);
-
-    using_history();
-    init_signals();
-    ebase.simtime = 0;
-    reset_all();
-    init_bpt(&sregs);
-    init_sim();
-#ifdef STAT
-    reset_stat(&sregs);
-#endif
-
-    if (copt) {
-	bacmd = (char *) malloc(256);
-	strcpy(bacmd, "batch ");
-	strcat(bacmd, cfile);
-	exec_cmd(&sregs, bacmd);
-    }
-    while (cont) {
-
-	if (cmdq[cmdi] != 0) {
-	    remove_history(cmdq[cmdi]);
-	    free(cmdq[cmdi]);
-	    cmdq[cmdi] = 0;
-	}
-	cmdq[cmdi] = readline("sis> ");
-	if (cmdq[cmdi] && *cmdq[cmdi])
-	    add_history(cmdq[cmdi]);
-	if (cmdq[cmdi])
-	    stat = exec_cmd(&sregs, cmdq[cmdi]);
-	else {
-	    puts("\n");
-	    exit(0);
-	}
-	switch (stat) {
-	case OK:
-	    break;
-	case CTRL_C:
-	    printf("\b\bInterrupt!\n");
-	case TIME_OUT:
-	    printf(" Stopped at time %d\n", ebase.simtime);
-	    break;
-	case BPT_HIT:
-	    printf("breakpoint at 0x%08x reached\n", sregs.pc);
-	    sregs.bphit = 1;
-	    break;
-	case ERROR:
-	    printf("IU in error mode (%d)\n", sregs.trap);
-	    stat = 0;
-	    printf(" %8d ", ebase.simtime);
-	    dis_mem(sregs.pc, 1, &dinfo);
-	    break;
-	default:
-	    break;
-	}
-	ctrl_c = 0;
-	stat = OK;
-
-	cmdi = (cmdi + 1) & (HIST_LEN - 1);
-
-    }
-}
diff --git a/sim/erc32/sis.h b/sim/erc32/sis.h
deleted file mode 100644
index 144ae5d..0000000
--- a/sim/erc32/sis.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * This file is part of SIS.
- * 
- * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
- * European Space Agency
- * 
- * This program is free software; you can redistribute it and/or modify it under
- * the terms of the GNU General Public License as published by the Free
- * Software Foundation; either version 2 of the License, or (at your option)
- * any later version.
- * 
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- * 
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 675
- * Mass Ave, Cambridge, MA 02139, USA.
- * 
- */
-
-#include "end.h"
-
-#define I_ACC_EXC 1
-
-/* Maximum events in event queue */
-#define EVENT_MAX	256
-
-/* Maximum # of floating point queue */
-#define FPUQN	1
-
-/* Maximum # of breakpoints */
-#define BPT_MAX	256
-
-struct histype {
-    unsigned        addr;
-    unsigned        time;
-};
-
-/* type definitions */
-
-typedef short int int16;	/* 16-bit signed int */
-typedef unsigned short int uint16;	/* 16-bit unsigned int */
-typedef int     int32;		/* 32-bit signed int */
-typedef unsigned int uint32;	/* 32-bit unsigned int */
-typedef float   float32;	/* 32-bit float */
-typedef double  float64;	/* 64-bit float */
-
-struct pstate {
-
-    float64         fd[16];	/* FPU registers */
-#ifdef HOST_LITTLE_ENDIAN_FLOAT
-    float32         fs[32];
-    float32        *fdp;
-#else
-    float32        *fs;
-#endif
-    int32          *fsi;
-    uint32          fsr;
-    int32           fpstate;
-    uint32          fpq[FPUQN * 2];
-    uint32          fpqn;
-    uint32          ftime;
-    uint32          flrd;
-    uint32          frd;
-    uint32          frs1;
-    uint32          frs2;
-    uint32          fpu_pres;	/* FPU present (0 = No, 1 = Yes) */
-
-    uint32          psr;	/* IU registers */
-    uint32          tbr;
-    uint32          wim;
-    uint32          g[8];
-    uint32          r[128];
-    uint32          y;
-    uint32          pc, npc;
-
-
-    uint32          trap;	/* Current trap type */
-    uint32          annul;	/* Instruction annul */
-    uint32          data;	/* Loaded data	     */
-    uint32          inst;	/* Current instruction */
-    uint32          asi;	/* Current ASI */
-    uint32          err_mode;	/* IU error mode */
-    uint32          breakpoint;
-    uint32          bptnum;
-    uint32          bphit;
-    uint32          bpts[BPT_MAX];	/* Breakpoints */
-
-    uint32          ltime;	/* Load interlock time */
-    uint32          hold;	/* IU hold cycles in current inst */
-    uint32          fhold;	/* FPU hold cycles in current inst */
-    uint32          icnt;	/* Instruction cycles in curr inst */
-
-    uint32          histlen;	/* Trace history management */
-    uint32          histind;
-    struct histype *histbuf;
-    float32         freq;	/* Simulated processor frequency */
-
-
-    uint32          tottime;
-    uint32          ninst;
-    uint32          fholdt;
-    uint32          holdt;
-    uint32          icntt;
-    uint32          finst;
-    uint32          simstart;
-    uint32          starttime;
-    uint32          pwdtime;	/* Cycles in power-down mode */
-    uint32          nstore;	/* Number of load instructions */
-    uint32          nload;	/* Number of store instructions */
-    uint32          nannul;	/* Number of annuled instructions */
-    uint32          nbranch;	/* Number of branch instructions */
-    uint32          ildreg;	/* Destination of last load instruction */
-    uint32          ildtime;	/* Last time point for load dependency */
-
-    int             rett_err;	/* IU in jmpl/restore error state (Rev.0) */
-    int             jmpltime;
-};
-
-struct evcell {
-    void            (*cfunc) ();
-    int32           arg;
-    uint32          time;
-    struct evcell  *nxt;
-};
-
-struct estate {
-    struct evcell   eq;
-    struct evcell  *freeq;
-    uint32          simtime;
-};
-
-struct irqcell {
-    void            (*callback) ();
-    int32           arg;
-};
-
-
-#define OK 0
-#define TIME_OUT 1
-#define BPT_HIT 2
-#define ERROR 3
-#define CTRL_C 4
diff --git a/sim/erc32/startsim b/sim/erc32/startsim
deleted file mode 100644
index 1b9b41c..0000000
--- a/sim/erc32/startsim
+++ /dev/null
@@ -1,4 +0,0 @@
-#
-xterm -e sis $* &
-xterm -e tip /dev/ttypc &
-