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Diffstat (limited to 'sim/aarch64/cpustate.c')
-rw-r--r--sim/aarch64/cpustate.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/sim/aarch64/cpustate.c b/sim/aarch64/cpustate.c
index e901a07..f6b93fb 100644
--- a/sim/aarch64/cpustate.c
+++ b/sim/aarch64/cpustate.c
@@ -379,7 +379,7 @@ aarch64_set_FP_float (sim_cpu *cpu, VReg reg, float val)
v.s = val;
TRACE_REGISTER (cpu,
- "FR[%d].s changes from %f to %f [hex: %0lx]",
+ "FR[%d].s changes from %f to %f [hex: %0" PRIx64 "]",
reg, cpu->fr[reg].s, val, v.v[0]);
}
@@ -397,7 +397,7 @@ aarch64_set_FP_double (sim_cpu *cpu, VReg reg, double val)
v.d = val;
TRACE_REGISTER (cpu,
- "FR[%d].d changes from %f to %f [hex: %0lx]",
+ "FR[%d].d changes from %f to %f [hex: %0" PRIx64 "]",
reg, cpu->fr[reg].d, val, v.v[0]);
}
cpu->fr[reg].d = val;
@@ -409,7 +409,8 @@ aarch64_set_FP_long_double (sim_cpu *cpu, VReg reg, FRegister a)
if (cpu->fr[reg].v[0] != a.v[0]
|| cpu->fr[reg].v[1] != a.v[1])
TRACE_REGISTER (cpu,
- "FR[%d].q changes from [%0lx %0lx] to [%0lx %0lx] ",
+ "FR[%d].q changes from [%0" PRIx64 " %0" PRIx64 "] to [%0"
+ PRIx64 " %0" PRIx64 "] ",
reg,
cpu->fr[reg].v[0], cpu->fr[reg].v[1],
a.v[0], a.v[1]);
@@ -518,7 +519,7 @@ aarch64_get_vec_double (sim_cpu *cpu, VReg reg, unsigned element)
void
aarch64_set_vec_u64 (sim_cpu *cpu, VReg reg, unsigned element, uint64_t val)
{
- SET_VEC_ELEMENT (reg, element, val, v, "%16lx");
+ SET_VEC_ELEMENT (reg, element, val, v, "%16" PRIx64);
}
void
@@ -542,7 +543,7 @@ aarch64_set_vec_u8 (sim_cpu *cpu, VReg reg, unsigned element, uint8_t val)
void
aarch64_set_vec_s64 (sim_cpu *cpu, VReg reg, unsigned element, int64_t val)
{
- SET_VEC_ELEMENT (reg, element, val, V, "%16lx");
+ SET_VEC_ELEMENT (reg, element, val, V, "%16" PRIx64);
}
void