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-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/i386-gen.c4
-rw-r--r--opcodes/i386-init.h8
3 files changed, 18 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 20c0447..573c4dc 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
+ CPU_SMX_FLAGS.
+ * i386-init.h: Regenerated.
+
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Use Qword on movddup.
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index 4f1b581..69c5a02 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -96,6 +96,10 @@ static initializer cpu_flag_init [] =
"CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1" },
{ "CPU_SSE4_2_FLAGS",
"CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2" },
+ { "CPU_VMX_FLAGS",
+ "CpuVMX" },
+ { "CPU_SMX_FLAGS",
+ "CpuSMX" },
{ "CPU_3DNOW_FLAGS",
"CpuMMX|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index b26db4f..624d006 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -130,6 +130,14 @@
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
1, 0, 0, 1, 1, 0, 0, 0, 0, 0 } }
+#define CPU_VMX_FLAGS \
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
+
+#define CPU_SMX_FLAGS \
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
+
#define CPU_3DNOW_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }