diff options
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlsexe.d')
| -rw-r--r-- | ld/testsuite/ld-powerpc/tlsexe.d | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d index c423bbd..542b435 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.d +++ b/ld/testsuite/ld-powerpc/tlsexe.d @@ -35,38 +35,38 @@ Disassembly of section \.text: .* (38 62 80 18|18 80 62 38) addi r3,r2,-32744 .* (4b ff ff a9|a9 ff ff 4b) bl .* .* (60 00 00 00|00 00 00 60) nop -.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 -.* (38 63 90 38|38 90 63 38) addi r3,r3,-28616 .* (60 00 00 00|00 00 00 60) nop -.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 -.* (38 63 10 00|00 10 63 38) addi r3,r3,4096 +.* (38 6d 90 38|38 90 6d 38) addi r3,r13,-28616 +.* (60 00 00 00|00 00 00 60) nop +.* (60 00 00 00|00 00 00 60) nop +.* (38 6d 10 00|00 10 6d 38) addi r3,r13,4096 .* (60 00 00 00|00 00 00 60) nop .* (39 23 80 40|40 80 23 39) addi r9,r3,-32704 .* (3d 23 00 00|00 00 23 3d) addis r9,r3,0 .* (81 49 80 48|48 80 49 81) lwz r10,-32696\(r9\) .* (e9 22 80 28|28 80 22 e9) ld r9,-32728\(r2\) .* (7d 49 18 2a|2a 18 49 7d) ldx r10,r9,r3 -.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0 -.* (a1 49 90 58|58 90 49 a1) lhz r10,-28584\(r9\) +.* (60 00 00 00|00 00 00 60) nop +.* (a1 4d 90 58|58 90 4d a1) lhz r10,-28584\(r13\) .* (89 4d 90 60|60 90 4d 89) lbz r10,-28576\(r13\) -.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0 -.* (99 49 90 68|68 90 49 99) stb r10,-28568\(r9\) -.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 -.* (38 63 90 00|00 90 63 38) addi r3,r3,-28672 .* (60 00 00 00|00 00 00 60) nop -.* (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 -.* (38 63 10 00|00 10 63 38) addi r3,r3,4096 +.* (99 4d 90 68|68 90 4d 99) stb r10,-28568\(r13\) +.* (60 00 00 00|00 00 00 60) nop +.* (38 6d 90 00|00 90 6d 38) addi r3,r13,-28672 +.* (60 00 00 00|00 00 00 60) nop +.* (60 00 00 00|00 00 00 60) nop +.* (38 6d 10 00|00 10 6d 38) addi r3,r13,4096 .* (60 00 00 00|00 00 00 60) nop .* (f9 43 80 08|08 80 43 f9) std r10,-32760\(r3\) .* (3d 23 00 00|00 00 23 3d) addis r9,r3,0 .* (91 49 80 10|10 80 49 91) stw r10,-32752\(r9\) .* (e9 22 80 08|08 80 22 e9) ld r9,-32760\(r2\) .* (7d 49 19 2a|2a 19 49 7d) stdx r10,r9,r3 -.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0 -.* (b1 49 90 58|58 90 49 b1) sth r10,-28584\(r9\) +.* (60 00 00 00|00 00 00 60) nop +.* (b1 4d 90 58|58 90 4d b1) sth r10,-28584\(r13\) .* (e9 4d 90 2a|2a 90 4d e9) lwa r10,-28632\(r13\) -.* (3d 2d 00 00|00 00 2d 3d) addis r9,r13,0 -.* (a9 49 90 30|30 90 49 a9) lha r10,-28624\(r9\) +.* (60 00 00 00|00 00 00 60) nop +.* (a9 4d 90 30|30 90 4d a9) lha r10,-28624\(r13\) .* (00 00 00 00|20 02 01 00) .* .* (00 01 02 20|00 00 00 00) .* .* <__glink_PLTresolve>: |