diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/riscv-opc.h | 50 | ||||
| -rw-r--r-- | include/opcode/riscv.h | 5 |
2 files changed, 55 insertions, 0 deletions
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index 3d5f660..9003200 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -2121,6 +2121,39 @@ #define MASK_VDOTUVV 0xfc00707f #define MATCH_VFDOTVV 0xe4001057 #define MASK_VFDOTVV 0xfc00707f +/* Zvbb instructions. */ +#define MATCH_VANDN_VV 0x4000057 +#define MASK_VANDN_VV 0xfc00707f +#define MATCH_VANDN_VX 0x4004057 +#define MASK_VANDN_VX 0xfc00707f +#define MATCH_VBREV8_V 0x48042057 +#define MASK_VBREV8_V 0xfc0ff07f +#define MATCH_VBREV_V 0x48052057 +#define MASK_VBREV_V 0xfc0ff07f +#define MATCH_VCLZ_V 0x48062057 +#define MASK_VCLZ_V 0xfc0ff07f +#define MATCH_VCPOP_V 0x48072057 +#define MASK_VCPOP_V 0xfc0ff07f +#define MATCH_VCTZ_V 0x4806a057 +#define MASK_VCTZ_V 0xfc0ff07f +#define MATCH_VREV8_V 0x4804a057 +#define MASK_VREV8_V 0xfc0ff07f +#define MATCH_VROL_VV 0x54000057 +#define MASK_VROL_VV 0xfc00707f +#define MATCH_VROL_VX 0x54004057 +#define MASK_VROL_VX 0xfc00707f +#define MATCH_VROR_VI 0x50003057 +#define MASK_VROR_VI 0xf800707f +#define MATCH_VROR_VV 0x50000057 +#define MASK_VROR_VV 0xfc00707f +#define MATCH_VROR_VX 0x50004057 +#define MASK_VROR_VX 0xfc00707f +#define MATCH_VWSLL_VI 0xd4003057 +#define MASK_VWSLL_VI 0xfc00707f +#define MATCH_VWSLL_VV 0xd4000057 +#define MASK_VWSLL_VV 0xfc00707f +#define MATCH_VWSLL_VX 0xd4004057 +#define MASK_VWSLL_VX 0xfc00707f /* Svinval instruction. */ #define MATCH_SINVAL_VMA 0x16000073 #define MASK_SINVAL_VMA 0xfe007fff @@ -3230,6 +3263,23 @@ DECLARE_INSN(czero_nez, MATCH_CZERO_NEZ, MASK_CZERO_NEZ) /* Zawrs instructions. */ DECLARE_INSN(wrs_nto, MATCH_WRS_NTO, MASK_WRS_NTO) DECLARE_INSN(wrs_sto, MATCH_WRS_STO, MASK_WRS_STO) +/* Zvbb instructions. */ +DECLARE_INSN(vandn_vv, MATCH_VANDN_VV, MASK_VANDN_VV) +DECLARE_INSN(vandn_vx, MATCH_VANDN_VX, MASK_VANDN_VX) +DECLARE_INSN(vbrev8_v, MATCH_VBREV8_V, MASK_VBREV8_V) +DECLARE_INSN(vbrev_v, MATCH_VBREV_V, MASK_VBREV_V) +DECLARE_INSN(vclz_v, MATCH_VCLZ_V, MASK_VCLZ_V) +DECLARE_INSN(vcpop_v, MATCH_VCPOP_V, MASK_VCPOP_V) +DECLARE_INSN(vctz_v, MATCH_VCTZ_V, MASK_VCTZ_V) +DECLARE_INSN(vrev8_v, MATCH_VREV8_V, MASK_VREV8_V) +DECLARE_INSN(vrol_vv, MATCH_VROL_VV, MASK_VROL_VV) +DECLARE_INSN(vrol_vx, MATCH_VROL_VX, MASK_VROL_VX) +DECLARE_INSN(vror_vi, MATCH_VROR_VI, MASK_VROR_VI) +DECLARE_INSN(vror_vv, MATCH_VROR_VV, MASK_VROR_VV) +DECLARE_INSN(vror_vx, MATCH_VROR_VX, MASK_VROR_VX) +DECLARE_INSN(vwsll_vi, MATCH_VWSLL_VI, MASK_VWSLL_VI) +DECLARE_INSN(vwsll_vv, MATCH_VWSLL_VV, MASK_VWSLL_VV) +DECLARE_INSN(vwsll_vx, MATCH_VWSLL_VX, MASK_VWSLL_VX) /* Vendor-specific (T-Head) XTheadBa instructions. */ DECLARE_INSN(th_addsl, MATCH_TH_ADDSL, MASK_TH_ADDSL) /* Vendor-specific (T-Head) XTheadBb instructions. */ diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index e96b957..4878564 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -100,6 +100,8 @@ static inline unsigned int riscv_insn_length (insn_t insn) (RV_X(x, 15, 5) | (-RV_X(x, 19, 1) << 5)) #define EXTRACT_RVV_VI_UIMM(x) \ (RV_X(x, 15, 5)) +#define EXTRACT_RVV_VI_UIMM6(x) \ + (RV_X(x, 15, 5) | (RV_X(x, 26, 1) << 5)) #define EXTRACT_RVV_OFFSET(x) \ (RV_X(x, 29, 3)) #define EXTRACT_RVV_VB_IMM(x) \ @@ -151,6 +153,8 @@ static inline unsigned int riscv_insn_length (insn_t insn) (RV_X(x, 0, 10) << 20) #define ENCODE_RVV_VC_IMM(x) \ (RV_X(x, 0, 11) << 20) +#define ENCODE_RVV_VI_UIMM6(x) \ + (RV_X(x, 0, 5) << 15 | RV_X(x, 5, 1) << 26) #define VALID_ITYPE_IMM(x) (EXTRACT_ITYPE_IMM(ENCODE_ITYPE_IMM(x)) == (x)) #define VALID_STYPE_IMM(x) (EXTRACT_STYPE_IMM(ENCODE_STYPE_IMM(x)) == (x)) @@ -410,6 +414,7 @@ enum riscv_insn_class INSN_CLASS_ZKND_OR_ZKNE, INSN_CLASS_V, INSN_CLASS_ZVEF, + INSN_CLASS_ZVBB, INSN_CLASS_SVINVAL, INSN_CLASS_ZICBOM, INSN_CLASS_ZICBOP, |