diff options
Diffstat (limited to 'include/elf')
| -rw-r--r-- | include/elf/ChangeLog | 15 | ||||
| -rw-r--r-- | include/elf/sparc.h | 25 |
2 files changed, 39 insertions, 1 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 7e92493..17978ba 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,18 @@ +2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> + + * sparc.h (Tag_GNU_Sparc_HWCAPS2): New object attribute. + (ELF_SPARC_HWCAP2_FJATHPLUS): New HWCAP2 bitmask value. + (ELF_SPARC_HWCAP2_VIS3B): Likewise. + (ELF_SPARC_HWCAP2_ADP): Likewise. + (ELF_SPARC_HWCAP2_SPARC5): Likewise. + (ELF_SPARC_HWCAP2_MWAIT): Likewise. + (ELF_SPARC_HWCAP2_XMPMUL): Likewise. + (ELF_SPARC_HWCAP2_XMONT): Likewise. + (ELF_SPARC_HWCAP2_NSEC): Likewise. + (ELF_SPARC_HWCAP2_FJATHHPC): Likewise. + (ELF_SPARC_HWCAP2_FJDES): Likewise. + (ELF_SPARC_HWCAP2_FJAES): Likewise. + 2014-10-08 Will Newton <will.newton@linaro.org> * aarch64.h: Sync up relocations with ABI release 1.0. diff --git a/include/elf/sparc.h b/include/elf/sparc.h index 9bfc27f..d41ba35 100644 --- a/include/elf/sparc.h +++ b/include/elf/sparc.h @@ -190,9 +190,19 @@ enum { /* 0-3 are generic. */ Tag_GNU_Sparc_HWCAPS = 4, + Tag_GNU_Sparc_HWCAPS2 = 8 }; -/* These values match the AV_SPARC_* hwcap bits defined under Solaris. */ +/* Generally speaking the ELF_SPARC_HWCAP_* and ELF_SPARC_HWCAP2_* + values match the AV_SPARC_* and AV2_SPARC_* bits respectively. + + However Solaris 11 introduced a backwards-incompatible change + deprecating the RANDOM, TRANS and ASI_CACHE_SPARING bits in the + AT_SUNW_CAP_HW1 flags, reusing the bits for the unrelated hwcaps + FJATHHPC, FJDES and FJAES respectively. In GNU/Linux we opted to + keep the old hwcaps in Tag_GNU_Sparc_HWCAPS and allocate bits for + FJATHHPC, FJDES and JFAES in Tag_GNU_Sparc_HWCAPS2. */ + #define ELF_SPARC_HWCAP_MUL32 0x00000001 /* umul/umulcc/smul/smulcc insns */ #define ELF_SPARC_HWCAP_DIV32 0x00000002 /* udiv/udivcc/sdiv/sdivcc insns */ #define ELF_SPARC_HWCAP_FSMULD 0x00000004 /* 'fsmuld' insn */ @@ -226,4 +236,17 @@ enum #define ELF_SPARC_HWCAP_CBCOND 0x10000000 /* Compare and Branch insns */ #define ELF_SPARC_HWCAP_CRC32C 0x20000000 /* CRC32C insn */ +#define ELF_SPARC_HWCAP2_FJATHPLUS 0x00000001 /* Fujitsu Athena+ */ +#define ELF_SPARC_HWCAP2_VIS3B 0x00000002 /* VIS3 present on multiple chips */ +#define ELF_SPARC_HWCAP2_ADP 0x00000004 /* Application Data Protection */ +#define ELF_SPARC_HWCAP2_SPARC5 0x00000008 /* The 29 new fp and sub instructions */ +#define ELF_SPARC_HWCAP2_MWAIT 0x00000010 /* mwait instruction and load/monitor ASIs */ +#define ELF_SPARC_HWCAP2_XMPMUL 0x00000020 /* XOR multiple precision multiply */ +#define ELF_SPARC_HWCAP2_XMONT 0x00000040 /* XOR Montgomery mult/sqr instructions */ +#define ELF_SPARC_HWCAP2_NSEC \ + 0x00000080 /* pause insn with support for nsec timings */ +#define ELF_SPARC_HWCAP2_FJATHHPC 0x00001000 /* Fujitsu HPC instrs */ +#define ELF_SPARC_HWCAP2_FJDES 0x00002000 /* Fujitsu DES instrs */ +#define ELF_SPARC_HWCAP2_FJAES 0x00010000 /* Fujitsu AES instrs */ + #endif /* _ELF_SPARC_H */ |