diff options
Diffstat (limited to 'gas')
-rw-r--r-- | gas/config/tc-i386.c | 22 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d | 32 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/x86-64-apx-nf.s | 20 |
3 files changed, 73 insertions, 1 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index c51402a..7ffacf7 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4927,6 +4927,7 @@ optimize_encoding (void) } else if (!optimize_for_space && i.tm.base_opcode == 0xd0 + && i.tm.extension_opcode == 4 && (i.tm.opcode_space == SPACE_BASE || i.tm.opcode_space == SPACE_EVEXMAP4) && !i.mem_operands) @@ -4942,7 +4943,6 @@ optimize_encoding (void) shll $1, %rN, %rM -> addl %rN, %rN, %rM shlq $1, %rN, %rM -> addq %rN, %rN, %rM */ - gas_assert (i.tm.extension_opcode == 4); i.tm.base_opcode = 0x00; i.tm.extension_opcode = None; if (i.operands >= 2) @@ -5403,6 +5403,26 @@ optimize_nf_encoding (void) i.imm_operands = 0; --i.operands; } + else if (i.tm.base_opcode == 0xc0 + && i.op[0].imms->X_op == O_constant + && i.op[0].imms->X_add_number + == (i.types[i.operands - 1].bitfield.byte + || i.suffix == BYTE_MNEM_SUFFIX + ? 7 : i.types[i.operands - 1].bitfield.word + || i.suffix == WORD_MNEM_SUFFIX + ? 15 : 63 >> (i.types[i.operands - 1].bitfield.dword + || i.suffix == LONG_MNEM_SUFFIX))) + { + /* Optimize: -O: + {nf} rol $osz-1, ... -> {nf} ror $1, ... + {nf} ror $osz-1, ... -> {nf} rol $1, ... + */ + gas_assert (i.tm.extension_opcode <= 1); + i.tm.extension_opcode ^= 1; + i.tm.base_opcode = 0xd0; + i.tm.operand_types[0].bitfield.imm1 = 1; + i.imm_operands = 0; + } } static void diff --git a/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d index ac05943..1056169 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d +++ b/gas/testsuite/gas/i386/x86-64-apx-nf-optimize.d @@ -1480,4 +1480,36 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 f4 74 1c ff 00[ ]+\{nf\} inc \(%rax\),%ecx [ ]*[a-f0-9]+:[ ]*62 f4 fc 0c ff 00[ ]+\{nf\} incq \(%rax\) [ ]*[a-f0-9]+:[ ]*62 f4 b4 1c ff 00[ ]+\{nf\} inc \(%rax\),%r9 +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d0 ca[ ]+\{nf\} ror \$1,%dl +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d0 ca[ ]+\{nf\} ror \$1,%dl,%al +[ ]*[a-f0-9]+:[ ]*62 f4 7d 0c d1 ca[ ]+\{nf\} ror \$1,%dx +[ ]*[a-f0-9]+:[ ]*62 f4 7d 1c d1 ca[ ]+\{nf\} ror \$1,%dx,%ax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d1 ca[ ]+\{nf\} ror \$1,%edx +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d1 ca[ ]+\{nf\} ror \$1,%edx,%eax +[ ]*[a-f0-9]+:[ ]*62 f4 fc 0c d1 ca[ ]+\{nf\} ror \$1,%rdx +[ ]*[a-f0-9]+:[ ]*62 f4 fc 1c d1 ca[ ]+\{nf\} ror \$1,%rdx,%rax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d0 0a[ ]+\{nf\} rorb \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d0 0a[ ]+\{nf\} ror \$1,\(%rdx\),%al +[ ]*[a-f0-9]+:[ ]*62 f4 7d 0c d1 0a[ ]+\{nf\} rorw \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 7d 1c d1 0a[ ]+\{nf\} ror \$1,\(%rdx\),%ax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d1 0a[ ]+\{nf\} rorl \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d1 0a[ ]+\{nf\} ror \$1,\(%rdx\),%eax +[ ]*[a-f0-9]+:[ ]*62 f4 fc 0c d1 0a[ ]+\{nf\} rorq \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 fc 1c d1 0a[ ]+\{nf\} ror \$1,\(%rdx\),%rax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d0 c2[ ]+\{nf\} rol \$1,%dl +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d0 c2[ ]+\{nf\} rol \$1,%dl,%al +[ ]*[a-f0-9]+:[ ]*62 f4 7d 0c d1 c2[ ]+\{nf\} rol \$1,%dx +[ ]*[a-f0-9]+:[ ]*62 f4 7d 1c d1 c2[ ]+\{nf\} rol \$1,%dx,%ax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d1 c2[ ]+\{nf\} rol \$1,%edx +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d1 c2[ ]+\{nf\} rol \$1,%edx,%eax +[ ]*[a-f0-9]+:[ ]*62 f4 fc 0c d1 c2[ ]+\{nf\} rol \$1,%rdx +[ ]*[a-f0-9]+:[ ]*62 f4 fc 1c d1 c2[ ]+\{nf\} rol \$1,%rdx,%rax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d0 02[ ]+\{nf\} rolb \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d0 02[ ]+\{nf\} rol \$1,\(%rdx\),%al +[ ]*[a-f0-9]+:[ ]*62 f4 7d 0c d1 02[ ]+\{nf\} rolw \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 7d 1c d1 02[ ]+\{nf\} rol \$1,\(%rdx\),%ax +[ ]*[a-f0-9]+:[ ]*62 f4 7c 0c d1 02[ ]+\{nf\} roll \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 7c 1c d1 02[ ]+\{nf\} rol \$1,\(%rdx\),%eax +[ ]*[a-f0-9]+:[ ]*62 f4 fc 0c d1 02[ ]+\{nf\} rolq \$1,\(%rdx\) +[ ]*[a-f0-9]+:[ ]*62 f4 fc 1c d1 02[ ]+\{nf\} rol \$1,\(%rdx\),%rax #pass diff --git a/gas/testsuite/gas/i386/x86-64-apx-nf.s b/gas/testsuite/gas/i386/x86-64-apx-nf.s index acb4ba6..14f6526 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-nf.s +++ b/gas/testsuite/gas/i386/x86-64-apx-nf.s @@ -1433,3 +1433,23 @@ optimize: {nf} \op\()q $-1, (%rax) {nf} \op $-1, (%rax), %r9 .endr + + .irp dir, l, r + {nf} ro\dir $7, %dl + {nf} ro\dir $7, %dl, %al + {nf} ro\dir $15, %dx + {nf} ro\dir $15, %dx, %ax + {nf} ro\dir $31, %edx + {nf} ro\dir $31, %edx, %eax + {nf} ro\dir $63, %rdx + {nf} ro\dir $63, %rdx, %rax + + {nf} ro\dir\()b $7, (%rdx) + {nf} ro\dir $7, (%rdx), %al + {nf} ro\dir\()w $15, (%rdx) + {nf} ro\dir $15, (%rdx), %ax + {nf} ro\dir\()l $31, (%rdx) + {nf} ro\dir $31, (%rdx), %eax + {nf} ro\dir\()q $63, (%rdx) + {nf} ro\dir $63, (%rdx), %rax + .endr |