2 files changed, 32 insertions, 16 deletions
diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo
index 9ebfda0..d09e0d4 100644
--- a/gas/doc/as.texinfo
+++ b/gas/doc/as.texinfo
@@ -1654,9 +1654,11 @@ Select the word size, either 31/32 bits or 64 bits.
 Select the architecture mode, either the Enterprise System
 Architecture (esa) or the z/Architecture mode (zarch).
 @item -march=@var{processor}
-Specify which s390 processor variant is the target, @samp{g6}, @samp{g6},
-@samp{z900}, @samp{z990}, @samp{z9-109}, @samp{z9-ec}, @samp{z10},
-@samp{z196}, @samp{zEC12}, or @samp{z13}.
+Specify which s390 processor variant is the target, @samp{g5} (or
+@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
+@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
+@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
+or @samp{z13} (or @samp{arch11}).
 @item -mregnames
 @itemx -mno-regnames
 Allow or disallow symbolic names for registers.
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index e3277cb..1cbf308 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -14,9 +14,11 @@
 @cindex s390 support
 
 The s390 version of @code{@value{AS}} supports two architectures modes
-and seven chip levels. The architecture modes are the Enterprise System
+and ten chip levels. The architecture modes are the Enterprise System
 Architecture (ESA) and the newer z/Architecture mode. The chip levels
-are g5, g6, z900, z990, z9-109, z9-ec, z10, z196, zEC12, and z13.
+are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
+(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), and
+z13 (or arch11).
 
 @menu
 * s390 Options::                Command-line Options.
@@ -58,19 +60,31 @@ message.
 @item -march=@var{CPU}
 This option specifies the target processor. The following processor names
 are recognized:
-@code{g5},
+@code{g5} (or @code{arch3}),
 @code{g6},
-@code{z900},
-@code{z990},
+@code{z900} (or @code{arch5}),
+@code{z990} (or @code{arch6}),
 @code{z9-109},
-@code{z9-ec},
-@code{z10},
-@code{z196},
-@code{zEC12}, and
-@code{z13}.
-Assembling an instruction that is not supported on the target processor
-results in an error message. Do not specify @code{g5} or @code{g6}
-with @samp{-mzarch}.
+@code{z9-ec} (or @code{arch7}),
+@code{z10} (or @code{arch8}),
+@code{z196} (or @code{arch9}),
+@code{zEC12} (or @code{arch10}) and
+@code{z13} (or @code{arch11}).
+
+Assembling an instruction that is not supported on the target
+processor results in an error message.
+
+The processor names starting with @code{arch} refer to the edition
+number in the Principle of Operations manual.  They can be used as
+alternate processor names and have been added for compatibility with
+the IBM XL compiler.
+
+@code{arch3}, @code{g5} and @code{g6} cannot be used with the
+@samp{-mzarch} option since the z/Architecture mode is not supported
+on these processor levels.
+
+There is no @code{arch4} option supported. @code{arch4} matches
+@code{-march=arch5 -mesa}.
 
 @cindex @samp{-mregnames} option, s390
 @item -mregnames