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-rw-r--r--bfd/verilog.c80
1 files changed, 70 insertions, 10 deletions
diff --git a/bfd/verilog.c b/bfd/verilog.c
index 680f4fa..252e240 100644
--- a/bfd/verilog.c
+++ b/bfd/verilog.c
@@ -58,12 +58,16 @@
#include "libiberty.h"
#include "safe-ctype.h"
+/* Modified by obcopy.c
+ Data width in bytes. */
+unsigned int VerilogDataWidth = 1;
+
/* Macros for converting between hex and binary. */
static const char digs[] = "0123456789ABCDEF";
-#define NIBBLE(x) hex_value(x)
-#define HEX(buffer) ((NIBBLE ((buffer)[0])<<4) + NIBBLE ((buffer)[1]))
+#define NIBBLE(x) hex_value (x)
+#define HEX(buffer) ((NIBBLE ((buffer)[0]) << 4) + NIBBLE ((buffer)[1]))
#define TOHEX(d, x) \
d[1] = digs[(x) & 0xf]; \
d[0] = digs[((x) >> 4) & 0xf];
@@ -183,26 +187,82 @@ verilog_write_address (bfd *abfd, bfd_vma address)
}
/* Write a record of type, of the supplied number of bytes. The
- supplied bytes and length don't have a checksum. That's worked out
- here. */
+ supplied bytes and length don't have a checksum. That's worked
+ out here. */
static bfd_boolean
verilog_write_record (bfd *abfd,
const bfd_byte *data,
const bfd_byte *end)
{
- char buffer[50];
+ char buffer[52];
const bfd_byte *src = data;
char *dst = buffer;
bfd_size_type wrlen;
- /* Write the data. */
- for (src = data; src < end; src++)
+ /* Paranoia - check that we will not overflow "buffer". */
+ if (((end - data) * 2) /* Number of hex characters we want to emit. */
+ + ((end - data) / VerilogDataWidth) /* Number of spaces we want to emit. */
+ + 2 /* The carriage return & line feed characters. */
+ > (long) sizeof (buffer))
{
- TOHEX (dst, *src);
- dst += 2;
- *dst++ = ' ';
+ /* FIXME: Should we generate an error message ? */
+ return FALSE;
+ }
+
+ /* Write the data.
+ FIXME: Under some circumstances we can emit a space at the end of
+ the line. This is not really necessary, but catching these cases
+ would make the code more complicated. */
+ if (VerilogDataWidth == 1)
+ {
+ for (src = data; src < end;)
+ {
+ TOHEX (dst, *src);
+ dst += 2;
+ src ++;
+ if (src < end)
+ *dst++ = ' ';
+ }
}
+ else if (bfd_little_endian (abfd))
+ {
+ /* If the input byte stream contains:
+ 05 04 03 02 01 00
+ and VerilogDataWidth is 4 then we want to emit:
+ 02030405 0001 */
+ int i;
+
+ for (src = data; src < (end - VerilogDataWidth); src += VerilogDataWidth)
+ {
+ for (i = VerilogDataWidth - 1; i >= 0; i--)
+ {
+ TOHEX (dst, src[i]);
+ dst += 2;
+ }
+ *dst++ = ' ';
+ }
+
+ /* Emit any remaining bytes. Be careful not to read beyond "end". */
+ while (end > src)
+ {
+ -- end;
+ TOHEX (dst, *end);
+ dst += 2;
+ }
+ }
+ else
+ {
+ for (src = data; src < end;)
+ {
+ TOHEX (dst, *src);
+ dst += 2;
+ ++ src;
+ if ((src - data) % VerilogDataWidth == 0)
+ *dst++ = ' ';
+ }
+ }
+
*dst++ = '\r';
*dst++ = '\n';
wrlen = dst - buffer;