diff options
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-sysreg-8.l | 8 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/illegal-sysreg-8.s | 2 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 2 | ||||
| -rw-r--r-- | opcodes/aarch64-tbl.h | 3 |
4 files changed, 11 insertions, 4 deletions
diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8.l b/gas/testsuite/gas/aarch64/illegal-sysreg-8.l index 6a5f8fe..773e8d8 100644 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8.l +++ b/gas/testsuite/gas/aarch64/illegal-sysreg-8.l @@ -3,6 +3,14 @@ .*: *Info: macro .* .*: Error: selected processor does not support system register name 'ccsidr2_el1' .*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwsmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwsmask_el1' +.*: *Info: macro .* .*: Error: selected processor does not support system register name 'trfcr_el1' .*: *Info: macro .* .*: Error: selected processor does not support system register name 'trfcr_el1' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8.s b/gas/testsuite/gas/aarch64/illegal-sysreg-8.s index a1a7ae6..0ce61dd 100644 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8.s +++ b/gas/testsuite/gas/aarch64/illegal-sysreg-8.s @@ -16,6 +16,8 @@ .arch armv8.2-a roreg ccsidr2_el1 + rwreg rcwmask_el1 + rwreg rcwsmask_el1 .arch armv8.3-a diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 5a0f0e9..f8d4c1a 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -5037,7 +5037,7 @@ aarch64_sys_ins_reg_supported_p (const aarch64_feature_set features, return true; if ((reg_value == CPENC (3,0,13,0,3) - || CPENC (3,0,13,0,6)) + || reg_value == CPENC (3,0,13,0,6)) && AARCH64_CPU_HAS_FEATURE (features, THE)) return true; diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index feea209..74fd669 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2578,8 +2578,6 @@ static const aarch64_feature_set aarch64_feature_chk = AARCH64_FEATURE (CHK); static const aarch64_feature_set aarch64_feature_gcs = AARCH64_FEATURE (GCS); -static const aarch64_feature_set aarch64_feature_the = - AARCH64_FEATURE (THE); #define CORE &aarch64_feature_v8 #define FP &aarch64_feature_fp @@ -2641,7 +2639,6 @@ static const aarch64_feature_set aarch64_feature_the = #define CSSC &aarch64_feature_cssc #define CHK &aarch64_feature_chk #define GCS &aarch64_feature_gcs -#define THE &aarch64_feature_the #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL } |