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-rw-r--r--gas/config/tc-i386.c4
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/intel-cmps.s49
-rw-r--r--gas/testsuite/gas/i386/intel-cmps32.d40
-rw-r--r--gas/testsuite/gas/i386/intel-cmps64.d50
-rw-r--r--gas/testsuite/gas/i386/intel-movs.s31
-rw-r--r--gas/testsuite/gas/i386/intel-movs32.d21
-rw-r--r--gas/testsuite/gas/i386/intel-movs64.d28
-rw-r--r--gas/testsuite/gas/i386/string-bad.l20
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/i386-opc.tbl8
-rw-r--r--opcodes/i386-tbl.h16
12 files changed, 251 insertions, 24 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 5d783b4..b9c3124 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6198,7 +6198,7 @@ check_string (void)
{
as_bad (_("`%s' operand %d must use `%ses' segment"),
i.tm.name,
- mem_op + 1,
+ intel_syntax ? i.tm.operands - mem_op : mem_op + 1,
register_prefix);
return 0;
}
@@ -6214,7 +6214,7 @@ check_string (void)
{
as_bad (_("`%s' operand %d must use `%ses' segment"),
i.tm.name,
- mem_op + 2,
+ intel_syntax ? i.tm.operands - mem_op - 1 : mem_op + 2,
register_prefix);
return 0;
}
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 988f3ff..80bb0d5 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -529,6 +529,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_list_test "reloc32" "--defsym _bad_=1"
run_dump_test "intel-got32"
run_dump_test "intel-movs32"
+ run_dump_test "intel-cmps32"
run_list_test "inval-equ-1" "-al"
run_list_test "inval-equ-2" "-al"
run_dump_test "ifunc"
@@ -717,6 +718,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-disp"
run_dump_test "x86-64-disp-intel"
run_dump_test "intel-movs64"
+ run_dump_test "intel-cmps64"
run_dump_test "x86-64-disp32"
run_dump_test "rexw"
run_list_test "x86-64-specific-reg"
diff --git a/gas/testsuite/gas/i386/intel-cmps.s b/gas/testsuite/gas/i386/intel-cmps.s
new file mode 100644
index 0000000..6703777
--- /dev/null
+++ b/gas/testsuite/gas/i386/intel-cmps.s
@@ -0,0 +1,49 @@
+ .text
+ .intel_syntax noprefix
+
+cmps:
+ cmpsb
+ cmpsb [esi], es:[edi]
+ cmpsb fs:[esi], es:[edi]
+ cmpsb [esi], [edi]
+ cmpsb byte ptr [esi], es:[edi]
+ cmpsb [esi], byte ptr es:[edi]
+ cmpsb byte ptr [esi], byte ptr es:[edi]
+ cmps byte ptr [esi], es:[edi]
+ cmps [esi], byte ptr es:[edi]
+ cmps byte ptr [esi], byte ptr es:[edi]
+
+ cmpsw
+ cmpsw [esi], es:[edi]
+ cmpsw fs:[esi], es:[edi]
+ cmpsw [esi], [edi]
+ cmpsw word ptr [esi], es:[edi]
+ cmpsw [esi], word ptr es:[edi]
+ cmpsw word ptr [esi], word ptr es:[edi]
+ cmps word ptr [esi], es:[edi]
+ cmps [esi], word ptr es:[edi]
+ cmps word ptr [esi], word ptr es:[edi]
+
+ cmpsd
+ cmpsd [esi], es:[edi]
+ cmpsd fs:[esi], es:[edi]
+ cmpsd [esi], [edi]
+ cmpsd dword ptr [esi], es:[edi]
+ cmpsd [esi], dword ptr es:[edi]
+ cmpsd dword ptr [esi], dword ptr es:[edi]
+ cmps dword ptr [esi], es:[edi]
+ cmps [esi], dword ptr es:[edi]
+ cmps dword ptr [esi], dword ptr es:[edi]
+
+.ifdef x86_64
+ cmpsq
+ cmpsq [rsi], es:[rdi]
+ cmpsq fs:[rsi], es:[rdi]
+ cmpsq [rsi], [rdi]
+ cmpsq qword ptr [rsi], es:[rdi]
+ cmpsq [rsi], qword ptr es:[rdi]
+ cmpsq qword ptr [rsi], qword ptr es:[rdi]
+ cmps qword ptr [rsi], es:[rdi]
+ cmps [rsi], qword ptr es:[rdi]
+ cmps qword ptr [rsi], qword ptr es:[rdi]
+.endif
diff --git a/gas/testsuite/gas/i386/intel-cmps32.d b/gas/testsuite/gas/i386/intel-cmps32.d
new file mode 100644
index 0000000..4dfb40d
--- /dev/null
+++ b/gas/testsuite/gas/i386/intel-cmps32.d
@@ -0,0 +1,40 @@
+#objdump: -dMintel
+#source: intel-cmps.s
+#name: x86 Intel cmps (32-bit object)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <cmps>:
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 64 a6 * cmps +BYTE PTR fs:\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[esi\]),(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 64 66 a7 * cmps +WORD PTR fs:\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[esi\]),(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 64 a7 * cmps +DWORD PTR fs:?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[esi\]),(DWORD PTR )?es:\[edi\]
+#pass
diff --git a/gas/testsuite/gas/i386/intel-cmps64.d b/gas/testsuite/gas/i386/intel-cmps64.d
new file mode 100644
index 0000000..e8590c3
--- /dev/null
+++ b/gas/testsuite/gas/i386/intel-cmps64.d
@@ -0,0 +1,50 @@
+#objdump: -dMintel
+#source: intel-cmps.s
+#name: x86 Intel cmps (64-bit object)
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+ <cmps>:
+[ ]*[a-f0-9]+: a6 * cmps(b *| +BYTE PTR (ds:)?\[rsi\]),(BYTE PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 64 67 a6 * cmps +BYTE PTR fs:\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a6 * cmps +BYTE PTR (ds:)?\[esi\],(BYTE PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 66 a7 * cmps(w *| +WORD PTR (ds:)?\[rsi\]),(WORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 64 67 66 a7 * cmps +WORD PTR fs:\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 66 a7 * cmps +WORD PTR (ds:)?\[esi\],(WORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: a7 * cmps(d *| +DWORD PTR (ds:)?\[rsi\]),(DWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 64 67 a7 * cmps +DWORD PTR fs:\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 67 a7 * cmps +DWORD PTR (ds:)?\[esi\],(DWORD PTR )?es:\[edi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 64 48 a7 * cmps +QWORD PTR fs:?\[rsi\],(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+[ ]*[a-f0-9]+: 48 a7 * cmps(q *| +QWORD PTR (ds:)?\[rsi\]),(QWORD PTR )?es:\[rdi\]
+#pass
diff --git a/gas/testsuite/gas/i386/intel-movs.s b/gas/testsuite/gas/i386/intel-movs.s
index 2ea1c96..ba54dec 100644
--- a/gas/testsuite/gas/i386/intel-movs.s
+++ b/gas/testsuite/gas/i386/intel-movs.s
@@ -5,14 +5,45 @@ movs:
movsb
movsb es:[edi], [esi]
movsb es:[edi], fs:[esi]
+ movsb [edi], [esi]
+ movsb byte ptr es:[edi], [esi]
+ movsb es:[edi], byte ptr [esi]
+ movsb byte ptr es:[edi], byte ptr [esi]
+ movs byte ptr es:[edi], [esi]
+ movs es:[edi], byte ptr [esi]
+ movs byte ptr es:[edi], byte ptr [esi]
+
movsw
movsw es:[edi], [esi]
movsw es:[edi], fs:[esi]
+ movsw [edi], [esi]
+ movsw word ptr es:[edi], [esi]
+ movsw es:[edi], word ptr [esi]
+ movsw word ptr es:[edi], word ptr [esi]
+ movs word ptr es:[edi], [esi]
+ movs es:[edi], word ptr [esi]
+ movs word ptr es:[edi], word ptr [esi]
+
movsd
movsd es:[edi], [esi]
movsd es:[edi], fs:[esi]
+ movsd [edi], [esi]
+ movsd dword ptr es:[edi], [esi]
+ movsd es:[edi], dword ptr [esi]
+ movsd dword ptr es:[edi], dword ptr [esi]
+ movs dword ptr es:[edi], [esi]
+ movs es:[edi], dword ptr [esi]
+ movs dword ptr es:[edi], dword ptr [esi]
+
.ifdef x86_64
movsq
movsq es:[rdi], [rsi]
movsq es:[rdi], fs:[rsi]
+ movsq [rdi], [rsi]
+ movsq qword ptr es:[rdi], [rsi]
+ movsq es:[rdi], qword ptr [rsi]
+ movsq qword ptr es:[rdi], qword ptr [rsi]
+ movs qword ptr es:[rdi], [rsi]
+ movs es:[rdi], qword ptr [rsi]
+ movs qword ptr es:[rdi], qword ptr [rsi]
.endif
diff --git a/gas/testsuite/gas/i386/intel-movs32.d b/gas/testsuite/gas/i386/intel-movs32.d
index 43d5033..f173148 100644
--- a/gas/testsuite/gas/i386/intel-movs32.d
+++ b/gas/testsuite/gas/i386/intel-movs32.d
@@ -10,10 +10,31 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: 64 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?fs:\[esi\]
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: 64 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?fs:\[esi\]
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
[ ]*[a-f0-9]+: 64 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?fs:?\[esi\]
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
+[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\])
#pass
diff --git a/gas/testsuite/gas/i386/intel-movs64.d b/gas/testsuite/gas/i386/intel-movs64.d
index b61be72..832239c 100644
--- a/gas/testsuite/gas/i386/intel-movs64.d
+++ b/gas/testsuite/gas/i386/intel-movs64.d
@@ -10,13 +10,41 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: a4 * movs(b *| +BYTE PTR es:\[rdi\],(BYTE PTR )?(ds:)?\[rsi\])
[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
[ ]*[a-f0-9]+: 64 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?fs:\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a4 * movs +BYTE PTR es:\[edi\],(BYTE PTR )?(ds:)?\[esi\]
[ ]*[a-f0-9]+: 66 a5 * movs(w *| +WORD PTR es:\[rdi\],(WORD PTR )?(ds:)?\[rsi\])
[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
[ ]*[a-f0-9]+: 64 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?fs:\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 66 a5 * movs +WORD PTR es:\[edi\],(WORD PTR )?(ds:)?\[esi\]
[ ]*[a-f0-9]+: a5 * movs(d *| +DWORD PTR es:\[rdi\],(DWORD PTR )?(ds:)?\[rsi\])
[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
[ ]*[a-f0-9]+: 64 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?fs:\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
+[ ]*[a-f0-9]+: 67 a5 * movs +DWORD PTR es:\[edi\],(DWORD PTR )?(ds:)?\[esi\]
[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
[ ]*[a-f0-9]+: 64 48 a5 * movs +QWORD PTR es:\[rdi\],(QWORD PTR )?fs:?\[rsi\]
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
+[ ]*[a-f0-9]+: 48 a5 * movs(q *| +QWORD PTR es:\[rdi\],(QWORD PTR )?(ds:)?\[rsi\])
#pass
diff --git a/gas/testsuite/gas/i386/string-bad.l b/gas/testsuite/gas/i386/string-bad.l
index f133afb..a1a126b 100644
--- a/gas/testsuite/gas/i386/string-bad.l
+++ b/gas/testsuite/gas/i386/string-bad.l
@@ -1,11 +1,11 @@
.*: Assembler messages:
.*:4: Error: .*
.*:5: Error: .*
-.*:6: Error: .*
-.*:7: Error: .*
-.*:8: Error: .*
-.*:9: Error: .*
-.*:10: Error: .*
+.*:6: Error: .*operand 2.*
+.*:7: Error: .*operand 1.*
+.*:8: Error: .*operand 1.*
+.*:9: Error: .*operand 1.*
+.*:10: Error: .*operand 2.*
.*:11: Warning: .*
.*:12: Warning: .*
.*:13: Warning: .*
@@ -14,13 +14,13 @@
.*:15: Error: .*
.*:19: Error: .*
.*:20: Error: .*
-.*:21: Error: .*
+.*:21: Error: .*operand 1.*
.*:22: Error: .*
-.*:23: Error: .*
-.*:24: Error: .*
+.*:23: Error: .*operand 1.*
+.*:24: Error: .*operand 2.*
.*:25: Error: .*
-.*:26: Error: .*
-.*:27: Error: .*
+.*:26: Error: .*operand 1.*
+.*:27: Error: .*operand 1.*
.*:28: Warning: .*
.*:29: Warning: .*
.*:30: Warning: .*
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ef50402..75167a0 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2019-10-07 Jan Beulich <jbeulich@suse.com>
+
+ * opcodes/i386-opc.tbl (movsd): Add Dword and IgnoreSize.
+ (cmpsd): Likewise. Move EsSeg to other operand.
+ * opcodes/i386-tbl.h: Re-generate.
+
2019-09-23 Alan Modra <amodra@gmail.com>
* m68k-dis.c: Include cpu-m68k.h
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 256ff04..2e0eadb 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -1381,8 +1381,8 @@ cmpunordsd, 2, 0xf20fc2, 0x3, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lS
cmppd, 3, 0x66c2, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexVVVV=1|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
cmppd, 3, 0x660fc2, None, 2, CpuSSE2, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Unspecified|BaseIndex, RegXMM }
// Intel mode string compare.
-cmpsd, 0, 0xa7, None, 1, 0, Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { 0 }
-cmpsd, 2, 0xa7, None, 1, 0, Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { Unspecified|BaseIndex, Unspecified|BaseIndex|EsSeg }
+cmpsd, 0, 0xa7, None, 1, 0, Size32|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { 0 }
+cmpsd, 2, 0xa7, None, 1, 0, Size32|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { Dword|Unspecified|BaseIndex|EsSeg, Dword|Unspecified|BaseIndex }
cmpsd, 3, 0xf2c2, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Imm8, Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
cmpsd, 3, 0xf20fc2, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
comisd, 2, 0x662f, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
@@ -1417,8 +1417,8 @@ movmskpd, 2, 0x660f50, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSu
movntpd, 2, 0x662b, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { RegXMM, Xmmword|Unspecified|BaseIndex }
movntpd, 2, 0x660f2b, None, 2, CpuSSE2, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex }
// Intel mode string move.
-movsd, 0, 0xa5, None, 1, 0, Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { 0 }
-movsd, 2, 0xa5, None, 1, 0, Size32|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { Unspecified|BaseIndex, Unspecified|BaseIndex|EsSeg }
+movsd, 0, 0xa5, None, 1, 0, Size32|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { 0 }
+movsd, 2, 0xa5, None, 1, 0, Size32|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|IsString|RepPrefixOk, { Dword|Unspecified|BaseIndex, Dword|Unspecified|BaseIndex|EsSeg }
movsd, 2, 0xf210, None, 1, CpuAVX, D|Modrm|Vex=3|VexOpcode=0|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM }
movsd, 2, 0xf210, None, 1, CpuAVX, D|Modrm|Vex=3|VexOpcode=0|VexVVVV=1|VexW=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { RegXMM, RegXMM }
movsd, 2, 0xf20f10, None, 2, CpuSSE2, D|Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index 89c752e..6e2ad05 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -15594,7 +15594,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0 } },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 1, 1, 1, 1, 1,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 1, 0, 1, 1, 1, 1, 1,
1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
@@ -15607,14 +15607,14 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0 } },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 1, 1, 1, 1, 1,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 1, 0, 1, 1, 1, 1, 1,
1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+ 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } },
+ 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } },
{ "cmpsd", 3, 0xf2c2, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -16121,7 +16121,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0 } },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 1, 1, 1, 1, 1,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 1, 0, 1, 1, 1, 1, 1,
1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
@@ -16134,14 +16134,14 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0 } },
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 1, 1, 1, 1, 1,
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 1, 0, 1, 1, 1, 1, 1,
1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
+ 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } },
+ 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } } },
{ "movsd", 2, 0xf210, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,
generated by cgit v1.1 at 2024-11-24 10:11:03 +0000