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-rw-r--r--include/ChangeLog5
-rw-r--r--include/dis-asm.h6
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/cgen-dis.in2
4 files changed, 16 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 9ac65a0..e482f97 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2002-02-05 Frank Ch. Eigler <fche@redhat.com>
+
+ * dis-asm.h (disassemble_info): New field `insn_sets'.
+ (INIT_DISASSEMBLE_INFO): Clear it.
+
2002-02-05 Jason Merrill <jason@redhat.com>
* demangle.h (cplus_demangle_v3): Add "options" parm.
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 8cd848d..5b9e390 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -73,6 +73,11 @@ typedef struct disassemble_info {
unsigned long mach;
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
enum bfd_endian endian;
+ /* An arch/mach-specific bitmask of selected instruction subsets, mainly
+ for processors with run-time-switchable instruction sets. The default,
+ zero, means that there is no constraint. CGEN-based opcodes ports
+ may use ISA_foo masks. */
+ unsigned long insn_sets;
/* Some targets need information about the current section to accurately
display insns. If this is NULL, the target disassembler function
@@ -275,6 +280,7 @@ extern int generic_symbol_at_address
(INFO).flavour = bfd_target_unknown_flavour, \
(INFO).arch = bfd_arch_unknown, \
(INFO).mach = 0, \
+ (INFO).insn_sets = 0, \
(INFO).endian = BFD_ENDIAN_UNKNOWN, \
(INFO).octets_per_byte = 1, \
INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 3230a49..7454484 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2002-02-04 Frank Ch. Eigler <fche@redhat.com>
+
+ * cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
+
2002-02-04 Alexandre Oliva <aoliva@redhat.com>
* sh-opc.h (sh_arg_type): Added A_DISP_PC_ABS.
diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in
index f2c9dd5..c78723e 100644
--- a/opcodes/cgen-dis.in
+++ b/opcodes/cgen-dis.in
@@ -386,7 +386,7 @@ print_insn_@arch@ (pc, info)
#ifdef CGEN_COMPUTE_ISA
isa = CGEN_COMPUTE_ISA (info);
#else
- isa = 0;
+ isa = info->insn_sets;
#endif
/* If we've switched cpu's, close the current table and open a new one. */