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-rw-r--r--gas/config/tc-i386.c1
-rw-r--r--gas/doc/c-i386.texi4
-rw-r--r--gas/testsuite/gas/i386/arch-15-znver5.d5
-rw-r--r--gas/testsuite/gas/i386/arch-15.d13
-rw-r--r--gas/testsuite/gas/i386/arch-15.s7
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-5-znver5.d5
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-5.d14
-rw-r--r--gas/testsuite/gas/i386/x86-64-arch-5.s8
-rw-r--r--gas/testsuite/gas/i386/x86-64.exp2
-rw-r--r--opcodes/i386-gen.c2
-rw-r--r--opcodes/i386-init.h10
12 files changed, 72 insertions, 1 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index f4feca0..27d0742 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1018,6 +1018,7 @@ static const arch_entry cpu_arch[] =
ARCH (znver2, ZNVER, ZNVER2, false),
ARCH (znver3, ZNVER, ZNVER3, false),
ARCH (znver4, ZNVER, ZNVER4, false),
+ ARCH (znver5, ZNVER, ZNVER5, false),
ARCH (btver1, BT, BTVER1, false),
ARCH (btver2, BT, BTVER2, false),
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index f3f7890..b555eef 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -125,6 +125,7 @@ processor names are recognized:
@code{znver2},
@code{znver3},
@code{znver4},
+@code{znver5},
@code{btver1},
@code{btver2},
@code{generic32} and
@@ -1632,7 +1633,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{k6} @tab @samp{k6_2} @tab @samp{athlon} @tab @samp{k8}
@item @samp{amdfam10} @tab @samp{bdver1} @tab @samp{bdver2} @tab @samp{bdver3}
@item @samp{bdver4} @tab @samp{znver1} @tab @samp{znver2} @tab @samp{znver3}
-@item @samp{znver4} @tab @samp{btver1} @tab @samp{btver2} @tab @samp{generic32}
+@item @samp{znver4} @tab @samp{znver5} @tab @samp{btver1} @tab @samp{btver2}
+@item @samp{generic32}
@item @samp{generic64} @tab @samp{.cmov} @tab @samp{.fxsr} @tab @samp{.mmx}
@item @samp{.sse} @tab @samp{.sse2} @tab @samp{.sse3} @tab @samp{.sse4a}
@item @samp{.ssse3} @tab @samp{.sse4.1} @tab @samp{.sse4.2} @tab @samp{.sse4}
diff --git a/gas/testsuite/gas/i386/arch-15-znver5.d b/gas/testsuite/gas/i386/arch-15-znver5.d
new file mode 100644
index 0000000..378daa6
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-15-znver5.d
@@ -0,0 +1,5 @@
+#source: arch-15.s
+#as: -march=znver5
+#objdump: -dw
+#name: i386 arch 15 (znver5)
+#dump: arch-15.d
diff --git a/gas/testsuite/gas/i386/arch-15.d b/gas/testsuite/gas/i386/arch-15.d
new file mode 100644
index 0000000..33de12a
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-15.d
@@ -0,0 +1,13 @@
+#objdump: -dw
+#name: i386 arch 15
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+:[ ]*c4 e2 59 50 d2[ ]*\{vex\} vpdpbusd %xmm2,%xmm4,%xmm2
+[ ]*[a-f0-9]+:[ ]*0f 38 f9 01[ ]*movdiri %eax,\(%ecx\)
+[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%ecx\),%eax
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
+#pass
diff --git a/gas/testsuite/gas/i386/arch-15.s b/gas/testsuite/gas/i386/arch-15.s
new file mode 100644
index 0000000..e3b70e5
--- /dev/null
+++ b/gas/testsuite/gas/i386/arch-15.s
@@ -0,0 +1,7 @@
+# Test -march=
+ .text
+
+ {vex} vpdpbusd %xmm2, %xmm4, %xmm2 #AVX_VNNI
+ movdiri %eax, (%ecx) #MOVDIRI
+ movdir64b (%ecx), %eax #MOVDIR64B
+ vp2intersectd %zmm1, %zmm2, %k3 #AVX512_VP2INTERSECT
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 8e990a8..f0c03ce 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -204,6 +204,7 @@ if [gas_32_check] then {
run_dump_test "arch-13-znver2"
run_dump_test "arch-14-znver3"
run_dump_test "arch-14-znver4"
+ run_dump_test "arch-15-znver5"
run_dump_test "arch-10-btver1"
run_dump_test "arch-10-btver2"
run_list_test "arch-10-1" "-march=generic32 -I${srcdir}/$subdir -al"
@@ -217,6 +218,7 @@ if [gas_32_check] then {
run_dump_test "arch-13"
run_dump_test "arch-14"
run_dump_test "arch-14-1"
+ run_dump_test "arch-15"
run_list_test "arch-dflt" "-march=generic32 -al"
run_list_test "arch-stk" "-march=generic32 -al"
run_dump_test "8087"
diff --git a/gas/testsuite/gas/i386/x86-64-arch-5-znver5.d b/gas/testsuite/gas/i386/x86-64-arch-5-znver5.d
new file mode 100644
index 0000000..f7d6342
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-5-znver5.d
@@ -0,0 +1,5 @@
+#source: x86-64-arch-5.s
+#as: -march=znver5
+#objdump: -dw
+#name: x86-64 arch 5 (znver5)
+#dump: x86-64-arch-5.d
diff --git a/gas/testsuite/gas/i386/x86-64-arch-5.d b/gas/testsuite/gas/i386/x86-64-arch-5.d
new file mode 100644
index 0000000..dfcdc85
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-5.d
@@ -0,0 +1,14 @@
+#objdump: -dw
+#name: x86-64 arch 5
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ ]*[a-f0-9]+:[ ]*c4 c2 59 50 d4[ ]*\{vex\} vpdpbusd %xmm12,%xmm4,%xmm2
+[ ]*[a-f0-9]+:[ ]*48 0f 38 f9 01[ ]*movdiri %rax,\(%rcx\)
+[ ]*[a-f0-9]+:[ ]*66 0f 38 f8 01[ ]*movdir64b \(%rcx\),%rax
+[ ]*[a-f0-9]+:[ ]*62 f2 6f 48 68 d9[ ]*vp2intersectd %zmm1,%zmm2,%k3
+[ ]*[a-f0-9]+:[ ]*0f 18 3d 78 56 34 12[ ]*prefetchit0 0x12345678\(%rip\) # 0x[0-9a-f]+
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-arch-5.s b/gas/testsuite/gas/i386/x86-64-arch-5.s
new file mode 100644
index 0000000..f359f4e
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-arch-5.s
@@ -0,0 +1,8 @@
+# Test -march=
+ .text
+
+ {vex} vpdpbusd %xmm12, %xmm4, %xmm2 #AVX_VNNI
+ movdiri %rax, (%rcx) #MOVDIRI
+ movdir64b (%rcx), %rax #MOVDIR64B
+ vp2intersectd %zmm1, %zmm2, %k3 #AVX512_VP2INTERSECT
+ prefetchit0 0x12345678(%rip) #prefetchi
diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
index 95ca314..6932ba9 100644
--- a/gas/testsuite/gas/i386/x86-64.exp
+++ b/gas/testsuite/gas/i386/x86-64.exp
@@ -174,6 +174,7 @@ run_dump_test "x86-64-arch-3"
run_dump_test "x86-64-arch-4"
run_dump_test "x86-64-arch-4-1"
run_dump_test "rmpquery"
+run_dump_test "x86-64-arch-5"
run_dump_test "x86-64-arch-2-lzcnt"
run_dump_test "x86-64-arch-2-prefetchw"
run_dump_test "x86-64-arch-2-bdver1"
@@ -184,6 +185,7 @@ run_dump_test "x86-64-arch-3-znver1"
run_dump_test "x86-64-arch-3-znver2"
run_dump_test "x86-64-arch-4-znver3"
run_dump_test "x86-64-arch-4-znver4"
+run_dump_test "x86-64-arch-5-znver5"
run_dump_test "x86-64-arch-2-btver1"
run_dump_test "x86-64-arch-2-btver2"
run_list_test "x86-64-arch-2-1" "-march=generic64 -I${srcdir}/$subdir -al"
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index a54635e..e8b92e3 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -94,6 +94,8 @@ static const dependency isa_dependencies[] =
"ZNVER2|INVLPGB|TLBSYNC|VAES|VPCLMULQDQ|INVPCID|SNP|OSPKE" },
{ "ZNVER4",
"ZNVER3|AVX512F|AVX512DQ|AVX512IFMA|AVX512CD|AVX512BW|AVX512VL|AVX512_BF16|AVX512VBMI|AVX512_VBMI2|AVX512_VNNI|AVX512_BITALG|AVX512_VPOPCNTDQ|GFNI|RMPQUERY" },
+ { "ZNVER5",
+ "ZNVER4|AVX_VNNI|MOVDIRI|MOVDIR64B|AVX512_VP2INTERSECT|PREFETCHI" },
{ "BTVER1",
"GENERIC64|FISTTP|MONITOR|CX16|LAHF_SAHF|Rdtscp|SSSE3|SSE4A|ABM|PRFCHW|Clflush|FISTTP|SVME" },
{ "BTVER2",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 59bcbf5..9c67063 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -1698,6 +1698,16 @@
0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, \
0, 1, 1, 0, 0, 0 } }
+#define CPU_ZNVER5_FLAGS \
+ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
+ 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, \
+ 1, 0, 0, 0, 1, 0, 1, 1, 1, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, \
+ 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, \
+ 1, 1, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, \
+ 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, \
+ 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, \
+ 0, 1, 1, 0, 0, 0 } }
+
#define CPU_BTVER1_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
generated by cgit v1.1 at 2024-11-22 03:07:00 +0000