diff options
| -rw-r--r-- | sim/aarch64/ChangeLog | 1 | ||||
| -rw-r--r-- | sim/aarch64/cpustate.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog index e8f8b48..df1a343 100644 --- a/sim/aarch64/ChangeLog +++ b/sim/aarch64/ChangeLog @@ -7,6 +7,7 @@ (GET_VEC_ELEMENT): Fix off by one error checking for an invalid element index. (SET_VEC_ELEMENT): Likewise. + (GET_VEC_ELEMENT): And fix thinko using macro arguments. * memory.c: Trace memory reads when --trace-memory is enabled. Remove float and double load and store functions. diff --git a/sim/aarch64/cpustate.c b/sim/aarch64/cpustate.c index 19f485e..50a83c9 100644 --- a/sim/aarch64/cpustate.c +++ b/sim/aarch64/cpustate.c @@ -345,7 +345,7 @@ aarch64_set_FP_long_double (sim_cpu *cpu, VReg reg, FRegister a) #define GET_VEC_ELEMENT(REG, ELEMENT, FIELD) \ do \ { \ - if (element >= ARRAY_SIZE (cpu->fr[0].FIELD)) \ + if (ELEMENT >= ARRAY_SIZE (cpu->fr[0].FIELD)) \ { \ TRACE_REGISTER (cpu, \ "Internal SIM error: invalid element number: %d ",\ |