diff options
| -rw-r--r-- | sim/common/ChangeLog | 30 | ||||
| -rw-r--r-- | sim/common/sim-basics.h | 117 | ||||
| -rw-r--r-- | sim/common/sim-config.h | 197 | ||||
| -rw-r--r-- | sim/common/sim-n-bits.h | 85 | ||||
| -rw-r--r-- | sim/testsuite/.Sanitize | 2 | ||||
| -rw-r--r-- | sim/testsuite/common/Makefile.in | 33 |
6 files changed, 431 insertions, 33 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog index 6d79b31..06dd092 100644 --- a/sim/common/ChangeLog +++ b/sim/common/ChangeLog @@ -1,3 +1,33 @@ +Tue Apr 15 15:08:12 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * sim-assert.h (SIM_ASSERT, ASSERT): Allow these macros to + be overriden. + +Wed Apr 9 16:06:44 1997 Andrew Cagney <cagney@kremvax.cygnus.com> + + * sim-basics.h: Only bring in config.h and tconfig.h if + HAVE_CONFIG_H. + +Mon Apr 7 11:39:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com> + + * sim-config.h (WITH_TARGET_WORD_MSB): New Macro. Define the bit + numbering convention of the target. + * sim-config.c (print_sim_config): Print WITH_TARGET_WORD_BITSIZE + and WITH_TARGET_WORD_MSB. + (sim_config): When possible, check for consistency with bitsize + and msb. + + * sim-bits.h: Allow MSB to be other than zero. + * sim-bits.c: Ditto. + * sim-n-bits.h: Ditto. + + * sim-bits.h (MSMASK*): New macros - converce to LSMASK*. + * sim-n-bits.h (MSMASKEDn): Ditto. + +Mon Apr 14 16:29:21 1997 Ian Lance Taylor <ian@cygnus.com> + + * Makefile.in (INSTALL): Change install.sh to install-sh. + Mon Apr 7 10:46:38 1997 Doug Evans <dje@canuck.cygnus.com> * sim-base.h (sim_state_base): Move `magic' to end of struct. diff --git a/sim/common/sim-basics.h b/sim/common/sim-basics.h new file mode 100644 index 0000000..f31305f --- /dev/null +++ b/sim/common/sim-basics.h @@ -0,0 +1,117 @@ +/* This file is part of the program psim. + + Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> + Copyright (C) 1997, Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + */ + + +#ifndef _SIM_BASICS_H_ +#define _SIM_BASICS_H_ + + +/* Basic configuration */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +/* Basic host dependant mess - hopefully <stdio.h> + <stdarg.h> will + bring potential conflicts out in the open */ + +#include <stdarg.h> +#include <stdio.h> +#include <setjmp.h> + +#ifndef NULL +#define NULL 0 +#endif + + + + +/* Some versions of GCC include an attribute operator, define it */ + +#if !defined (__attribute__) +#if (!defined(__GNUC__) \ + || (__GNUC__ < 2) \ + || (__GNUC__ == 2 && __GNUC_MINOR__ < 6)) +#define __attribute__(arg) +#endif +#endif + + + +/* Memory management with an allocator that clears memory before use. */ + +void *zalloc (unsigned long size); + +#define ZALLOC(TYPE) (TYPE*)zalloc(sizeof (TYPE)) + +void zfree(void*); + + + +/* Global types that code manipulates */ + +typedef struct _device device; + + +/* Address access attributes */ +typedef enum _access_type { + access_invalid = 0, + access_read = 1, + access_write = 2, + access_read_write = 3, + access_exec = 4, + access_read_exec = 5, + access_write_exec = 6, + access_read_write_exec = 7, +} access_type; + + +/* Address attachement types */ +typedef enum _attach_type { + attach_invalid, + attach_raw_memory, + attach_callback, + /* ... */ +} attach_type; + + + +/* Basic definitions - ordered so that nothing calls what comes after + it */ + +#ifdef HAVE_CONFIG_H +#include "tconfig.h" +#endif +#include "ansidecl.h" +#include "callback.h" +#include "remote-sim.h" + +#include "sim-config.h" + +#include "sim-base.h" + +#include "sim-inline.h" + +#include "sim-types.h" +#include "sim-bits.h" +#include "sim-endian.h" + +#endif /* _SIM_BASICS_H_ */ diff --git a/sim/common/sim-config.h b/sim/common/sim-config.h index c7e72b6..1205920 100644 --- a/sim/common/sim-config.h +++ b/sim/common/sim-config.h @@ -22,6 +22,189 @@ #ifndef _PSIM_CONFIG_H_ #define _PSIM_CONFIG_H_ +/* Host dependant: + + The CPP below defines information about the compilation host. In + particular it defines the macro's: + + WITH_HOST_BYTE_ORDER The byte order of the host. Could + be any of LITTLE_ENDIAN, BIG_ENDIAN + or 0 (unknown). Those macro's also + need to be defined. + + */ + + +/* NetBSD: + + NetBSD is easy, everything you could ever want is in a header file + (well almost :-) */ + +#if defined(__NetBSD__) +# include <machine/endian.h> +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER BYTE_ORDER +# endif +# if (BYTE_ORDER != WITH_HOST_BYTE_ORDER) +# error "host endian incorrectly configured, check config.h" +# endif +#endif + +/* Linux is similarly easy. */ + +#if defined(__linux__) +# include <endian.h> +# include <asm/byteorder.h> +# if defined(__LITTLE_ENDIAN) && !defined(LITTLE_ENDIAN) +# define LITTLE_ENDIAN __LITTLE_ENDIAN +# endif +# if defined(__BIG_ENDIAN) && !defined(BIG_ENDIAN) +# define BIG_ENDIAN __BIG_ENDIAN +# endif +# if defined(__BYTE_ORDER) && !defined(BYTE_ORDER) +# define BYTE_ORDER __BYTE_ORDER +# endif +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER BYTE_ORDER +# endif +# if (BYTE_ORDER != WITH_HOST_BYTE_ORDER) +# error "host endian incorrectly configured, check config.h" +# endif +#endif + +/* INSERT HERE - hosts that have available LITTLE_ENDIAN and + BIG_ENDIAN macro's */ + + +/* Some hosts don't define LITTLE_ENDIAN or BIG_ENDIAN, help them out */ + +#ifndef LITTLE_ENDIAN +#define LITTLE_ENDIAN 1234 +#endif +#ifndef BIG_ENDIAN +#define BIG_ENDIAN 4321 +#endif + + +/* SunOS on SPARC: + + Big endian last time I looked */ + +#if defined(sparc) || defined(__sparc__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER BIG_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN) +# error "sun was big endian last time I looked ..." +# endif +#endif + + +/* Random x86 + + Little endian last time I looked */ + +#if defined(i386) || defined(i486) || defined(i586) || defined (i686) || defined(__i386__) || defined(__i486__) || defined(__i586__) || defined (__i686__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN) +# error "x86 was little endian last time I looked ..." +# endif +#endif + +#if (defined (__i486__) || defined (__i586__) || defined (__i686__)) && defined(__GNUC__) && WITH_BSWAP +#undef htonl +#undef ntohl +#define htonl(IN) __extension__ ({ int _out; __asm__ ("bswap %0" : "=r" (_out) : "0" (IN)); _out; }) +#define ntohl(IN) __extension__ ({ int _out; __asm__ ("bswap %0" : "=r" (_out) : "0" (IN)); _out; }) +#endif + +/* Power or PowerPC running AIX */ +#if defined(_POWER) && defined(_AIX) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER BIG_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN) +# error "Power/PowerPC AIX was big endian last time I looked ..." +# endif +#endif + +/* Solaris running PowerPC */ +#if defined(__PPC) && defined(__sun__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN) +# error "Solaris on PowerPCs was little endian last time I looked ..." +# endif +#endif + +/* HP/PA */ +#if defined(__hppa__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER BIG_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN) +# error "HP/PA was big endian last time I looked ..." +# endif +#endif + +/* Big endian MIPS */ +#if defined(__MIPSEB__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER BIG_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != BIG_ENDIAN) +# error "MIPSEB was big endian last time I looked ..." +# endif +#endif + +/* Little endian MIPS */ +#if defined(__MIPSEL__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN) +# error "MIPSEL was little endian last time I looked ..." +# endif +#endif + +/* Windows NT */ +#if defined(__WIN32__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN) +# error "Windows NT was little endian last time I looked ..." +# endif +#endif + +/* Alpha running DEC unix */ +#if defined(__osf__) && defined(__alpha__) +# if (WITH_HOST_BYTE_ORDER == 0) +# undef WITH_HOST_BYTE_ORDER +# define WITH_HOST_BYTE_ORDER LITTLE_ENDIAN +# endif +# if (WITH_HOST_BYTE_ORDER != LITTLE_ENDIAN) +# error "AXP running DEC unix was little endian last time I looked ..." +# endif +#endif + + +/* INSERT HERE - additional hosts that do not have LITTLE_ENDIAN and + BIG_ENDIAN definitions available. */ + /* endianness of the host/target: @@ -110,6 +293,20 @@ extern int current_target_byte_order; +/* Most significant bit of target: + + Set this according to your target's bit numbering convention. For + the PowerPC it is zero, for many other targets it is 31 or 63. + + For targets that can both have either 32 or 64 bit words and number + MSB as 31, 63. Define this to be (WITH_TARGET_WORD_BITSIZE - 1) */ + +#ifndef WITH_TARGET_WORD_MSB +#define WITH_TARGET_WORD_MSB 0 +#endif + + + /* Program environment: Three environments are available - UEA (user), VEA (virtual) and diff --git a/sim/common/sim-n-bits.h b/sim/common/sim-n-bits.h index 0359c03..bb78779 100644 --- a/sim/common/sim-n-bits.h +++ b/sim/common/sim-n-bits.h @@ -24,12 +24,17 @@ #error "N must be #defined" #endif +#include "sim-xcat.h" + /* NOTE: See end of file for #undef */ #define unsignedN XCONCAT2(unsigned,N) #define signedN XCONCAT2(signed,N) #define MASKEDn XCONCAT2(MASKED,N) #define MASKn XCONCAT2(MASK,N) #define LSMASKEDn XCONCAT2(LSMASKED,N) +#define LSMASKn XCONCAT2(LSMASK,N) +#define MSMASKEDn XCONCAT2(MSMASKED,N) +#define MSMASKn XCONCAT2(MSMASK,N) #define EXTRACTEDn XCONCAT2(EXTRACTED,N) #define INSERTEDn XCONCAT2(INSERTED,N) #define ROTn XCONCAT2(ROT,N) @@ -40,56 +45,65 @@ INLINE_SIM_BITS\ (unsignedN) -MASKEDn(unsignedN word, - unsigned start, - unsigned stop) +MASKEDn (unsignedN word, + unsigned start, + unsigned stop) { - return (word & MASKn(start, stop)); + return (word & MASKn (start, stop)); } INLINE_SIM_BITS\ (unsignedN) -LSMASKEDn(unsignedN word, - unsigned nr_bits) +LSMASKEDn (unsignedN word, + unsigned nr_bits) { - return (word & MASKn(N - nr_bits, N - 1)); + return (word & LSMASKn (nr_bits)); } INLINE_SIM_BITS\ (unsignedN) -EXTRACTEDn(unsignedN val, - unsigned start, - unsigned stop) +MSMASKEDn (unsignedN word, + unsigned nr_bits) { - return LSMASKEDn((((unsignedN)(val)) >> (N - stop - 1)), - stop - start + 1); + return (word & MSMASKn (nr_bits)); } INLINE_SIM_BITS\ (unsignedN) -INSERTEDn(unsignedN val, - unsigned start, - unsigned stop) +EXTRACTEDn (unsignedN val, + unsigned start, + unsigned stop) { - return (((unsignedN)(val) - << _MAKE_SHIFT(N, stop)) - & MASKn(start, stop)); + val <<= _MSB_SHIFT (N, start); + val >>= (_MSB_SHIFT (N, start) + _LSB_SHIFT (N, stop)); + return val; } INLINE_SIM_BITS\ (unsignedN) -ROTn(unsignedN val, - int shift) +INSERTEDn (unsignedN val, + unsigned start, + unsigned stop) +{ + val &= LSMASKn (_MAKE_WIDTH (start, stop)); + val <<= _LSB_SHIFT (N, stop); + return val; +} + + +INLINE_SIM_BITS\ +(unsignedN) +ROTn (unsignedN val, + int shift) { - unsignedN result; if (shift > 0) - return ROTRn(val, shift); + return ROTRn (val, shift); else if (shift < 0) - return ROTLn(val, -shift); + return ROTLn (val, -shift); else return val; } @@ -97,11 +111,11 @@ ROTn(unsignedN val, INLINE_SIM_BITS\ (unsignedN) -ROTLn(unsignedN val, - unsigned shift) +ROTLn (unsignedN val, + unsigned shift) { unsignedN result; - ASSERT(shift <= N); + ASSERT (shift <= N); result = (((val) << (shift)) | ((val) >> ((N)-(shift)))); return result; } @@ -109,11 +123,11 @@ ROTLn(unsignedN val, INLINE_SIM_BITS\ (unsignedN) -ROTRn(unsignedN val, - unsigned shift) +ROTRn (unsignedN val, + unsigned shift) { unsignedN result; - ASSERT(shift <= N); + ASSERT (shift <= N); result = (((val) >> (shift)) | ((val) << ((N)-(shift)))); return result; } @@ -121,13 +135,15 @@ ROTRn(unsignedN val, INLINE_SIM_BITS\ (unsignedN) -SEXTn(signedN val, - unsigned sign_bit) +SEXTn (signedN val, + unsigned sign_bit) { /* make the sign-bit most significant and then smear it back into position */ - ASSERT(sign_bit < N); - return (val << sign_bit) >> sign_bit; + ASSERT (sign_bit < N); + val <<= _MSB_SHIFT (N, sign_bit); + val >>= _MSB_SHIFT (N, sign_bit); + return val; } @@ -139,6 +155,9 @@ SEXTn(signedN val, #undef INSERTEDn #undef EXTRACTEDn #undef LSMASKEDn +#undef LSMASKn +#undef MSMASKEDn +#undef MSMASKn #undef MASKn #undef MASKEDn #undef signedN diff --git a/sim/testsuite/.Sanitize b/sim/testsuite/.Sanitize index 5f90a8c..558b4e5 100644 --- a/sim/testsuite/.Sanitize +++ b/sim/testsuite/.Sanitize @@ -37,6 +37,8 @@ configure.in Things-to-lose: +common + Do-last: d30v_files="configure configure.in ChangeLog Makefile.in" diff --git a/sim/testsuite/common/Makefile.in b/sim/testsuite/common/Makefile.in new file mode 100644 index 0000000..12e0977 --- /dev/null +++ b/sim/testsuite/common/Makefile.in @@ -0,0 +1,33 @@ +CFLAGS = -Wall -Werror -I../../common -I../../../include -g + +check: bits32m0.ok bits32m31.ok bits64m0.ok bits64m63.ok + +clean: + rm -f *.o + rm -f *.ok + rm -f bits32m0 bits32m31 bits64m0 bits64m63 bits-gen + rm -f tmp-* + +.SUFIXES: .ok +%.ok: % + ./$< + touch $<.ok + +all: bits32m0 bits32m31 bits64m0 bits64m63 + +bits32m0.c: bits-gen bits-tst.c + ./bits-gen 32 0 > tmp-bits32m0.c + cat bits-tst.c >> tmp-bits32m0.c + mv tmp-bits32m0.c bits32m0.c +bits32m31.c: bits-gen bits-tst.c + ./bits-gen 32 31 > tmp-bits32m31.c + cat bits-tst.c >> tmp-bits32m31.c + mv tmp-bits32m31.c bits32m31.c +bits64m0.c: bits-gen bits-tst.c + ./bits-gen 64 0 > tmp-bits64m0.c + cat bits-tst.c >> tmp-bits64m0.c + mv tmp-bits64m0.c bits64m0.c +bits64m63.c: bits-gen bits-tst.c + ./bits-gen 64 63 > tmp-bits64m63.c + cat bits-tst.c >> tmp-bits64m63.c + mv tmp-bits64m63.c bits64m63.c |