diff options
-rw-r--r-- | bfd/ChangeLog | 4 | ||||
-rw-r--r-- | bfd/elf64-ppc.c | 52 | ||||
-rw-r--r-- | gas/ChangeLog | 9 | ||||
-rw-r--r-- | gas/config/tc-ppc.c | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/prefix-align.d | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/prefix-pcrel.d | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/ppc/prefix-reloc.d | 4 | ||||
-rw-r--r-- | gold/ChangeLog | 4 | ||||
-rw-r--r-- | gold/powerpc.cc | 38 | ||||
-rw-r--r-- | include/ChangeLog | 5 | ||||
-rw-r--r-- | include/elf/ppc64.h | 2 | ||||
-rw-r--r-- | include/opcode/ppc.h | 4 | ||||
-rw-r--r-- | ld/ChangeLog | 10 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/callstub-1.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/notoc2.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/powerpc.exp | 8 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsgd.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsie.d | 4 | ||||
-rw-r--r-- | ld/testsuite/ld-powerpc/tlsld.d | 4 | ||||
-rw-r--r-- | opcodes/ChangeLog | 6 | ||||
-rw-r--r-- | opcodes/ppc-dis.c | 9 | ||||
-rw-r--r-- | opcodes/ppc-opc.c | 56 |
22 files changed, 144 insertions, 101 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 38ff455..b99f437 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,9 @@ 2020-05-11 Alan Modra <amodra@gmail.com> + * elf64-ppc.c: Rename powerxx to power10 throughout. + +2020-05-11 Alan Modra <amodra@gmail.com> + PR 25961 * coffgen.c (coff_get_normalized_symtab): Check that buffer contains required number of auxents before processing any auxent. diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index 53e5d91..ae4a4ba 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -2914,7 +2914,7 @@ must_be_dyn_reloc (struct bfd_link_info *info, . mtctr %r12 . bctr - There are also ELFv1 powerxx variants of these stubs. + There are also ELFv1 power10 variants of these stubs. ppc_stub_long_branch_notoc: . pla %r12,dest@pcrel . b dest @@ -2937,7 +2937,7 @@ must_be_dyn_reloc (struct bfd_link_info *info, In cases where the high instructions would add zero, they are omitted and following instructions modified in some cases. - For example, a powerxx ppc_stub_plt_call_notoc might simplify down + For example, a power10 ppc_stub_plt_call_notoc might simplify down to . pld %r12,xxx@pcrel . mtctr %r12 @@ -3238,8 +3238,8 @@ struct ppc_link_hash_table /* Whether calls are made via the PLT from NOTOC functions. */ unsigned int notoc_plt:1; - /* Whether to use powerxx instructions in linkage stubs. */ - unsigned int powerxx_stubs:1; + /* Whether to use power10 instructions in linkage stubs. */ + unsigned int power10_stubs:1; /* Incremented every time we size stubs. */ unsigned int stub_iteration; @@ -4604,7 +4604,7 @@ ppc64_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_PPC64_PLT_PCREL34: case R_PPC64_PLT_PCREL34_NOTOC: case R_PPC64_PCREL28: - htab->powerxx_stubs = 1; + htab->power10_stubs = 1; break; default: break; @@ -10597,7 +10597,7 @@ emit_relocs_for_offset (struct bfd_link_info *info, Elf_Internal_Rela *r, } static bfd_byte * -build_powerxx_offset (bfd *abfd, bfd_byte *p, bfd_vma off, int odd, +build_power10_offset (bfd *abfd, bfd_byte *p, bfd_vma off, int odd, bfd_boolean load) { uint64_t insn; @@ -10679,7 +10679,7 @@ build_powerxx_offset (bfd *abfd, bfd_byte *p, bfd_vma off, int odd, } static unsigned int -size_powerxx_offset (bfd_vma off, int odd) +size_power10_offset (bfd_vma off, int odd) { if (off - odd + (1ULL << 33) < 1ULL << 34) return odd + 8; @@ -10690,7 +10690,7 @@ size_powerxx_offset (bfd_vma off, int odd) } static unsigned int -num_relocs_for_powerxx_offset (bfd_vma off, int odd) +num_relocs_for_power10_offset (bfd_vma off, int odd) { if (off - odd + (1ULL << 33) < 1ULL << 34) return 1; @@ -10701,7 +10701,7 @@ num_relocs_for_powerxx_offset (bfd_vma off, int odd) } static Elf_Internal_Rela * -emit_relocs_for_powerxx_offset (struct bfd_link_info *info, +emit_relocs_for_power10_offset (struct bfd_link_info *info, Elf_Internal_Rela *r, bfd_vma roff, bfd_vma targ, bfd_vma off, int odd) { @@ -10813,14 +10813,14 @@ plt_stub_size (struct ppc_link_hash_table *htab, if (stub_entry->stub_type >= ppc_stub_plt_call_notoc) { - if (htab->powerxx_stubs) + if (htab->power10_stubs) { bfd_vma start = (stub_entry->stub_offset + stub_entry->group->stub_sec->output_offset + stub_entry->group->stub_sec->output_section->vma); if (stub_entry->stub_type > ppc_stub_plt_call_notoc) start += 4; - size = 8 + size_powerxx_offset (off, start & 4); + size = 8 + size_power10_offset (off, start & 4); } else size = 8 + size_offset (off - 8); @@ -11654,10 +11654,10 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) relp = p; num_rel = 0; - if (htab->powerxx_stubs) + if (htab->power10_stubs) { bfd_boolean load = stub_entry->stub_type >= ppc_stub_plt_call_notoc; - p = build_powerxx_offset (htab->params->stub_bfd, p, off, odd, load); + p = build_power10_offset (htab->params->stub_bfd, p, off, odd, load); } else { @@ -11693,8 +11693,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (info->emitrelocations) { bfd_vma roff = relp - stub_entry->group->stub_sec->contents; - if (htab->powerxx_stubs) - num_rel += num_relocs_for_powerxx_offset (off, odd); + if (htab->power10_stubs) + num_rel += num_relocs_for_power10_offset (off, odd); else { num_rel += num_relocs_for_offset (off); @@ -11703,8 +11703,8 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) r = get_relocs (stub_entry->group->stub_sec, num_rel); if (r == NULL) return FALSE; - if (htab->powerxx_stubs) - r = emit_relocs_for_powerxx_offset (info, r, roff, targ, off, odd); + if (htab->power10_stubs) + r = emit_relocs_for_power10_offset (info, r, roff, targ, off, odd); else r = emit_relocs_for_offset (info, r, roff, targ, off); if (stub_entry->stub_type == ppc_stub_long_branch_notoc @@ -11721,7 +11721,7 @@ ppc_build_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) } } - if (!htab->powerxx_stubs + if (!htab->power10_stubs && htab->glink_eh_frame != NULL && htab->glink_eh_frame->size != 0) { @@ -12069,16 +12069,16 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (info->emitrelocations) { unsigned int num_rel; - if (htab->powerxx_stubs) - num_rel = num_relocs_for_powerxx_offset (off, odd); + if (htab->power10_stubs) + num_rel = num_relocs_for_power10_offset (off, odd); else num_rel = num_relocs_for_offset (off - 8); stub_entry->group->stub_sec->reloc_count += num_rel; stub_entry->group->stub_sec->flags |= SEC_RELOC; } - if (htab->powerxx_stubs) - extra = size_powerxx_offset (off, odd); + if (htab->power10_stubs) + extra = size_power10_offset (off, odd); else extra = size_offset (off - 8); /* Include branch insn plus those in the offset sequence. */ @@ -12088,7 +12088,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) calculated. */ off -= extra; - if (!htab->powerxx_stubs) + if (!htab->power10_stubs) { /* After the bcl, lr has been modified so we need to emit .eh_frame info saying the return address is in r12. */ @@ -12151,8 +12151,8 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) if (info->emitrelocations) { unsigned int num_rel; - if (htab->powerxx_stubs) - num_rel = num_relocs_for_powerxx_offset (off, odd); + if (htab->power10_stubs) + num_rel = num_relocs_for_power10_offset (off, odd); else num_rel = num_relocs_for_offset (off - 8); stub_entry->group->stub_sec->reloc_count += num_rel; @@ -12161,7 +12161,7 @@ ppc_size_one_stub (struct bfd_hash_entry *gen_entry, void *in_arg) size = plt_stub_size (htab, stub_entry, off); - if (!htab->powerxx_stubs) + if (!htab->power10_stubs) { /* After the bcl, lr has been modified so we need to emit .eh_frame info saying the return address is in r12. */ diff --git a/gas/ChangeLog b/gas/ChangeLog index 842642b..06d0b26 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2020-05-11 Alan Modra <amodra@gmail.com> + + * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10 + renaming. + * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in + place of -mfuture/-Mfuture. + * testsuite/gas/ppc/prefix-pcrel.d: Likewise. + * testsuite/gas/ppc/prefix-reloc.d: Likewise. + 2020-05-06 Nick Clifton <nickc@redhat.com> * po/sv.po: Updated Swedish translation. diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 0b24298..e0da3bf 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -4131,7 +4131,7 @@ md_assemble (char *str) insn_length = 4; if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn)) insn_length = 2; - else if ((opcode->flags & PPC_OPCODE_POWERXX) != 0 + else if ((opcode->flags & PPC_OPCODE_POWER10) != 0 && PPC_PREFIX_P (insn)) { struct insn_label_list *l; diff --git a/gas/testsuite/gas/ppc/prefix-align.d b/gas/testsuite/gas/ppc/prefix-align.d index b2e1b83..5afc7d6 100644 --- a/gas/testsuite/gas/ppc/prefix-align.d +++ b/gas/testsuite/gas/ppc/prefix-align.d @@ -1,6 +1,6 @@ -#as: -mfuture -#objdump: -dr -Mfuture -#name: POWERXX alignment of labels test +#as: -mpower10 +#objdump: -dr -Mpower10 +#name: POWER10 alignment of labels test .* diff --git a/gas/testsuite/gas/ppc/prefix-pcrel.d b/gas/testsuite/gas/ppc/prefix-pcrel.d index a0ca60f..ad6abfb 100644 --- a/gas/testsuite/gas/ppc/prefix-pcrel.d +++ b/gas/testsuite/gas/ppc/prefix-pcrel.d @@ -1,6 +1,6 @@ -#as: -mfuture -#objdump: -dr -Mfuture -#name: POWERXX pcrel tests +#as: -mpower10 +#objdump: -dr -Mpower10 +#name: POWER10 pcrel tests .* diff --git a/gas/testsuite/gas/ppc/prefix-reloc.d b/gas/testsuite/gas/ppc/prefix-reloc.d index 9f554ac..908ff22 100644 --- a/gas/testsuite/gas/ppc/prefix-reloc.d +++ b/gas/testsuite/gas/ppc/prefix-reloc.d @@ -1,5 +1,5 @@ -#as: -a64 -mfuture -#objdump: -dr -Mfuture +#as: -a64 -mpower10 +#objdump: -dr -Mpower10 #name: Prefix insn relocations .* diff --git a/gold/ChangeLog b/gold/ChangeLog index 79b7057..386f1aa 100644 --- a/gold/ChangeLog +++ b/gold/ChangeLog @@ -1,3 +1,7 @@ +2020-05-11 Alan Modra <amodra@gmail.com> + + * powerpc.cc: Rename powerxx to power10 throughout. + 2020-05-02 H.J. Lu <hongjiu.lu@intel.com> PR gold/25904 diff --git a/gold/powerpc.cc b/gold/powerpc.cc index 9c2a906..eae4832 100644 --- a/gold/powerpc.cc +++ b/gold/powerpc.cc @@ -647,7 +647,7 @@ class Target_powerpc : public Sized_target<size, big_endian> glink_(NULL), rela_dyn_(NULL), copy_relocs_(), tlsld_got_offset_(-1U), stub_tables_(), branch_lookup_table_(), branch_info_(), tocsave_loc_(), - powerxx_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false), + power10_stubs_(false), plt_thread_safe_(false), plt_localentry0_(false), plt_localentry0_init_(false), has_localentry0_(false), has_tls_get_addr_opt_(false), relax_failed_(false), relax_fail_count_(0), @@ -1079,13 +1079,13 @@ class Target_powerpc : public Sized_target<size, big_endian> } bool - powerxx_stubs() const - { return this->powerxx_stubs_; } + power10_stubs() const + { return this->power10_stubs_; } void - set_powerxx_stubs() + set_power10_stubs() { - this->powerxx_stubs_ = true; + this->power10_stubs_ = true; } bool @@ -1687,7 +1687,7 @@ class Target_powerpc : public Sized_target<size, big_endian> Branches branch_info_; Tocsave_loc tocsave_loc_; - bool powerxx_stubs_; + bool power10_stubs_; bool plt_thread_safe_; bool plt_localentry0_; bool plt_localentry0_init_; @@ -5073,7 +5073,7 @@ Stub_table<size, big_endian>::add_plt_call_entry( if (r_type == elfcpp::R_PPC64_REL24_NOTOC) { if (!p.second && !p.first->second.notoc_ - && !this->targ_->powerxx_stubs()) + && !this->targ_->power10_stubs()) this->need_resize_ = true; p.first->second.notoc_ = 1; } @@ -5124,7 +5124,7 @@ Stub_table<size, big_endian>::add_plt_call_entry( if (r_type == elfcpp::R_PPC64_REL24_NOTOC) { if (!p.second && !p.first->second.notoc_ - && !this->targ_->powerxx_stubs()) + && !this->targ_->power10_stubs()) this->need_resize_ = true; p.first->second.notoc_ = 1; } @@ -5330,7 +5330,7 @@ Stub_table<size, big_endian>::add_eh_frame(Layout* layout) && cs->second.r2save_ && !cs->second.localentry0_) || (cs->second.notoc_ - && !this->targ_->powerxx_stubs())) + && !this->targ_->power10_stubs())) calls.push_back(cs); if (calls.size() > 1) std::stable_sort(calls.begin(), calls.end(), @@ -5339,7 +5339,7 @@ Stub_table<size, big_endian>::add_eh_frame(Layout* layout) typedef typename Branch_stub_entries::const_iterator branch_iter; std::vector<branch_iter> branches; if (!this->long_branch_stubs_.empty() - && !this->targ_->powerxx_stubs()) + && !this->targ_->power10_stubs()) for (branch_iter bs = this->long_branch_stubs_.begin(); bs != this->long_branch_stubs_.end(); ++bs) @@ -5776,7 +5776,7 @@ Stub_table<size, big_endian>::build_tls_opt_tail( template<bool big_endian> static unsigned char* -build_powerxx_offset(unsigned char* p, uint64_t off, uint64_t odd, bool load) +build_power10_offset(unsigned char* p, uint64_t off, uint64_t odd, bool load) { uint64_t insn; if (off - odd + (1ULL << 33) < 1ULL << 34) @@ -5964,7 +5964,7 @@ Stub_table<size, big_endian>::plt_call_size( if (p->second.r2save_) bytes += 4; - if (this->targ_->powerxx_stubs()) + if (this->targ_->power10_stubs()) { uint64_t from = this->stub_address() + p->second.off_ + bytes; if (bytes > 8 * 4) @@ -6045,7 +6045,7 @@ Stub_table<size, big_endian>::branch_stub_size( uint64_t off = p->first.dest_ - loc; if (p->second.notoc_) { - if (this->targ_->powerxx_stubs()) + if (this->targ_->power10_stubs()) { Address odd = loc & 4; if (off + (1 << 25) < 2 << 25) @@ -6080,7 +6080,7 @@ Stub_table<size, big_endian>::branch_stub_size( if (off + (1 << 25) < 2 << 25) return 4; - if (!this->targ_->powerxx_stubs()) + if (!this->targ_->power10_stubs()) *need_lt = true; return 16; } @@ -6116,7 +6116,7 @@ Stub_table<size, big_endian>::do_write(Output_file* of) unsigned char* p; if (size == 64 - && this->targ_->powerxx_stubs()) + && this->targ_->power10_stubs()) { if (!this->plt_call_stubs_.empty()) { @@ -6138,7 +6138,7 @@ Stub_table<size, big_endian>::do_write(Output_file* of) Address plt_addr = pltoff + plt->address(); Address from = this->stub_address() + (p - oview); Address delta = plt_addr - from; - p = build_powerxx_offset<big_endian>(p, delta, from & 4, true); + p = build_power10_offset<big_endian>(p, delta, from & 4, true); write_insn<big_endian>(p, mtctr_12); p += 4; if (!this->build_tls_opt_tail(p, cs)) @@ -6161,7 +6161,7 @@ Stub_table<size, big_endian>::do_write(Output_file* of) if (bs->second.notoc_ || delta + (1 << 25) >= 2 << 25) { unsigned char* startp = p; - p = build_powerxx_offset<big_endian>(p, delta, loc & 4, false); + p = build_power10_offset<big_endian>(p, delta, loc & 4, false); delta -= p - startp; } if (delta + (1 << 25) < 2 << 25) @@ -8181,7 +8181,7 @@ Target_powerpc<size, big_endian>::Scan::local( case elfcpp::R_PPC64_GOT_TLSLD34: case elfcpp::R_PPC64_GOT_DTPREL34: case elfcpp::R_PPC64_GOT_TPREL34: - target->set_powerxx_stubs(); + target->set_power10_stubs(); break; default: break; @@ -8939,7 +8939,7 @@ Target_powerpc<size, big_endian>::Scan::global( case elfcpp::R_PPC64_GOT_TLSLD34: case elfcpp::R_PPC64_GOT_DTPREL34: case elfcpp::R_PPC64_GOT_TPREL34: - target->set_powerxx_stubs(); + target->set_power10_stubs(); break; default: break; diff --git a/include/ChangeLog b/include/ChangeLog index 1d322e9..7362955 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2020-05-11 Alan Modra <amodra@gmail.com> + + * elf/ppc64.h: Update comment. + * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX. + 2020-04-30 Alex Coplan <alex.coplan@arm.com> * opcode/aarch64.h (enum aarch64_opnd): Add diff --git a/include/elf/ppc64.h b/include/elf/ppc64.h index e2ad918..22991c8 100644 --- a/include/elf/ppc64.h +++ b/include/elf/ppc64.h @@ -158,7 +158,7 @@ START_RELOC_NUMBERS (elf_ppc64_reloc_type) RELOC_NUMBER (R_PPC64_PLTSEQ, 119) RELOC_NUMBER (R_PPC64_PLTCALL, 120) -/* Powerxx support. */ +/* Power10 support. */ RELOC_NUMBER (R_PPC64_PLTSEQ_NOTOC, 121) RELOC_NUMBER (R_PPC64_PLTCALL_NOTOC, 122) RELOC_NUMBER (R_PPC64_PCREL_OPT, 123) diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 93c56a7..15331d1 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -228,8 +228,8 @@ extern const unsigned int spe2_num_opcodes; /* Opcode is supported by EFS2. */ #define PPC_OPCODE_EFS2 0x200000000000ull -/* Opcode is only supported by powerxx architecture. */ -#define PPC_OPCODE_POWERXX 0x400000000000ull +/* Opcode is only supported by power10 architecture. */ +#define PPC_OPCODE_POWER10 0x400000000000ull /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) diff --git a/ld/ChangeLog b/ld/ChangeLog index 33416be..306d1ed 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,13 @@ +2020-05-11 Alan Modra <amodra@gmail.com> + + * testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in + place of -mfuture/-Mfuture. + * testsuite/ld-powerpc/notoc2.d: Likewise. + * testsuite/ld-powerpc/powerpc.exp: Likewise. + * testsuite/ld-powerpc/tlsgd.d: Likewise. + * testsuite/ld-powerpc/tlsie.d: Likewise. + * testsuite/ld-powerpc/tlsld.d: Likewise. + 2020-05-11 Nick Clifton <nickc@redhat.com> * po/es.po: Updated Spanish translation. diff --git a/ld/testsuite/ld-powerpc/callstub-1.d b/ld/testsuite/ld-powerpc/callstub-1.d index 7c243ee..21eea76 100644 --- a/ld/testsuite/ld-powerpc/callstub-1.d +++ b/ld/testsuite/ld-powerpc/callstub-1.d @@ -1,6 +1,6 @@ -#as: -a64 -mfuture +#as: -a64 -mpower10 #ld: -melf64ppc -shared --plt-align=0 --hash-style=gnu -#objdump: -dr -Mfuture +#objdump: -dr -Mpower10 .* diff --git a/ld/testsuite/ld-powerpc/notoc2.d b/ld/testsuite/ld-powerpc/notoc2.d index 172835f..1e519c0 100644 --- a/ld/testsuite/ld-powerpc/notoc2.d +++ b/ld/testsuite/ld-powerpc/notoc2.d @@ -1,7 +1,7 @@ #source: notoc2.s -#as: -a64 -mfuture +#as: -a64 -mpower10 #ld: -shared -z norelro -#objdump: -d -Mfuture +#objdump: -d -Mpower10 #target: powerpc64*-*-* .* diff --git a/ld/testsuite/ld-powerpc/powerpc.exp b/ld/testsuite/ld-powerpc/powerpc.exp index 84d7c9c..1297871 100644 --- a/ld/testsuite/ld-powerpc/powerpc.exp +++ b/ld/testsuite/ld-powerpc/powerpc.exp @@ -319,11 +319,11 @@ set ppc64elftests { {"notoc ext" "" "" "-a64" {ext.s} {} ""} {"notoc" "-melf64ppc --no-plt-localentry -T ext.lnk" "" "-a64" {notoc.s} {{objdump -d notoc.d} {readelf {-wf -W} notoc.wf}} "notoc"} - {"notoc2" "-melf64ppc -shared" "" "-a64 -mfuture" {notoc2.s} - {{objdump {-d -Mfuture} notoc2.d}} "notoc2"} + {"notoc2" "-melf64ppc -shared" "" "-a64 -mpower10" {notoc2.s} + {{objdump {-d -Mpower10} notoc2.d}} "notoc2"} {"pcrelopt" "-melf64ppc --hash-style=gnu" "tmpdir/symtocbase.so" - "-a64 -mfuture" {pcrelopt.s} - {{objdump {-d -Mfuture} pcrelopt.d} + "-a64 -mpower10" {pcrelopt.s} + {{objdump {-d -Mpower10} pcrelopt.d} {readelf {-S --wide} pcrelopt.sec}} "pcrelopt" } } diff --git a/ld/testsuite/ld-powerpc/tlsgd.d b/ld/testsuite/ld-powerpc/tlsgd.d index 42c9b5f..6191b38 100644 --- a/ld/testsuite/ld-powerpc/tlsgd.d +++ b/ld/testsuite/ld-powerpc/tlsgd.d @@ -1,7 +1,7 @@ #source: tlsgd.s -#as: -a64 -mfuture +#as: -a64 -mpower10 #ld: -melf64ppc -#objdump: -dr -Mfuture +#objdump: -dr -Mpower10 .*: file format .* diff --git a/ld/testsuite/ld-powerpc/tlsie.d b/ld/testsuite/ld-powerpc/tlsie.d index 79613bd..bd7bdfc 100644 --- a/ld/testsuite/ld-powerpc/tlsie.d +++ b/ld/testsuite/ld-powerpc/tlsie.d @@ -1,7 +1,7 @@ #source: tlsie.s -#as: -a64 -mfuture +#as: -a64 -mpower10 #ld: -melf64ppc -#objdump: -dr -Mfuture +#objdump: -dr -Mpower10 .*: file format .* diff --git a/ld/testsuite/ld-powerpc/tlsld.d b/ld/testsuite/ld-powerpc/tlsld.d index 740b15b..862370f 100644 --- a/ld/testsuite/ld-powerpc/tlsld.d +++ b/ld/testsuite/ld-powerpc/tlsld.d @@ -1,7 +1,7 @@ #source: tlsld.s -#as: -a64 -mfuture +#as: -a64 -mpower10 #ld: -melf64ppc -#objdump: -dr -Mfuture +#objdump: -dr -Mpower10 .*: file format .* diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f95aa86..e9975d3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2020-05-11 Alan Modra <amodra@gmail.com> + + * ppc-dis.c (ppc_opts): Add "power10" entry. + (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming. + * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses. + 2020-05-11 Nick Clifton <nickc@redhat.com> * po/fr.po: Updated French translation. diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index b437faf..1c341b2 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -185,10 +185,15 @@ struct ppc_mopt ppc_opts[] = { | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, + { "power10", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 + | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 + | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 + | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), + 0 }, { "future", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 - | PPC_OPCODE_POWERXX | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), + | PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX), 0 }, { "ppc", PPC_OPCODE_PPC, 0 }, @@ -768,7 +773,7 @@ print_insn_powerpc (bfd_vma memaddr, /* Get the major opcode of the insn. */ opcode = NULL; - if ((dialect & PPC_OPCODE_POWERXX) != 0 + if ((dialect & PPC_OPCODE_POWER10) != 0 && PPC_OP (insn) == 0x1) { uint64_t temp_insn, suffix; diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 7ef91d8..baabab6 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -3713,7 +3713,7 @@ const unsigned int num_powerpc_operands = (sizeof (powerpc_operands) #define POWER7 PPC_OPCODE_POWER7 #define POWER8 PPC_OPCODE_POWER8 #define POWER9 PPC_OPCODE_POWER9 -#define POWERXX PPC_OPCODE_POWERXX +#define POWER10 PPC_OPCODE_POWER10 #define CELL PPC_OPCODE_CELL #define PPC64 PPC_OPCODE_64 | PPC_OPCODE_64_BRIDGE #define NON32 (PPC_OPCODE_64 | PPC_OPCODE_POWER4 \ @@ -7966,33 +7966,33 @@ const unsigned int powerpc_num_opcodes = The format of this opcode table is the same as the main opcode table. */ const struct powerpc_opcode prefix_opcodes[] = { -{"pnop", PMRR, PREFIX_MASK, POWERXX, 0, {0}}, -{"pli", PMLS|OP(14), P_DRAPCREL_MASK, POWERXX, 0, {RT, SI34}}, -{"paddi", PMLS|OP(14), P_D_MASK, POWERXX, 0, {RT, RA0, SI34, PCREL0}}, -{"psubi", PMLS|OP(14), P_D_MASK, POWERXX, 0, {RT, RA0, NSI34, PCREL0}}, -{"pla", PMLS|OP(14), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"plwz", PMLS|OP(32), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"plbz", PMLS|OP(34), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"pstw", PMLS|OP(36), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}}, -{"pstb", PMLS|OP(38), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}}, -{"plhz", PMLS|OP(40), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"plwa", P8LS|OP(41), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"plxsd", P8LS|OP(42), P_D_MASK, POWERXX, 0, {VD, D34, PRA0, PCREL}}, -{"plha", PMLS|OP(42), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"plxssp", P8LS|OP(43), P_D_MASK, POWERXX, 0, {VD, D34, PRA0, PCREL}}, -{"psth", PMLS|OP(44), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}}, -{"pstxsd", P8LS|OP(46), P_D_MASK, POWERXX, 0, {VS, D34, PRA0, PCREL}}, -{"pstxssp", P8LS|OP(47), P_D_MASK, POWERXX, 0, {VS, D34, PRA0, PCREL}}, -{"plfs", PMLS|OP(48), P_D_MASK, POWERXX, 0, {FRT, D34, PRA0, PCREL}}, -{"plxv", P8LS|OP(50), P_D_MASK&~OP(1), POWERXX, 0, {XTOP, D34, PRA0, PCREL}}, -{"plfd", PMLS|OP(50), P_D_MASK, POWERXX, 0, {FRT, D34, PRA0, PCREL}}, -{"pstfs", PMLS|OP(52), P_D_MASK, POWERXX, 0, {FRS, D34, PRA0, PCREL}}, -{"pstxv", P8LS|OP(54), P_D_MASK&~OP(1), POWERXX, 0, {XTOP, D34, PRA0, PCREL}}, -{"pstfd", PMLS|OP(54), P_D_MASK, POWERXX, 0, {FRS, D34, PRA0, PCREL}}, -{"plq", P8LS|OP(56), P_D_MASK, POWERXX, 0, {RTQ, D34, PRAQ, PCREL}}, -{"pld", P8LS|OP(57), P_D_MASK, POWERXX, 0, {RT, D34, PRA0, PCREL}}, -{"pstq", P8LS|OP(60), P_D_MASK, POWERXX, 0, {RSQ, D34, PRA0, PCREL}}, -{"pstd", P8LS|OP(61), P_D_MASK, POWERXX, 0, {RS, D34, PRA0, PCREL}}, +{"pnop", PMRR, PREFIX_MASK, POWER10, 0, {0}}, +{"pli", PMLS|OP(14), P_DRAPCREL_MASK, POWER10, 0, {RT, SI34}}, +{"paddi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, SI34, PCREL0}}, +{"psubi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, NSI34, PCREL0}}, +{"pla", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"plwz", PMLS|OP(32), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"plbz", PMLS|OP(34), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"pstw", PMLS|OP(36), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}}, +{"pstb", PMLS|OP(38), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}}, +{"plhz", PMLS|OP(40), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"plwa", P8LS|OP(41), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"plxsd", P8LS|OP(42), P_D_MASK, POWER10, 0, {VD, D34, PRA0, PCREL}}, +{"plha", PMLS|OP(42), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"plxssp", P8LS|OP(43), P_D_MASK, POWER10, 0, {VD, D34, PRA0, PCREL}}, +{"psth", PMLS|OP(44), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}}, +{"pstxsd", P8LS|OP(46), P_D_MASK, POWER10, 0, {VS, D34, PRA0, PCREL}}, +{"pstxssp", P8LS|OP(47), P_D_MASK, POWER10, 0, {VS, D34, PRA0, PCREL}}, +{"plfs", PMLS|OP(48), P_D_MASK, POWER10, 0, {FRT, D34, PRA0, PCREL}}, +{"plxv", P8LS|OP(50), P_D_MASK&~OP(1), POWER10, 0, {XTOP, D34, PRA0, PCREL}}, +{"plfd", PMLS|OP(50), P_D_MASK, POWER10, 0, {FRT, D34, PRA0, PCREL}}, +{"pstfs", PMLS|OP(52), P_D_MASK, POWER10, 0, {FRS, D34, PRA0, PCREL}}, +{"pstxv", P8LS|OP(54), P_D_MASK&~OP(1), POWER10, 0, {XTOP, D34, PRA0, PCREL}}, +{"pstfd", PMLS|OP(54), P_D_MASK, POWER10, 0, {FRS, D34, PRA0, PCREL}}, +{"plq", P8LS|OP(56), P_D_MASK, POWER10, 0, {RTQ, D34, PRAQ, PCREL}}, +{"pld", P8LS|OP(57), P_D_MASK, POWER10, 0, {RT, D34, PRA0, PCREL}}, +{"pstq", P8LS|OP(60), P_D_MASK, POWER10, 0, {RSQ, D34, PRA0, PCREL}}, +{"pstd", P8LS|OP(61), P_D_MASK, POWER10, 0, {RS, D34, PRA0, PCREL}}, }; const unsigned int prefix_num_opcodes = |