diff options
| -rw-r--r-- | gas/config/tc-i386.c | 5 | ||||
| -rw-r--r-- | gas/doc/c-i386.texi | 5 | ||||
| -rw-r--r-- | opcodes/i386-gen.c | 4 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 29 |
4 files changed, 38 insertions, 5 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index e2ffa5d..4e4bfdd 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1050,7 +1050,8 @@ static const arch_entry cpu_arch[] = SUBARCH (lzcnt, LZCNT, LZCNT, false), SUBARCH (popcnt, POPCNT, POPCNT, false), SUBARCH (hle, HLE, HLE, false), - SUBARCH (rtm, RTM, RTM, false), + SUBARCH (rtm, RTM, ANY_RTM, false), + SUBARCH (tsx, TSX, TSX, false), SUBARCH (invpcid, INVPCID, INVPCID, false), SUBARCH (clflush, CLFLUSH, CLFLUSH, false), SUBARCH (nop, NOP, NOP, false), @@ -1112,7 +1113,7 @@ static const arch_entry cpu_arch[] = SUBARCH (rdpru, RDPRU, RDPRU, false), SUBARCH (mcommit, MCOMMIT, MCOMMIT, false), SUBARCH (sev_es, SEV_ES, ANY_SEV_ES, false), - SUBARCH (tsxldtrk, TSXLDTRK, TSXLDTRK, false), + SUBARCH (tsxldtrk, TSXLDTRK, ANY_TSXLDTRK, false), SUBARCH (kl, KL, ANY_KL, false), SUBARCH (widekl, WIDEKL, ANY_WIDEKL, false), SUBARCH (uintr, UINTR, UINTR, false), diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index feca644..8fe4410 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -227,6 +227,7 @@ accept various extension mnemonics. For example, @code{popcnt}, @code{hle}, @code{rtm}, +@code{tsx}, @code{invpcid}, @code{clflush}, @code{mwaitx}, @@ -1485,8 +1486,8 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.aes} @tab @samp{.pclmul} @tab @samp{.fma} @tab @samp{.fsgsbase} @item @samp{.rdrnd} @tab @samp{.f16c} @tab @samp{.avx2} @tab @samp{.bmi2} @item @samp{.lzcnt} @tab @samp{.popcnt} @tab @samp{.invpcid} @tab @samp{.vmfunc} -@item @samp{.hle} -@item @samp{.rtm} @tab @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw} +@item @samp{.hle} @tab @samp{.rtm} @tab @samp{.tsx} +@item @samp{.adx} @tab @samp{.rdseed} @tab @samp{.prfchw} @item @samp{.smap} @tab @samp{.mpx} @tab @samp{.sha} @tab @samp{.prefetchwt1} @item @samp{.clflushopt} @tab @samp{.xsavec} @tab @samp{.xsaves} @tab @samp{.se1} @item @samp{.avx512f} @tab @samp{.avx512cd} @tab @samp{.avx512er} @tab @samp{.avx512pf} diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 0882f94..2ea5922 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -231,6 +231,10 @@ static const dependency isa_dependencies[] = "SEV_ES" }, { "RMPQUERY", "SNP" }, + { "TSX", + "RTM|HLE" }, + { "TSXLDTRK", + "RTM" }, { "AMX_TILE", "XSAVE" }, { "AMX_INT8", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index cbc2111..ecce8fa 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -1138,7 +1138,7 @@ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } @@ -1458,6 +1458,15 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } +#define CPU_TSX_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + #define CPU_ANY_FXSR_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \ 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ @@ -1800,6 +1809,15 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } +#define CPU_ANY_RTM_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + #define CPU_ANY_VMFUNC_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ @@ -2061,6 +2079,15 @@ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } } +#define CPU_ANY_TSXLDTRK_FLAGS \ + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } + #define CPU_ANY_KL_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |