diff options
| -rw-r--r-- | gas/ChangeLog | 7 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 28 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/i386-opc.h | 6 | ||||
| -rw-r--r-- | opcodes/i386-reg.tbl | 6 | ||||
| -rw-r--r-- | opcodes/i386-tbl.h | 6 |
6 files changed, 42 insertions, 18 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 8bdc392..468be74 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,12 @@ 2021-03-30 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (reg_st0): New. + (md_begin): Convert to switch(). Initialize reg_st0. Don't + insert other st(N). + (parse_real_register): Adjust st(N) processing. + +2021-03-30 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (rc_op): Delete. (struct Rounding_Operation): Move ... (struct _i386_insn): ... here. Change field "rounding". diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index ba13013..3a7d504 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -214,6 +214,7 @@ static const char *default_arch = DEFAULT_ARCH; static const reg_entry bad_reg = { "<bad>", OPERAND_TYPE_NONE, 0, 0, { Dw2Inval, Dw2Inval } }; +static const reg_entry *reg_st0; static const reg_entry *reg_k0; /* VEX prefix. */ @@ -3087,11 +3088,27 @@ md_begin (void) for (regtab = i386_regtab; regtab_size--; regtab++) { + switch (regtab->reg_type.bitfield.class) + { + case Reg: + if (regtab->reg_type.bitfield.tbyte) + { + /* There's no point inserting st(<N>) in the hash table, as + parentheses aren't included in register_chars[] anyway. */ + if (regtab->reg_type.bitfield.instance != Accum) + continue; + reg_st0 = regtab; + } + break; + + case RegMask: + if (!regtab->reg_num) + reg_k0 = regtab; + break; + } + if (str_hash_insert (reg_hash, regtab->reg_name, regtab, 0) != NULL) as_fatal (_("duplicate %s"), regtab->reg_name); - - if (regtab->reg_type.bitfield.class == RegMask && !regtab->reg_num) - reg_k0 = regtab; } } @@ -12712,7 +12729,7 @@ parse_real_register (char *reg_string, char **end_op) r = (const reg_entry *) str_hash_find (reg_hash, reg_name_given); /* Handle floating point regs, allowing spaces in the (i) part. */ - if (r == i386_regtab /* %st is first entry of table */) + if (r == reg_st0) { if (!cpu_arch_flags.bitfield.cpu8087 && !cpu_arch_flags.bitfield.cpu287 @@ -12736,8 +12753,7 @@ parse_real_register (char *reg_string, char **end_op) if (*s == ')') { *end_op = s + 1; - r = (const reg_entry *) str_hash_find (reg_hash, "st(0)"); - know (r); + know (r[fpr].reg_num == fpr); return r + fpr; } } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 81c0fa2..5acb021 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2021-03-30 Jan Beulich <jbeulich@suse.com> + + * i386-opc.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Adjust values. + * i386-reg.tbl (st): Move down. + (st(0)): Delete. Extend comment. + * i386-tbl.h: Re-generate. + 2021-03-29 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl (movq, movabs): Move next to mov counterparts. diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 115895c..a2a657e 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -991,9 +991,9 @@ typedef struct reg_entry; /* Entries in i386_regtab. */ -#define REGNAM_AL 1 -#define REGNAM_AX 25 -#define REGNAM_EAX 41 +#define REGNAM_AL 0 +#define REGNAM_AX 24 +#define REGNAM_EAX 40 extern const reg_entry i386_regtab[]; extern const unsigned int i386_regtab_size; diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl index 7ea974d..be2c1cc 100644 --- a/opcodes/i386-reg.tbl +++ b/opcodes/i386-reg.tbl @@ -18,8 +18,6 @@ // Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA // 02110-1301, USA. -// Make %st first as we test for it. -st, Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33 // 8 bit regs al, Class=Reg|Instance=Accum|Byte, 0, 0, Dw2Inval, Dw2Inval cl, Class=Reg|Instance=RegC|Byte, 0, 1, Dw2Inval, Dw2Inval @@ -300,8 +298,8 @@ eip, Dword, RegRex64, RegIP, 8, Dw2Inval // for addressing. riz, Qword|BaseIndex, RegRex64, RegIZ, Dw2Inval, Dw2Inval eiz, Dword|BaseIndex, 0, RegIZ, Dw2Inval, Dw2Inval -// fp regs. -st(0), Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33 +// fp regs. No need for an explicit st(0) here. +st, Class=Reg|Instance=Accum|Tbyte, 0, 0, 11, 33 st(1), Class=Reg|Tbyte, 0, 1, 12, 34 st(2), Class=Reg|Tbyte, 0, 2, 13, 35 st(3), Class=Reg|Tbyte, 0, 3, 14, 36 diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 0a326fd..d2ca247 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -64204,10 +64204,6 @@ const insn_template i386_optab[] = const reg_entry i386_regtab[] = { - { "st", - { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 1, 0, 0, 0, 0, 0, 0 } }, - 0, 0, { 11, 33 } }, { "al", { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, @@ -65260,7 +65256,7 @@ const reg_entry i386_regtab[] = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, 0, RegIZ, { Dw2Inval, Dw2Inval } }, - { "st(0)", + { "st", { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }, 0, 0, { 11, 33 } }, |