aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--sim/mips/.Sanitize30
-rw-r--r--sim/mips/ChangeLog8
-rwxr-xr-xsim/mips/configure21
-rw-r--r--sim/mips/configure.in3
-rw-r--r--sim/mips/gencode.c50
5 files changed, 97 insertions, 15 deletions
diff --git a/sim/mips/.Sanitize b/sim/mips/.Sanitize
index 9071b24..59c7cf9 100644
--- a/sim/mips/.Sanitize
+++ b/sim/mips/.Sanitize
@@ -119,6 +119,36 @@ else
fi
+tx49_files="ChangeLog configure.in configure gencode.c"
+
+if ( echo $* | grep keep\-tx49 > /dev/null ) ; then
+ for i in $tx49_files ; do
+ if test ! -d $i && (grep sanitize-tx49 $i > /dev/null) ; then
+ if [ -n "${verbose}" ] ; then
+ echo Keeping tx49 stuff in $i
+ fi
+ fi
+ done
+else
+ for i in * ; do
+ if test ! -d $i && (grep sanitize-tx49 $i > /dev/null) ; then
+ if [ -n "${verbose}" ] ; then
+ echo Removing traces of \"tx49\" from $i...
+ fi
+ cp $i new
+ sed '/start\-sanitize\-tx49/,/end-\sanitize\-tx49/d' < $i > new
+ if [ -n "${safe}" -a ! -f .Recover/$i ] ; then
+ if [ -n "${verbose}" ] ; then
+ echo Caching $i in .Recover...
+ fi
+ mv $i .Recover
+ fi
+ mv new $i
+ fi
+ done
+fi
+
+
vr5400_files="ChangeLog configure configure.in sim-main.h interp.c gencode.c mips.igen mips.dc m16.igen vr5400.igen"
if ( echo $* | grep keep\-vr5400 > /dev/null ) ; then
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 11e9d2a..0244eb2 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,11 @@
+start-sanitize-tx49
+Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
+
+ * gencode.c: Add tx49 configury and insns.
+ * configure.in: Add tx49 configury.
+ * configure: Update.
+
+end-sanitize-tx49
Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
* mips.igen:
diff --git a/sim/mips/configure b/sim/mips/configure
index 2952623..ca5c2fa 100755
--- a/sim/mips/configure
+++ b/sim/mips/configure
@@ -1599,6 +1599,9 @@ case "${target}" in
# start-sanitize-tx19
mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";;
# end-sanitize-tx19
+# start-sanitize-tx49
+ mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";;
+# end-sanitize-tx49
# start-sanitize-r5900
mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";;
# end-sanitize-r5900
@@ -1804,17 +1807,17 @@ for ac_hdr in string.h strings.h stdlib.h stdlib.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:1808: checking for $ac_hdr" >&5
+echo "configure:1811: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1813 "configure"
+#line 1816 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:1818: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:1821: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -1841,7 +1844,7 @@ fi
done
echo $ac_n "checking for fabs in -lm""... $ac_c" 1>&6
-echo "configure:1845: checking for fabs in -lm" >&5
+echo "configure:1848: checking for fabs in -lm" >&5
ac_lib_var=`echo m'_'fabs | sed 'y%./+-%__p_%'`
if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
@@ -1849,7 +1852,7 @@ else
ac_save_LIBS="$LIBS"
LIBS="-lm $LIBS"
cat > conftest.$ac_ext <<EOF
-#line 1853 "configure"
+#line 1856 "configure"
#include "confdefs.h"
/* Override any gcc2 internal prototype to avoid an error. */
/* We use char because int might match the return type of a gcc2
@@ -1860,7 +1863,7 @@ int main() {
fabs()
; return 0; }
EOF
-if { (eval echo configure:1864: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
+if { (eval echo configure:1867: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
rm -rf conftest*
eval "ac_cv_lib_$ac_lib_var=yes"
else
@@ -1890,12 +1893,12 @@ fi
for ac_func in aint anint sqrt
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:1894: checking for $ac_func" >&5
+echo "configure:1897: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 1899 "configure"
+#line 1902 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -1918,7 +1921,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:1922: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
+if { (eval echo configure:1925: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
diff --git a/sim/mips/configure.in b/sim/mips/configure.in
index 49f0af6..123675c 100644
--- a/sim/mips/configure.in
+++ b/sim/mips/configure.in
@@ -17,6 +17,9 @@ case "${target}" in
# start-sanitize-tx19
mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";;
# end-sanitize-tx19
+# start-sanitize-tx49
+ mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";;
+# end-sanitize-tx49
# start-sanitize-r5900
mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";;
# end-sanitize-r5900
diff --git a/sim/mips/gencode.c b/sim/mips/gencode.c
index 2b84cdf..298fab0 100644
--- a/sim/mips/gencode.c
+++ b/sim/mips/gencode.c
@@ -480,6 +480,10 @@ typedef struct instruction {
#define ARCH_R5900 ((unsigned)1 << 30) /* Toshiba r5900 extension instructions */
/* end-sanitize-r5900 */
#define ARCH_R3900 ((unsigned)1 << 29) /* Toshiba r3900 (tx39) */
+/* start-sanitize-tx49 */
+#define ARCH_R4900 ((unsigned)1 << 28) /* Toshiba r4900 (tx49) */
+/* end-sanitize-tx49 */
+
/* start-sanitize-tx19 */
/* The r1900 (tx19) is a tx39 with a mips16 decoder. For the purposes
of implementing the simulator we treat them as the same. */
@@ -488,6 +492,9 @@ typedef struct instruction {
/* A list (or'ed) of extension insn sets that can be requested independant of the ISA# */
#define MASK_ISA_INDEP (0 \
| ARCH_R3900 \
+ /* start-sanitize-tx49 */ \
+ | ARCH_R4900 \
+ /* end-sanitize-tx49 */ \
/* start-sanitize-r5900 */ \
| ARCH_R5900 \
/* end-sanitize-r5900 */ \
@@ -516,6 +523,9 @@ typedef struct instruction {
#define G5 (0 \
| ARCH_R3900 \
+ /* start-sanitize-tx49 */ \
+ | ARCH_R4900 \
+ /* end-sanitize-tx49 */ \
/* start-sanitize-r5900 */ \
| ARCH_R5900 \
/* end-sanitize-r5900 */ \
@@ -523,7 +533,27 @@ typedef struct instruction {
#define G6 (3 | ARCH_R3900)
-#define T3 ARCH_R3900
+#define G7 (ARCH_R3900 \
+ /* start-sanitize-tx49 */ \
+ | ARCH_R4900 \
+ /* end-sanitize-tx49 */ \
+ )
+
+#define G8 (4 \
+ /* start-sanitize-tx49 */ \
+ | ARCH_R4900 \
+ /* end-sanitize-tx49 */ \
+ /* start-sanitize-r5900 */ \
+ | ARCH_R5900 \
+ /* end-sanitize-r5900 */ \
+ )
+
+#define G9 (3 \
+ /* start-sanitize-tx49 */ \
+ | ARCH_R4900 \
+ /* end-sanitize-tx49 */ \
+ )
+
/* start-sanitize-r5900 */
#define T5 ARCH_R5900
/* end-sanitize-r5900 */
@@ -588,8 +618,9 @@ struct instruction MIPS_DECODE[] = {
{"DIVU1", T5,"011100sssssggggg0000000000011011",MMINORM,DIV, (WORD | WORD32 | UNSIGNED | SIGNEXTEND | HI | LO | PIPE1)},
/* end-sanitize-r5900 */
{"DMADD16",G1,"000000sssssggggg0000000000101001",SPECIAL,MADD16, (DOUBLEWORD | HI | LO)},
- {"DMULT", 3,"000000sssssggggg0000000000011100",SPECIAL,MUL, (DOUBLEWORD | HI | LO)},
- {"DMULTU", 3,"000000sssssggggg0000000000011101",SPECIAL,MUL, (DOUBLEWORD | UNSIGNED | HI | LO)},
+ /* See note near MULT for explanation of 3op-ness. */
+ {"DMULT", G9,"000000sssssgggggddddd00000011100",SPECIAL,MUL, (OP3 | DOUBLEWORD | HI | LO)},
+ {"DMULTU", G9,"000000sssssgggggddddd00000011101",SPECIAL,MUL, (OP3 | DOUBLEWORD | UNSIGNED | HI | LO)},
{"DMxC1", 3,"01000100x01kkkkkvvvvv00000000000",COP1S, FPMOVEC, (FP | DOUBLEWORD)},
{"DSLL", 3,"00000000000gggggdddddaaaaa111000",SPECIAL,SHIFT, (DOUBLEWORD | LEFT | LOGICAL)},
{"DSLLV", 3,"000000sssssgggggddddd00000010100",SPECIAL,SHIFT, (DOUBLEWORD | LEFT | LOGICAL | REG)},
@@ -671,6 +702,10 @@ struct instruction MIPS_DECODE[] = {
{"MSUB.D", G3,"010011bbbbbkkkkkvvvvvrrrrr101001",COP1X, FPSUB, (FP | MULTIPLY | DOUBLE)},
{"MSUB.S", G3,"010011bbbbbkkkkkvvvvvrrrrr101000",COP1X, FPSUB, (FP | MULTIPLY | SINGLE)},
{"MUL", 1,"01000110mmmkkkkkvvvvvrrrrr000010",COP1, FPMUL, (FP | HI | LO)},
+ /* The 3op version of MULT and MULTU are TX39 (and related chips) specific.
+ They should be removed from other chips sets, so that using the 3op opcode
+ causes a reserved instruction exception, but gencode can't deal with
+ that currently. */
{"MULT", 1,"000000sssssgggggddddd00000011000",SPECIAL,MUL, (OP3 | WORD | WORD32 | HI | LO)},
/* start-sanitize-r5900 */
{"MULT1", T5,"011100sssssgggggddddd00000011000",MMINORM,MUL, (OP3 | WORD | WORD32 | HI | LO | PIPE1)},
@@ -811,7 +846,7 @@ struct instruction MIPS_DECODE[] = {
{"PXOR", T5,"011100SSSSSTTTTTddddd10011001001",MMI2, POP, (POP_XOR)},
/* end-sanitize-r5900 */
- {"PREF", G2,"110011sssssnnnnnyyyyyyyyyyyyyyyy",NORMAL, PREFETCH, (NONE)},
+ {"PREF", G8,"110011sssssnnnnnyyyyyyyyyyyyyyyy",NORMAL, PREFETCH, (NONE)},
{"PREFX", 4,"010011sssssgggggvvvvv00000001111",COP1X, FPPREFX, (FP)},
/* start-sanitize-r5900 */
@@ -827,7 +862,7 @@ struct instruction MIPS_DECODE[] = {
{"SCD", 3,"111100sssssgggggeeeeeeeeeeeeeeee",NORMAL, STORE, (DOUBLEWORD | ATOMIC)},
{"SD", 3,"111111sssssgggggeeeeeeeeeeeeeeee",NORMAL, STORE, (DOUBLEWORD)},
{"SDC1", 2,"111101sssssttttteeeeeeeeeeeeeeee",NORMAL, STORE, (DOUBLEWORD | COPROC)},
- {"SDBBP", T3,"000000????????????????????001110",SPECIAL,SDBBP, (NOARG)},
+ {"SDBBP", G7,"000000????????????????????001110",SPECIAL,SDBBP, (NOARG)},
{"SDC2", 2,"111110sssssttttteeeeeeeeeeeeeeee",NORMAL, STORE, (DOUBLEWORD | COPROC)},
{"SDL", 3,"101100sssssgggggyyyyyyyyyyyyyyyy",NORMAL, STORE, (DOUBLEWORD | LEFT)},
{"SDR", 3,"101101sssssgggggyyyyyyyyyyyyyyyy",NORMAL, STORE, (DOUBLEWORD | RIGHT)},
@@ -946,7 +981,7 @@ static const struct instruction MIPS16_DECODE[] = {
{"NOT", 1, "11101dddyyy01111Z", RR, OR, NOT },
{"OR", 1, "11101wwwyyy01101", RR, OR, NONE },
{"SB", 1, "11000xxxyyy55555", RRI, STORE, BYTE },
-{"SDBBP", T3, "11100??????00001", RR, SDBBP, NOARG },
+{"SDBBP", G7, "11100??????00001", RR, SDBBP, NOARG },
{"SD", 3, "01111xxxyyyDDDDD", RRI, STORE, DOUBLEWORD },
{"SDSP", 3, "11111001yyyDDDDDs", RI64, STORE, DOUBLEWORD },
{"SDRASP", 3, "11111010CCCCCCCCsQ", I64, STORE, DOUBLEWORD },
@@ -4429,6 +4464,9 @@ struct architectures {
static const struct architectures available_architectures[] = {
{"4100",ARCH_VR4100}, /* NEC MIPS VR4100 */
{"3900",ARCH_R3900}, /* Toshiba R3900 (TX39) */
+ /* start-sanitize-tx49 */
+ {"4900",ARCH_R4900}, /* Toshiba R4900 (TX49) */
+ /* end-sanitize-tx49 */
/* start-sanitize-tx19 */
{"1900",ARCH_R3900}, /* Toshiba R1900 (TX19) */
/* end-sanitize-tx19 */