diff options
38 files changed, 48 insertions, 46 deletions
diff --git a/include/sim/sim.h b/include/sim/sim.h index ae8f194..4afdf01 100644 --- a/include/sim/sim.h +++ b/include/sim/sim.h @@ -203,7 +203,8 @@ int sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length); Return a LENGTH of 0 to indicate the register was not updated but no error has occurred. */ -int sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length); +int sim_store_register (SIM_DESC sd, int regno, const unsigned char *buf, + int length); /* Print whatever statistics the simulator has collected. diff --git a/sim/aarch64/interp.c b/sim/aarch64/interp.c index ac95c7d..34a4c72 100644 --- a/sim/aarch64/interp.c +++ b/sim/aarch64/interp.c @@ -257,7 +257,7 @@ aarch64_reg_get (SIM_CPU *cpu, int regno, unsigned char *buf, int length) } static int -aarch64_reg_set (SIM_CPU *cpu, int regno, unsigned char *buf, int length) +aarch64_reg_set (SIM_CPU *cpu, int regno, const unsigned char *buf, int length) { size_t size; bfd_vma val; diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index 72a6524..455f320 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -429,7 +429,7 @@ tomem (struct ARMul_State *state, } static int -arm_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +arm_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { init (); diff --git a/sim/avr/interp.c b/sim/avr/interp.c index 1b147c4..0aa7132 100644 --- a/sim/avr/interp.c +++ b/sim/avr/interp.c @@ -1600,7 +1600,7 @@ sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size) } static int -avr_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +avr_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { if (rn < 32 && length == 1) { diff --git a/sim/bfin/machs.c b/sim/bfin/machs.c index f322b18..035eb31 100644 --- a/sim/bfin/machs.c +++ b/sim/bfin/machs.c @@ -1881,7 +1881,7 @@ bfin_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *buf, int len) } static int -bfin_reg_store (SIM_CPU *cpu, int rn, unsigned char *buf, int len) +bfin_reg_store (SIM_CPU *cpu, int rn, const unsigned char *buf, int len) { bu32 value, *reg; diff --git a/sim/bpf/bpf.c b/sim/bpf/bpf.c index 4a55acd..9db61ff 100644 --- a/sim/bpf/bpf.c +++ b/sim/bpf/bpf.c @@ -61,7 +61,7 @@ bpfbf_fetch_register (SIM_CPU *current_cpu, int bpfbf_store_register (SIM_CPU *current_cpu, int rn, - unsigned char *buf, + const unsigned char *buf, int len) { if (rn == 11) diff --git a/sim/common/sim-cpu.h b/sim/common/sim-cpu.h index 9e09a55..2ad5667 100644 --- a/sim/common/sim-cpu.h +++ b/sim/common/sim-cpu.h @@ -31,7 +31,7 @@ typedef const char * (CPU_INSN_NAME_FN) (sim_cpu *, int); /* Types for register access functions. These routines implement the sim_{fetch,store}_register interface. */ typedef int (CPUREG_FETCH_FN) (sim_cpu *, int, unsigned char *, int); -typedef int (CPUREG_STORE_FN) (sim_cpu *, int, unsigned char *, int); +typedef int (CPUREG_STORE_FN) (sim_cpu *, int, const unsigned char *, int); /* Types for PC access functions. Some simulators require a functional interface to access the program diff --git a/sim/common/sim-reg.c b/sim/common/sim-reg.c index 756ad26..54ce562 100644 --- a/sim/common/sim-reg.c +++ b/sim/common/sim-reg.c @@ -45,7 +45,7 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length) cpus. */ int -sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length) +sim_store_register (SIM_DESC sd, int rn, const unsigned char *buf, int length) { SIM_CPU *cpu = STATE_CPU (sd, 0); diff --git a/sim/cr16/interp.c b/sim/cr16/interp.c index cbdcdc6..6e27fad 100644 --- a/sim/cr16/interp.c +++ b/sim/cr16/interp.c @@ -386,7 +386,7 @@ free_state (SIM_DESC sd) } static int cr16_reg_fetch (SIM_CPU *, int, unsigned char *, int); -static int cr16_reg_store (SIM_CPU *, int, unsigned char *, int); +static int cr16_reg_store (SIM_CPU *, int, const unsigned char *, int); SIM_DESC sim_open (SIM_OPEN_KIND kind, struct host_callback_struct *cb, @@ -769,7 +769,7 @@ cr16_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) } static int -cr16_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +cr16_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { SIM_DESC sd = CPU_STATE (cpu); int size; diff --git a/sim/cris/cris-tmpl.c b/sim/cris/cris-tmpl.c index 9f0c06e..a21a79a 100644 --- a/sim/cris/cris-tmpl.c +++ b/sim/cris/cris-tmpl.c @@ -90,7 +90,7 @@ MY (f_fetch_register) (SIM_CPU *current_cpu, int rn, int MY (f_store_register) (SIM_CPU *current_cpu, int rn, - unsigned char *buf, int len ATTRIBUTE_UNUSED) + const unsigned char *buf, int len ATTRIBUTE_UNUSED) { XCONCAT3(crisv,BASENUM,f_h_gr_set) (current_cpu, rn, GETTSI (buf)); return -1; diff --git a/sim/cris/sim-if.c b/sim/cris/sim-if.c index bedc0d0..64fefd6 100644 --- a/sim/cris/sim-if.c +++ b/sim/cris/sim-if.c @@ -933,7 +933,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd, CPU_CRIS_MISC_PROFILE (cpu)->flags = STATE_TRACE_FLAGS (sd)[0]; /* Set SP to the stack we allocated above. */ - (* CPU_REG_STORE (cpu)) (cpu, H_GR_SP, (unsigned char *) sp_init, 4); + (* CPU_REG_STORE (cpu)) (cpu, H_GR_SP, (const unsigned char *) sp_init, 4); /* Set the simulator environment data. */ cpu->highest_mmapped_page = NULL; diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index c82bb4c..f17033f 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -744,7 +744,7 @@ free_state (SIM_DESC sd) } static int d10v_reg_fetch (SIM_CPU *, int, unsigned char *, int); -static int d10v_reg_store (SIM_CPU *, int, unsigned char *, int); +static int d10v_reg_store (SIM_CPU *, int, const unsigned char *, int); SIM_DESC sim_open (SIM_OPEN_KIND kind, host_callback *cb, @@ -1293,7 +1293,7 @@ d10v_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) } static int -d10v_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +d10v_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { SIM_DESC sd = CPU_STATE (cpu); int size; diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c index fc4336c..9e0c5a2 100644 --- a/sim/erc32/interf.c +++ b/sim/erc32/interf.c @@ -310,7 +310,7 @@ sim_create_inferior(SIM_DESC sd, bfd *abfd, char * const *argv, } int -sim_store_register(SIM_DESC sd, int regno, unsigned char *value, int length) +sim_store_register(SIM_DESC sd, int regno, const unsigned char *value, int length) { int regval; diff --git a/sim/frv/frv.c b/sim/frv/frv.c index eba0156..6cc95d4 100644 --- a/sim/frv/frv.c +++ b/sim/frv/frv.c @@ -89,7 +89,7 @@ frvbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) /* The contents of BUF are in target byte order. */ int -frvbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +frvbf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { if (SIM_FRV_GR0_REGNUM <= rn && rn <= SIM_FRV_GR63_REGNUM) { diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c index 70212f4..65c7141 100644 --- a/sim/ft32/interp.c +++ b/sim/ft32/interp.c @@ -745,7 +745,7 @@ ft32_lookup_register (SIM_CPU *cpu, int nr) static int ft32_reg_store (SIM_CPU *cpu, int rn, - unsigned char *memory, + const unsigned char *memory, int length) { if (0 <= rn && rn <= 32) diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c index f49e83d..ada7f72 100644 --- a/sim/h8300/compile.c +++ b/sim/h8300/compile.c @@ -4476,7 +4476,7 @@ sim_read (SIM_DESC sd, SIM_ADDR addr, void *buffer, int size) } static int -h8300_reg_store (SIM_CPU *cpu, int rn, unsigned char *value, int length) +h8300_reg_store (SIM_CPU *cpu, int rn, const unsigned char *value, int length) { int longval; int shortval; diff --git a/sim/iq2000/iq2000.c b/sim/iq2000/iq2000.c index 9b1f4bd..d758867 100644 --- a/sim/iq2000/iq2000.c +++ b/sim/iq2000/iq2000.c @@ -227,7 +227,7 @@ iq2000bf_fetch_register (SIM_CPU *cpu, int nr, unsigned char *buf, int len) } int -iq2000bf_store_register (SIM_CPU *cpu, int nr, unsigned char *buf, int len) +iq2000bf_store_register (SIM_CPU *cpu, int nr, const unsigned char *buf, int len) { if (nr >= GPR0_REGNUM && nr < (GPR0_REGNUM + NR_GPR) diff --git a/sim/lm32/lm32.c b/sim/lm32/lm32.c index 3ca8624..e8e8386 100644 --- a/sim/lm32/lm32.c +++ b/sim/lm32/lm32.c @@ -52,7 +52,7 @@ lm32bf_fetch_register (SIM_CPU * current_cpu, int rn, unsigned char *buf, /* The contents of BUF are in target byte order. */ int -lm32bf_store_register (SIM_CPU * current_cpu, int rn, unsigned char *buf, +lm32bf_store_register (SIM_CPU * current_cpu, int rn, const unsigned char *buf, int len) { if (rn < 32) diff --git a/sim/m32c/gdb-if.c b/sim/m32c/gdb-if.c index 802eae9..a74dde9 100644 --- a/sim/m32c/gdb-if.c +++ b/sim/m32c/gdb-if.c @@ -403,7 +403,7 @@ sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length) } int -sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length) +sim_store_register (SIM_DESC sd, int regno, const unsigned char *buf, int length) { size_t size; diff --git a/sim/m32r/m32r.c b/sim/m32r/m32r.c index 811c2b1..f857369 100644 --- a/sim/m32r/m32r.c +++ b/sim/m32r/m32r.c @@ -98,7 +98,7 @@ m32rbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32rbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32rbf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { int size = m32rbf_register_size (rn); if (len != size) diff --git a/sim/m32r/m32r2.c b/sim/m32r/m32r2.c index 9c8daa5..a057a4c 100644 --- a/sim/m32r/m32r2.c +++ b/sim/m32r/m32r2.c @@ -38,7 +38,7 @@ m32r2f_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32r2f_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32r2f_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { return m32rbf_store_register (current_cpu, rn, buf, len); } diff --git a/sim/m32r/m32rx.c b/sim/m32r/m32rx.c index 0709803..deafcbe 100644 --- a/sim/m32r/m32rx.c +++ b/sim/m32r/m32rx.c @@ -38,7 +38,7 @@ m32rxf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len /* The contents of BUF are in target byte order. */ int -m32rxf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len) +m32rxf_store_register (SIM_CPU *current_cpu, int rn, const unsigned char *buf, int len) { return m32rbf_store_register (current_cpu, rn, buf, len); } diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c index ab3c5a8..ab87068 100644 --- a/sim/m68hc11/interp.c +++ b/sim/m68hc11/interp.c @@ -392,7 +392,7 @@ m68hc11_pc_set (sim_cpu *cpu, sim_cia pc) } static int m68hc11_reg_fetch (SIM_CPU *, int, unsigned char *, int); -static int m68hc11_reg_store (SIM_CPU *, int, unsigned char *, int); +static int m68hc11_reg_store (SIM_CPU *, int, const unsigned char *, int); SIM_DESC sim_open (SIM_OPEN_KIND kind, host_callback *callback, @@ -595,7 +595,7 @@ m68hc11_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) } static int -m68hc11_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +m68hc11_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { uint16_t val; diff --git a/sim/mcore/interp.c b/sim/mcore/interp.c index 082bc4e..8ca2eee 100644 --- a/sim/mcore/interp.c +++ b/sim/mcore/interp.c @@ -1242,7 +1242,7 @@ sim_engine_run (SIM_DESC sd, } static int -mcore_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +mcore_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { if (rn < NUM_MCORE_REGS && rn >= 0) { diff --git a/sim/microblaze/interp.c b/sim/microblaze/interp.c index 6aa0263..1435ecc 100644 --- a/sim/microblaze/interp.c +++ b/sim/microblaze/interp.c @@ -321,7 +321,7 @@ sim_engine_run (SIM_DESC sd, } static int -microblaze_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +microblaze_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0) { diff --git a/sim/mips/interp.c b/sim/mips/interp.c index 28421b3..5540d5c 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -337,7 +337,7 @@ mips_pc_set (sim_cpu *cpu, sim_cia pc) } static int mips_reg_fetch (SIM_CPU *, int, unsigned char *, int); -static int mips_reg_store (SIM_CPU *, int, unsigned char *, int); +static int mips_reg_store (SIM_CPU *, int, const unsigned char *, int); SIM_DESC sim_open (SIM_OPEN_KIND kind, host_callback *cb, @@ -846,7 +846,7 @@ mips_sim_close (SIM_DESC sd, int quitting) } static int -mips_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +mips_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { /* NOTE: gdb (the client) stores registers in target byte order while the simulator uses host byte order */ diff --git a/sim/mn10300/interp.c b/sim/mn10300/interp.c index 2e7fd16..020fd04 100644 --- a/sim/mn10300/interp.c +++ b/sim/mn10300/interp.c @@ -80,7 +80,7 @@ mn10300_pc_set (sim_cpu *cpu, sim_cia pc) } static int mn10300_reg_fetch (SIM_CPU *, int, unsigned char *, int); -static int mn10300_reg_store (SIM_CPU *, int, unsigned char *, int); +static int mn10300_reg_store (SIM_CPU *, int, const unsigned char *, int); /* These default values correspond to expected usage for the chip. */ @@ -344,9 +344,9 @@ mn10300_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) } static int -mn10300_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +mn10300_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { - uint8_t *a = memory; + const uint8_t *a = memory; State.regs[rn] = (a[3] << 24) + (a[2] << 16) + (a[1] << 8) + a[0]; return length; } diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c index d5d14bf..325bd14 100644 --- a/sim/moxie/interp.c +++ b/sim/moxie/interp.c @@ -1132,7 +1132,7 @@ sim_engine_run (SIM_DESC sd, } static int -moxie_reg_store (SIM_CPU *scpu, int rn, unsigned char *memory, int length) +moxie_reg_store (SIM_CPU *scpu, int rn, const unsigned char *memory, int length) { if (rn < NUM_MOXIE_REGS && rn >= 0) { diff --git a/sim/msp430/msp430-sim.c b/sim/msp430/msp430-sim.c index 2ca5e17..d253f2e 100644 --- a/sim/msp430/msp430-sim.c +++ b/sim/msp430/msp430-sim.c @@ -74,7 +74,7 @@ msp430_reg_fetch (SIM_CPU *cpu, int regno, unsigned char *buf, int len) } static int -msp430_reg_store (SIM_CPU *cpu, int regno, unsigned char *buf, int len) +msp430_reg_store (SIM_CPU *cpu, int regno, const unsigned char *buf, int len) { if (0 <= regno && regno < 16) { diff --git a/sim/or1k/or1k-sim.h b/sim/or1k/or1k-sim.h index c956a05..045f171 100644 --- a/sim/or1k/or1k-sim.h +++ b/sim/or1k/or1k-sim.h @@ -70,8 +70,8 @@ void or1k32bf_mtspr (sim_cpu *current_cpu, USI addr, USI val); int or1k32bf_fetch_register (sim_cpu *current_cpu, int rn, unsigned char *buf, int len); -int or1k32bf_store_register (sim_cpu *current_cpu, int rn, unsigned char *buf, - int len); +int or1k32bf_store_register (sim_cpu *current_cpu, int rn, + const unsigned char *buf, int len); int or1k32bf_model_or1200_u_exec (sim_cpu *current_cpu, const IDESC *idesc, int unit_num, int referenced); int or1k32bf_model_or1200nd_u_exec (sim_cpu *current_cpu, const IDESC *idesc, diff --git a/sim/or1k/or1k.c b/sim/or1k/or1k.c index bfab354..488d756 100644 --- a/sim/or1k/or1k.c +++ b/sim/or1k/or1k.c @@ -55,7 +55,7 @@ or1k32bf_fetch_register (sim_cpu *current_cpu, int rn, unsigned char *buf, } int -or1k32bf_store_register (sim_cpu *current_cpu, int rn, unsigned char *buf, +or1k32bf_store_register (sim_cpu *current_cpu, int rn, const unsigned char *buf, int len) { if (rn < 32) diff --git a/sim/ppc/gdb-sim.c b/sim/ppc/gdb-sim.c index c6ae10e..8cf3638 100644 --- a/sim/ppc/gdb-sim.c +++ b/sim/ppc/gdb-sim.c @@ -1284,7 +1284,8 @@ sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length) int -sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length) +sim_store_register (SIM_DESC sd, int regno, const unsigned char *buf, + int length) { const char *regname = regnum2name (regno); diff --git a/sim/pru/interp.c b/sim/pru/interp.c index fabedc9..4b7de4c 100644 --- a/sim/pru/interp.c +++ b/sim/pru/interp.c @@ -650,7 +650,7 @@ pru_pc_set (sim_cpu *cpu, sim_cia pc) /* Implement callback for standard CPU_REG_STORE routine. */ static int -pru_store_register (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +pru_store_register (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { if (rn < NUM_REGS && rn >= 0) { diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 5932c0d..1cf7111 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1054,7 +1054,7 @@ reg_fetch (sim_cpu *cpu, int rn, unsigned char *buf, int len) } static int -reg_store (sim_cpu *cpu, int rn, unsigned char *buf, int len) +reg_store (sim_cpu *cpu, int rn, const unsigned char *buf, int len) { if (len <= 0 || len > sizeof (unsigned_word)) return -1; diff --git a/sim/rl78/gdb-if.c b/sim/rl78/gdb-if.c index 98bb0a4..ef6c75d 100644 --- a/sim/rl78/gdb-if.c +++ b/sim/rl78/gdb-if.c @@ -356,7 +356,7 @@ sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length) LENGTH must match the sim's internal notion of the register size. */ int -sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length) +sim_store_register (SIM_DESC sd, int regno, const unsigned char *buf, int length) { size_t size; SI val; diff --git a/sim/rx/gdb-if.c b/sim/rx/gdb-if.c index 7af37b9..20bb9ef 100644 --- a/sim/rx/gdb-if.c +++ b/sim/rx/gdb-if.c @@ -532,7 +532,7 @@ sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length) } int -sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length) +sim_store_register (SIM_DESC sd, int regno, const unsigned char *buf, int length) { size_t size; DI val; diff --git a/sim/sh/interp.c b/sim/sh/interp.c index 6a33cce..21de384 100644 --- a/sim/sh/interp.c +++ b/sim/sh/interp.c @@ -1913,7 +1913,7 @@ enum { }; static int -sh_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +sh_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { unsigned val; diff --git a/sim/v850/interp.c b/sim/v850/interp.c index 8819148..d0fd132 100644 --- a/sim/v850/interp.c +++ b/sim/v850/interp.c @@ -185,7 +185,7 @@ v850_pc_set (sim_cpu *cpu, sim_cia pc) } static int v850_reg_fetch (SIM_CPU *, int, unsigned char *, int); -static int v850_reg_store (SIM_CPU *, int, unsigned char *, int); +static int v850_reg_store (SIM_CPU *, int, const unsigned char *, int); SIM_DESC sim_open (SIM_OPEN_KIND kind, @@ -320,7 +320,7 @@ v850_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) } static int -v850_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) +v850_reg_store (SIM_CPU *cpu, int rn, const unsigned char *memory, int length) { State.regs[rn] = T2H_4 (*(uint32_t *) memory); return length; |