diff options
| -rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/power6.d | 14 | ||||
| -rw-r--r-- | gas/testsuite/gas/ppc/power6.s | 14 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/ppc-dis.c | 3 | ||||
| -rw-r--r-- | opcodes/ppc-opc.c | 12 |
6 files changed, 51 insertions, 5 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index b468eca..eddb699 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2009-01-14 Peter Bergner <bergner@vnet.ibm.com> + + * gas/ppc/power6.s ("mtfsf", "mtfsf.", "mtfsfi", "mtfsfi."): Add tests. + * gas/ppc/power6.d: Likewise. + 2009-01-12 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/sse-noavx.s: Add tests for lfence, mfence and movnti. diff --git a/gas/testsuite/gas/ppc/power6.d b/gas/testsuite/gas/ppc/power6.d index d35a827..3fef44d 100644 --- a/gas/testsuite/gas/ppc/power6.d +++ b/gas/testsuite/gas/ppc/power6.d @@ -52,3 +52,17 @@ Disassembly of section \.text: a8: 7c 01 17 ec dcbz r1,r2 ac: 7c 23 27 ec dcbzl r3,r4 b0: 7c 05 37 ec dcbz r5,r6 + b4: fc 0c 55 8e mtfsf 6,f10 + b8: fc 0c 5d 8f mtfsf. 6,f11 + bc: fc 0c 55 8e mtfsf 6,f10 + c0: fc 0c 5d 8f mtfsf. 6,f11 + c4: fc 0d 55 8e mtfsf 6,f10,0,1 + c8: fc 0d 5d 8f mtfsf. 6,f11,0,1 + cc: fe 0c 55 8e mtfsf 6,f10,1,0 + d0: fe 0c 5d 8f mtfsf. 6,f11,1,0 + d4: ff 00 01 0c mtfsfi 6,0 + d8: ff 00 f1 0d mtfsfi. 6,15 + dc: ff 00 01 0c mtfsfi 6,0 + e0: ff 00 f1 0d mtfsfi. 6,15 + e4: ff 01 01 0c mtfsfi 6,0,1 + e8: ff 01 f1 0d mtfsfi. 6,15,1 diff --git a/gas/testsuite/gas/ppc/power6.s b/gas/testsuite/gas/ppc/power6.s index c84488a..9b3444a 100644 --- a/gas/testsuite/gas/ppc/power6.s +++ b/gas/testsuite/gas/ppc/power6.s @@ -47,3 +47,17 @@ start: dcbz 1, 2 dcbzl 3, 4 dcbz 5, 6 + mtfsf 6,10 + mtfsf. 6,11 + mtfsf 6,10,0,0 + mtfsf. 6,11,0,0 + mtfsf 6,10,0,1 + mtfsf. 6,11,0,1 + mtfsf 6,10,1,0 + mtfsf. 6,11,1,0 + mtfsfi 6,0 + mtfsfi. 6,15 + mtfsfi 6,0,0 + mtfsfi. 6,15,0 + mtfsfi 6,0,1 + mtfsfi. 6,15,1 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 1d50cc1..df43357 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2009-01-14 Peter Bergner <bergner@vnet.ibm.com> + + * ppc-dis.c (print_insn_powerpc): Skip insn if it is deprecated. + * ppc-opc.c (powerpc_opcodes) <mtfsf, mtfsf.>: Deprecate the two + operand form and enable the four operand form for POWER6 and later. + <mtfsfi, mtfsfi.>: Deprecate the two operand form and enable the + three operand form for POWER6 and later. + 2009-01-14 Mike Frysinger <vapier@gentoo.org> * bfin-dis.c (OUTS): Use "%s" as format string. diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index 061aa84..88c4fe7 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -266,7 +266,8 @@ print_insn_powerpc (bfd_vma memaddr, continue; if ((insn & opcode->mask) != opcode->opcode - || (opcode->flags & dialect) == 0) + || (opcode->flags & dialect) == 0 + || (opcode->deprecated & dialect) != 0) continue; /* Make two passes over the operands. First see if any of them diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 3ec8fed..511fd81 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -4887,8 +4887,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"dcmpoq", X(63,130), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}}, -{"mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), COM, PPCNONE, {BFF, U, W}}, -{"mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), COM, PPCNONE, {BFF, U, W}}, +{"mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), COM, POWER6, {BFF, U}}, +{"mtfsfi", XRC(63,134,0), XWRA_MASK|(3<<21)|(1<<11), POWER6, PPCNONE, {BFF, U, W}}, +{"mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), COM, POWER6, {BFF, U}}, +{"mtfsfi.", XRC(63,134,1), XWRA_MASK|(3<<21)|(1<<11), POWER6, PPCNONE, {BFF, U, W}}, {"fnabs", XRC(63,136,0), XRA_MASK, COM, PPCNONE, {FRT, FRB}}, {"fnabs.", XRC(63,136,1), XRA_MASK, COM, PPCNONE, {FRT, FRB}}, @@ -4937,8 +4939,10 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"dtstsfq", X(63,674), X_MASK, POWER6, PPCNONE, {BF, FRA, FRB}}, -{"mtfsf", XFL(63,711,0), XFL_MASK, COM, PPCNONE, {FLM, FRB, XFL_L, W}}, -{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, PPCNONE, {FLM, FRB, XFL_L, W}}, +{"mtfsf", XFL(63,711,0), XFL_MASK, COM, POWER6, {FLM, FRB}}, +{"mtfsf", XFL(63,711,0), XFL_MASK, POWER6, PPCNONE, {FLM, FRB, XFL_L, W}}, +{"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6, {FLM, FRB}}, +{"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6, PPCNONE, {FLM, FRB, XFL_L, W}}, {"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, {"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCNONE, {FRT, FRB}}, |