diff options
-rw-r--r-- | gas/ChangeLog | 8 | ||||
-rw-r--r-- | gas/config/tc-aarch64.c | 9 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/diagnostic.l | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/diagnostic.s | 1 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal.l | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal.s | 5 |
6 files changed, 29 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index f3fe16a..2134607 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2019-07-02 Barnaby Wilks <barnaby.wilks@arm.com> + + * config/tc-aarch64.c (parse_operands): Add error check. + * testsuite/gas/aarch64/diagnostic.l: New test. + * testsuite/gas/aarch64/diagnostic.s: New test. + * testsuite/gas/aarch64/illegal.l: New tests. + * testsuite/gas/aarch64/illegal.s: New tests. + 2019-07-02 Richard Sandiford <richard.sandiford@arm.com> * testsuite/gas/aarch64/sve-movprfx_27.s, diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 000a81c..47af143 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -5733,11 +5733,20 @@ parse_operands (char *str, const aarch64_opcode *opcode) val = parse_vector_reg_list (&str, reg_type, &vectype); if (val == PARSE_FAIL) goto failure; + if (! reg_list_valid_p (val, /* accept_alternate */ 0)) { set_fatal_syntax_error (_("invalid register list")); goto failure; } + + if (vectype.width != 0 && *str != ',') + { + set_fatal_syntax_error + (_("expected element type rather than vector type")); + goto failure; + } + info->reglist.first_regno = (val >> 2) & 0x1f; info->reglist.num_regs = (val & 0x3) + 1; } diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l index 6aae306..b5f304a 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.l +++ b/gas/testsuite/gas/aarch64/diagnostic.l @@ -182,3 +182,4 @@ [^:]*:311: Warning: unpredictable: identical transfer and status registers --`stlxr w26,x26,\[x3\]' [^:]*:312: Warning: unpredictable: identical transfer and status registers --`ldxp x26,x26,\[x5\]' [^:]*:313: Warning: unpredictable: identical transfer and status registers --`ldxp x26,x1,\[x26\]' +[^:]*:314: Error: expected element type rather than vector type at operand 1 -- `st4 {v0\.16b-v3\.16b}\[4\],\[x0\]' diff --git a/gas/testsuite/gas/aarch64/diagnostic.s b/gas/testsuite/gas/aarch64/diagnostic.s index c18c48e..21cbc53 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.s +++ b/gas/testsuite/gas/aarch64/diagnostic.s @@ -311,3 +311,4 @@ stlxr w26, x26, [x3] ldxp x26, x26, [x5] ldxp x26, x1, [x26] + st4 {v0.16b-v3.16b}[4], [x0] diff --git a/gas/testsuite/gas/aarch64/illegal.l b/gas/testsuite/gas/aarch64/illegal.l index 0c90110..75ef830 100644 --- a/gas/testsuite/gas/aarch64/illegal.l +++ b/gas/testsuite/gas/aarch64/illegal.l @@ -575,4 +575,8 @@ [^:]*:585: Error: .*`fcmgt v0\.2d,v0\.2d,#-0\.0' [^:]*:589: Error: .*`fmov s9,x0' [^:]*:590: Error: .*`fmov d7,w1' -[^:]*:592: Error: .* +[^:]*:592: Error: .*`st1 {v0\.16b}\[0\],\[x0\]' +[^:]*:593: Error: .*`st2 {v0\.16b-v1\.16b}\[1\],\[x0\]' +[^:]*:594: Error: .*`st3 {v0\.16b-v2\.16b}\[2\],\[x0\]' +[^:]*:595: Error: .*`st4 {v0\.8b-v3\.8b}\[4\],\[x0\]' +[^:]*:597: Error: .* diff --git a/gas/testsuite/gas/aarch64/illegal.s b/gas/testsuite/gas/aarch64/illegal.s index 7efe69e..ef03cc9 100644 --- a/gas/testsuite/gas/aarch64/illegal.s +++ b/gas/testsuite/gas/aarch64/illegal.s @@ -589,4 +589,9 @@ one_label: fmov s9, x0 fmov d7, w1 + st1 {v0.16b}[0],[x0] + st2 {v0.16b-v1.16b}[1],[x0] + st3 {v0.16b-v2.16b}[2],[x0] + st4 {v0.8b-v3.8b}[4],[x0] + // End (for errors during literal pool generation) |