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-rw-r--r--bfd/ChangeLog8
-rw-r--r--bfd/elf32-m32r.c33
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-m32r.c14
-rw-r--r--gas/testsuite/ChangeLog10
-rw-r--r--gas/testsuite/gas/m32r/error.exp1
-rw-r--r--gas/testsuite/gas/m32r/rel32-err.s10
-rw-r--r--gas/testsuite/gas/m32r/rel32-pic.d13
-rw-r--r--gas/testsuite/gas/m32r/rel32-pic.s12
-rw-r--r--gas/testsuite/gas/m32r/rel32.d13
-rw-r--r--gas/testsuite/gas/m32r/rel32.exp6
-rw-r--r--gas/testsuite/gas/m32r/rel32.s12
-rw-r--r--include/elf/ChangeLog4
-rw-r--r--include/elf/m32r.h3
14 files changed, 138 insertions, 6 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 439a8ea..b7397de 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,11 @@
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * elf32-m32r.c (m32r_elf_howto_table): Support R_M32R_REL32.
+ (m32r_reloc_map): Likewise.
+ (m32r_elf_relocate_section): Likewise.
+ (m32r_elf_gc_sweep_hook): Likewise.
+ (m32r_elf_check_relocs): Likewise.
+
2005-07-18 Nick Clifton <nickc@redhat.com>
* reloc.c: Add M32C and MS1 relocs.
diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c
index 16e507c..23075d6 100644
--- a/bfd/elf32-m32r.c
+++ b/bfd/elf32-m32r.c
@@ -877,7 +877,21 @@ static reloc_howto_type m32r_elf_howto_table[] =
0, /* dst_mask */
FALSE), /* pcrel_offset */
- EMPTY_HOWTO (45),
+ /* A 32 bit PC relative relocation. */
+ HOWTO (R_M32R_REL32, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 32, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield, /* complain_on_overflow */
+ bfd_elf_generic_reloc,/* special_function */
+ "R_M32R_REL32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
EMPTY_HOWTO (46),
EMPTY_HOWTO (47),
@@ -1193,6 +1207,7 @@ static const struct m32r_reloc_map m32r_reloc_map[] =
{ BFD_RELOC_M32R_SDA16, R_M32R_SDA16_RELA },
{ BFD_RELOC_VTABLE_INHERIT, R_M32R_RELA_GNU_VTINHERIT },
{ BFD_RELOC_VTABLE_ENTRY, R_M32R_RELA_GNU_VTENTRY },
+ { BFD_RELOC_32_PCREL, R_M32R_REL32 },
{ BFD_RELOC_M32R_GOT24, R_M32R_GOT24 },
{ BFD_RELOC_M32R_26_PLTREL, R_M32R_26_PLTREL },
@@ -2611,6 +2626,7 @@ m32r_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
|| r_type == R_M32R_HI16_SLO_RELA
|| r_type == R_M32R_LO16_RELA)
&& !h->forced_local)
+ || r_type == R_M32R_REL32
|| r_type == R_M32R_10_PCREL_RELA
|| r_type == R_M32R_18_PCREL_RELA
|| r_type == R_M32R_26_PCREL_RELA)
@@ -2854,6 +2870,7 @@ m32r_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
case R_M32R_16_RELA:
case R_M32R_24_RELA:
case R_M32R_32_RELA:
+ case R_M32R_REL32:
case R_M32R_18_PCREL_RELA:
case R_M32R_26_PCREL_RELA:
case R_M32R_HI16_ULO_RELA:
@@ -2862,7 +2879,8 @@ m32r_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
&& r_symndx != 0
&& (input_section->flags & SEC_ALLOC) != 0
&& ((r_type != R_M32R_18_PCREL_RELA
- && r_type != R_M32R_26_PCREL_RELA)
+ && r_type != R_M32R_26_PCREL_RELA
+ && r_type != R_M32R_REL32)
|| (h != NULL
&& h->dynindx != -1
&& (! info->symbolic
@@ -2912,7 +2930,8 @@ m32r_elf_relocate_section (bfd *output_bfd ATTRIBUTE_UNUSED,
if (skip)
memset (&outrel, 0, sizeof outrel);
else if (r_type == R_M32R_18_PCREL_RELA
- || r_type == R_M32R_26_PCREL_RELA)
+ || r_type == R_M32R_26_PCREL_RELA
+ || r_type == R_M32R_REL32)
{
BFD_ASSERT (h != NULL && h->dynindx != -1);
outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
@@ -3683,6 +3702,7 @@ m32r_elf_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
case R_M32R_16_RELA:
case R_M32R_24_RELA:
case R_M32R_32_RELA:
+ case R_M32R_REL32:
case R_M32R_HI16_ULO_RELA:
case R_M32R_HI16_SLO_RELA:
case R_M32R_LO16_RELA:
@@ -3704,7 +3724,8 @@ m32r_elf_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
if (p->sec == sec)
{
if (ELF32_R_TYPE (rel->r_info) == R_M32R_26_PCREL_RELA
- || ELF32_R_TYPE (rel->r_info) == R_M32R_26_PCREL_RELA)
+ || ELF32_R_TYPE (rel->r_info) == R_M32R_26_PCREL_RELA
+ || ELF32_R_TYPE (rel->r_info) == R_M32R_REL32)
p->pc_count -= 1;
p->count -= 1;
if (p->count == 0)
@@ -3864,6 +3885,7 @@ m32r_elf_check_relocs (bfd *abfd,
case R_M32R_16_RELA:
case R_M32R_24_RELA:
case R_M32R_32_RELA:
+ case R_M32R_REL32:
case R_M32R_HI16_ULO_RELA:
case R_M32R_HI16_SLO_RELA:
case R_M32R_LO16_RELA:
@@ -3899,7 +3921,8 @@ m32r_elf_check_relocs (bfd *abfd,
if ((info->shared
&& (sec->flags & SEC_ALLOC) != 0
&& ((r_type != R_M32R_26_PCREL_RELA
- && r_type != R_M32R_18_PCREL_RELA)
+ && r_type != R_M32R_18_PCREL_RELA
+ && r_type != R_M32R_REL32)
|| (h != NULL
&& (! info->symbolic
|| h->root.type == bfd_link_hash_defweak
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 24a86dc..3cac97b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * config/tc-m32r.c (tc_gen_reloc): Check BFD_RELOC_32_PCREL and
+ BFD_RELOC_16_PCREL to Support R_M32R_REL32.
+
2005-07-18 Nick Clifton <nickc@redhat.com>
* configure.tgt: Restore alpha ordering to list of arches.
diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c
index 5f17337..978f373 100644
--- a/gas/config/tc-m32r.c
+++ b/gas/config/tc-m32r.c
@@ -2258,6 +2258,17 @@ tc_gen_reloc (asection * section, fixS * fixP)
reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
reloc->address = fixP->fx_frag->fr_address + fixP->fx_where;
+
+ if (fixP->fx_pcrel)
+ {
+ if (fixP->fx_r_type == BFD_RELOC_32)
+ fixP->fx_r_type = BFD_RELOC_32_PCREL;
+ else if (fixP->fx_r_type == BFD_RELOC_16)
+ {
+ fixP->fx_r_type = BFD_RELOC_16_PCREL;
+ bfd_set_error (bfd_error_bad_value);
+ }
+ }
code = fixP->fx_r_type;
if (pic_code)
@@ -2327,7 +2338,8 @@ printf(" => %s\n",reloc->howto->name);
/* Use fx_offset for these cases. */
if ( fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
- || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
+ || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
+ || fixP->fx_r_type == BFD_RELOC_32_PCREL)
reloc->addend = fixP->fx_offset;
else if ((!pic_code
&& code != BFD_RELOC_M32R_26_PLTREL)
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 6added2..c8176e4 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * gas/m32r/rel32.exp: New file.
+ * gas/m32r/rel32.s: New file.
+ * gas/m32r/rel32.d: New file.
+ * gas/m32r/rel32-pic.s: New file.
+ * gas/m32r/rel32-pic.d: New file.
+ * gas/m32r/rel32-err.s: New file.
+ * gas/m32r/error.exp: Added rel32-err.
+
2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add suffix.
diff --git a/gas/testsuite/gas/m32r/error.exp b/gas/testsuite/gas/m32r/error.exp
index 17807c1..11c15d5 100644
--- a/gas/testsuite/gas/m32r/error.exp
+++ b/gas/testsuite/gas/m32r/error.exp
@@ -10,6 +10,7 @@ if [istarget m32r-*-*] {
dg-runtest "$srcdir/$subdir/interfere.s" "" ""
dg-runtest "$srcdir/$subdir/outofrange.s" "" ""
dg-runtest "$srcdir/$subdir/parallel.s" "" ""
+ dg-runtest "$srcdir/$subdir/rel32-err.s" "" ""
dg-finish
diff --git a/gas/testsuite/gas/m32r/rel32-err.s b/gas/testsuite/gas/m32r/rel32-err.s
new file mode 100644
index 0000000..fe8784e
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rel32-err.s
@@ -0,0 +1,10 @@
+
+; { dg-do assemble { target m32r-*-* } }
+
+ .text
+ nop
+ nop
+bar:
+ .section .text2
+ .2byte bar - . ; { dg-error "can't export reloc type 11" }
+ .byte bar - . ; { dg-error "can\'t export reloc type 7" }
diff --git a/gas/testsuite/gas/m32r/rel32-pic.d b/gas/testsuite/gas/m32r/rel32-pic.d
new file mode 100644
index 0000000..9a27fe9
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rel32-pic.d
@@ -0,0 +1,13 @@
+#as: -KPIC
+#objdump: -r
+#name: rel32-pic
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[.text2\]:
+OFFSET TYPE VALUE
+00000000 R_M32R_REL32 .text\+0x00000004
+00000008 R_M32R_REL32 .text\+0x00000008
+0000000c R_M32R_REL32 .text
+
+
diff --git a/gas/testsuite/gas/m32r/rel32-pic.s b/gas/testsuite/gas/m32r/rel32-pic.s
new file mode 100644
index 0000000..488c3ea
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rel32-pic.s
@@ -0,0 +1,12 @@
+ .text
+ nop
+ nop
+bar:
+ .section .text2
+ .4byte bar - .
+label:
+ nop
+ nop
+ .4byte bar - label
+ .4byte bar - label2
+label2:
diff --git a/gas/testsuite/gas/m32r/rel32.d b/gas/testsuite/gas/m32r/rel32.d
new file mode 100644
index 0000000..abfe136
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rel32.d
@@ -0,0 +1,13 @@
+#as:
+#objdump: -r
+#name: rel32
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[.text2\]:
+OFFSET TYPE VALUE
+00000000 R_M32R_REL32 .text\+0x00000004
+00000008 R_M32R_REL32 .text\+0x00000008
+0000000c R_M32R_REL32 .text
+
+
diff --git a/gas/testsuite/gas/m32r/rel32.exp b/gas/testsuite/gas/m32r/rel32.exp
new file mode 100644
index 0000000..1866217
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rel32.exp
@@ -0,0 +1,6 @@
+# M32R R_M32R_REL32 testcases
+
+if [istarget m32r*-*-*] {
+ run_dump_test "rel32"
+ run_dump_test "rel32-pic"
+}
diff --git a/gas/testsuite/gas/m32r/rel32.s b/gas/testsuite/gas/m32r/rel32.s
new file mode 100644
index 0000000..488c3ea
--- /dev/null
+++ b/gas/testsuite/gas/m32r/rel32.s
@@ -0,0 +1,12 @@
+ .text
+ nop
+ nop
+bar:
+ .section .text2
+ .4byte bar - .
+label:
+ nop
+ nop
+ .4byte bar - label
+ .4byte bar - label2
+label2:
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index 5b8c3eb3..1822b40 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,3 +1,7 @@
+2005-07-20 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
+
+ * m32r.h (R_M32R_REL32): Added.
+
2005-07-18 Ben Elliston <bje@au.ibm.com>
* dwarf2.h (enum dwarf_type): Remove DW_AT_GNU_decimal_float.
diff --git a/include/elf/m32r.h b/include/elf/m32r.h
index b82377a..d648df9 100644
--- a/include/elf/m32r.h
+++ b/include/elf/m32r.h
@@ -52,6 +52,8 @@ START_RELOC_NUMBERS (elf_m32r_reloc_type)
RELOC_NUMBER (R_M32R_SDA16_RELA, 42)
RELOC_NUMBER (R_M32R_RELA_GNU_VTINHERIT, 43)
RELOC_NUMBER (R_M32R_RELA_GNU_VTENTRY, 44)
+
+ RELOC_NUMBER (R_M32R_REL32, 45)
RELOC_NUMBER (R_M32R_GOT24, 48)
RELOC_NUMBER (R_M32R_26_PLTREL, 49)
@@ -70,6 +72,7 @@ START_RELOC_NUMBERS (elf_m32r_reloc_type)
RELOC_NUMBER (R_M32R_GOTOFF_HI_ULO, 62)
RELOC_NUMBER (R_M32R_GOTOFF_HI_SLO, 63)
RELOC_NUMBER (R_M32R_GOTOFF_LO, 64)
+
END_RELOC_NUMBERS (R_M32R_max)
/* Processor specific section indices. These sections do not actually
generated by cgit v1.1 at 2025-01-06 11:42:46 +0000