diff options
| -rw-r--r-- | sim/frv/ChangeLog | 12 | ||||
| -rw-r--r-- | sim/frv/profile.c | 20 | ||||
| -rw-r--r-- | sim/frv/profile.h | 18 |
3 files changed, 31 insertions, 19 deletions
diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index 945d760..51c9e17 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,5 +1,17 @@ 2021-06-27 Mike Frysinger <vapier@gentoo.org> + * profile.c (frvbf_model_insn_after): Change return to void. + (enforce_full_fr_latency, post_wait_for_FR, post_wait_for_FRdouble, + post_wait_for_ACC, post_wait_for_CCR, post_wait_for_SPR, + post_wait_for_fdiv, post_wait_for_fsqrt, + post_wait_for_float): Likewise. + * profile.h (post_wait_for_FR, post_wait_for_FRdouble, + post_wait_for_ACC, post_wait_for_CCR, post_wait_for_SPR, + post_wait_for_fdiv, post_wait_for_fsqrt, post_wait_for_float, + post_wait_for_media): Likewise. + +2021-06-27 Mike Frysinger <vapier@gentoo.org> + * frv.c (frvbf_shift_left_arith_saturate): Add braces to if statement. * profile-fr500.c (adjust_float_register_busy): Likewise. * profile-fr550.c (adjust_float_register_busy): Likewise. diff --git a/sim/frv/profile.c b/sim/frv/profile.c index 0d2b6f4..94212bf 100644 --- a/sim/frv/profile.c +++ b/sim/frv/profile.c @@ -1012,7 +1012,7 @@ frvbf_model_insn_after (SIM_CPU *cpu, int last_p, int cycles) } } -USI +void frvbf_model_branch (SIM_CPU *current_cpu, PCADDR target, int hint) { /* Record the hint and branch address for use in profiling. */ @@ -1787,7 +1787,7 @@ enforce_full_fr_latency (SIM_CPU *cpu, INT in_FR) /* Calculate how long the post processing for a floating point insn must wait for resources to become available. */ -int +void post_wait_for_FR (SIM_CPU *cpu, INT in_FR) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1803,7 +1803,7 @@ post_wait_for_FR (SIM_CPU *cpu, INT in_FR) /* Calculate how long the post processing for a floating point insn must wait for resources to become available. */ -int +void post_wait_for_FRdouble (SIM_CPU *cpu, INT in_FR) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1826,7 +1826,7 @@ post_wait_for_FRdouble (SIM_CPU *cpu, INT in_FR) } } -int +void post_wait_for_ACC (SIM_CPU *cpu, INT in_ACC) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1840,7 +1840,7 @@ post_wait_for_ACC (SIM_CPU *cpu, INT in_ACC) } } -int +void post_wait_for_CCR (SIM_CPU *cpu, INT in_CCR) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1859,7 +1859,7 @@ post_wait_for_CCR (SIM_CPU *cpu, INT in_CCR) } } -int +void post_wait_for_SPR (SIM_CPU *cpu, INT in_SPR) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1873,7 +1873,7 @@ post_wait_for_SPR (SIM_CPU *cpu, INT in_SPR) } } -int +void post_wait_for_fdiv (SIM_CPU *cpu, INT slot) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1891,7 +1891,7 @@ post_wait_for_fdiv (SIM_CPU *cpu, INT slot) } } -int +void post_wait_for_fsqrt (SIM_CPU *cpu, INT slot) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1909,7 +1909,7 @@ post_wait_for_fsqrt (SIM_CPU *cpu, INT slot) } } -int +void post_wait_for_float (SIM_CPU *cpu, INT slot) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); @@ -1927,7 +1927,7 @@ post_wait_for_float (SIM_CPU *cpu, INT slot) } } -int +void post_wait_for_media (SIM_CPU *cpu, INT slot) { FRV_PROFILE_STATE *ps = CPU_PROFILE_STATE (cpu); diff --git a/sim/frv/profile.h b/sim/frv/profile.h index 9154a65..fa8139f 100644 --- a/sim/frv/profile.h +++ b/sim/frv/profile.h @@ -150,15 +150,15 @@ void load_wait_for_GRdouble (SIM_CPU *, INT); void load_wait_for_FRdouble (SIM_CPU *, INT); void enforce_full_fr_latency (SIM_CPU *, INT); void enforce_full_acc_latency (SIM_CPU *, INT); -int post_wait_for_FR (SIM_CPU *, INT); -int post_wait_for_FRdouble (SIM_CPU *, INT); -int post_wait_for_ACC (SIM_CPU *, INT); -int post_wait_for_CCR (SIM_CPU *, INT); -int post_wait_for_SPR (SIM_CPU *, INT); -int post_wait_for_fdiv (SIM_CPU *, INT); -int post_wait_for_fsqrt (SIM_CPU *, INT); -int post_wait_for_float (SIM_CPU *, INT); -int post_wait_for_media (SIM_CPU *, INT); +void post_wait_for_FR (SIM_CPU *, INT); +void post_wait_for_FRdouble (SIM_CPU *, INT); +void post_wait_for_ACC (SIM_CPU *, INT); +void post_wait_for_CCR (SIM_CPU *, INT); +void post_wait_for_SPR (SIM_CPU *, INT); +void post_wait_for_fdiv (SIM_CPU *, INT); +void post_wait_for_fsqrt (SIM_CPU *, INT); +void post_wait_for_float (SIM_CPU *, INT); +void post_wait_for_media (SIM_CPU *, INT); void trace_vliw_wait_cycles (SIM_CPU *); void handle_resource_wait (SIM_CPU *); |