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authorJim Wilson <jimw@sifive.com>2019-06-26 17:17:09 -0700
committerJim Wilson <jimw@sifive.com>2019-06-26 17:17:09 -0700
commitd7560e2df501c7da1b0e4e64116dd52fe5715a96 (patch)
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RISC-V: Make objdump disassembly work right for binary files.
Without the ELF header to set info->endian, it ends up as BFD_UNKNOWN_ENDIAN which gets printed as big-endian. But RISC-V instructions are always little endian, so we can set endian_code correctly, and then set display_endian from that. This is similar to how the aarch64 support works, but without the support for constant pools, as we don't have that on RISC-V. opcodes/ PR binutils/24739 * riscv-dis.c (riscv_disasemble_insn): Set info->endian_code. Set info->display_endian to info->endian_code.
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