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| author | Andrew Waterman <andrew@sifive.com> | 2017-03-22 02:09:56 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-03-31 09:35:11 -0700 |
| commit | 858f82bf7e6531f4ad821285359c759c835f9dce (patch) | |
| tree | 6a3fa51e7ca08ced8eca7882fa255fbce059a48e /zlib/FAQ | |
| parent | 8fa5b777488105287e56937365523d01e51c2eb3 (diff) | |
| download | gdb-858f82bf7e6531f4ad821285359c759c835f9dce.zip gdb-858f82bf7e6531f4ad821285359c759c835f9dce.tar.gz gdb-858f82bf7e6531f4ad821285359c759c835f9dce.tar.bz2 | |
RISC-V: Add physical memory protection CSRs
2017-03-27 Andrew Waterman <andrew@sifive.com>
* opcode/riscv-opc.h (CSR_PMPCFG0): New define.
(CSR_PMPCFG1): Likewise.
(CSR_PMPCFG2): Likewise.
(CSR_PMPCFG3): Likewise.
(CSR_PMPADDR0): Likewise.
(CSR_PMPADDR1): Likewise.
(CSR_PMPADDR2): Likewise.
(CSR_PMPADDR3): Likewise.
(CSR_PMPADDR4): Likewise.
(CSR_PMPADDR5): Likewise.
(CSR_PMPADDR6): Likewise.
(CSR_PMPADDR7): Likewise.
(CSR_PMPADDR8): Likewise.
(CSR_PMPADDR9): Likewise.
(CSR_PMPADDR10): Likewise.
(CSR_PMPADDR11): Likewise.
(CSR_PMPADDR12): Likewise.
(CSR_PMPADDR13): Likewise.
(CSR_PMPADDR14): Likewise.
(CSR_PMPADDR15): Likewise.
(pmpcfg0): Declare register.
(pmpcfg1): Likewise.
(pmpcfg2): Likewise.
(pmpcfg3): Likewise.
(pmpaddr0): Likewise.
(pmpaddr1): Likewise.
(pmpaddr2): Likewise.
(pmpaddr3): Likewise.
(pmpaddr4): Likewise.
(pmpaddr5): Likewise.
(pmpaddr6): Likewise.
(pmpaddr7): Likewise.
(pmpaddr8): Likewise.
(pmpaddr9): Likewise.
(pmpaddr10): Likewise.
(pmpaddr11): Likewise.
(pmpaddr12): Likewise.
(pmpaddr13): Likewise.
(pmpaddr14): Likewise.
(pmpaddr15): Likewise.
Diffstat (limited to 'zlib/FAQ')
0 files changed, 0 insertions, 0 deletions