aboutsummaryrefslogtreecommitdiff
path: root/sim
diff options
context:
space:
mode:
authorKevin Buettner <kevinb@redhat.com>2012-02-16 23:17:27 +0000
committerKevin Buettner <kevinb@redhat.com>2012-02-16 23:17:27 +0000
commitf95586a44d28c31728d034502ba80ea98cda3ab8 (patch)
tree6f329240452881b120d4b2b6dffdae4f50e54d0e /sim
parent7dcd53a07458941ccf02e280b42f9d68dfb976b0 (diff)
downloadgdb-f95586a44d28c31728d034502ba80ea98cda3ab8.zip
gdb-f95586a44d28c31728d034502ba80ea98cda3ab8.tar.gz
gdb-f95586a44d28c31728d034502ba80ea98cda3ab8.tar.bz2
Update sim_fetch_register, sim_store_register for sh and mn10300.
Fix compile warnings for sh built on 64-bit hosts.
Diffstat (limited to 'sim')
-rw-r--r--sim/mn10300/ChangeLog4
-rw-r--r--sim/mn10300/interp.c2
-rw-r--r--sim/sh/ChangeLog7
-rw-r--r--sim/sh/interp.c6
4 files changed, 15 insertions, 4 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog
index e8c845d..8b9fa1f 100644
--- a/sim/mn10300/ChangeLog
+++ b/sim/mn10300/ChangeLog
@@ -1,3 +1,7 @@
+2012-02-16 Kevin Buettner <kevinb@redhat.com>
+
+ * interp.c (sim_fetch_register): Return length, not -1.
+
2012-01-02 Joel Brobecker <brobecker@adacore.com>
* sim-main.h: Reformat copyright header.
diff --git a/sim/mn10300/interp.c b/sim/mn10300/interp.c
index e06ae59..9c458d6 100644
--- a/sim/mn10300/interp.c
+++ b/sim/mn10300/interp.c
@@ -383,7 +383,7 @@ sim_fetch_register (SIM_DESC sd,
int length)
{
put_word (memory, State.regs[rn]);
- return -1;
+ return length;
}
int
diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog
index a5f530c..f663c00 100644
--- a/sim/sh/ChangeLog
+++ b/sim/sh/ChangeLog
@@ -1,3 +1,10 @@
+2012-02-16 Kevin Buettner <kevinb@redhat.com>
+
+ * interp.c (MA): Adjust cast to avoid warning on 64-bit hosts.
+
+ * interp.c (sim_store_register, sim_fetch_register): Return
+ length, not -1.
+
2011-12-03 Mike Frysinger <vapier@gentoo.org>
* aclocal.m4: New file.
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
index 20239de..e9313c7 100644
--- a/sim/sh/interp.c
+++ b/sim/sh/interp.c
@@ -862,7 +862,7 @@ do { \
#else
#define MA(n) \
- do { memstalls += ((((int) PC & 3) != 0) ? (n) : ((n) - 1)); } while (0)
+ do { memstalls += ((((long) PC & 3) != 0) ? (n) : ((n) - 1)); } while (0)
#define L(x) thislock = x;
#define TL(x) if ((x) == prevlock) stalls++;
@@ -2356,7 +2356,7 @@ sim_store_register (sd, rn, memory, length)
default:
return 0;
}
- return -1;
+ return length;
}
int
@@ -2531,7 +2531,7 @@ sim_fetch_register (sd, rn, memory, length)
return 0;
}
* (int *) memory = swap (val);
- return -1;
+ return length;
}
int