diff options
| author | Jeff Law <law@redhat.com> | 1996-08-30 04:27:48 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1996-08-30 04:27:48 +0000 |
| commit | e9b6cbaca5f9b88ec83e8eb747b3013736873de0 (patch) | |
| tree | fe25ef30ed9e0f5d83052c5b5c7fd071c4cb485f /sim | |
| parent | 3095b8dfc59db40a8d91247be6428537966bb924 (diff) | |
| download | gdb-e9b6cbaca5f9b88ec83e8eb747b3013736873de0.zip gdb-e9b6cbaca5f9b88ec83e8eb747b3013736873de0.tar.gz gdb-e9b6cbaca5f9b88ec83e8eb747b3013736873de0.tar.bz2 | |
* interp.c (do_format_5): Get operands correctly and
call the target function.
(sim_resume): Don't do a PC update for format 5 instructions.
* simops.c: Handle "jarl" and "jmp" instructions.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/v850/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/v850/interp.c | 8 | ||||
| -rw-r--r-- | sim/v850/simops.c | 38 |
3 files changed, 39 insertions, 12 deletions
diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog index de4624c2..f45f4d4 100644 --- a/sim/v850/ChangeLog +++ b/sim/v850/ChangeLog @@ -1,5 +1,10 @@ Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) + * interp.c (do_format_5): Get operands correctly and + call the target function. + (sim_resume): Don't do a PC update for format 5 instructions. + * simops.c: Handle "jarl" and "jmp" instructions. + * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" "di", and "ei" instructions correctly. diff --git a/sim/v850/interp.c b/sim/v850/interp.c index 1cd990e..d824590 100644 --- a/sim/v850/interp.c +++ b/sim/v850/interp.c @@ -186,7 +186,13 @@ static void do_format_5 (insn) uint32 insn; { + struct hash_entry *h; printf("format 5 0x%x\n", insn); + + h = lookup_hash (insn); + OP[0] = ((insn & 0x3f) | (((insn >> 17) & 0x7fff) << 6)) << 1; + OP[1] = (insn >> 11) & 0x1f; + (h->ops->func) (); } static void @@ -380,7 +386,7 @@ sim_resume (step, siggnal) else if ((opcode & 0x3E) == 0x3C) { do_format_5 (inst); - PC += 4; + /* No PC update, it's done in the instruction. */ } else if ((opcode & 0x3F) == 0x3E) { diff --git a/sim/v850/simops.c b/sim/v850/simops.c index 31c56c4..7ac1a44 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -291,11 +291,32 @@ OP_58F () State.pc += 2; } +/* jmp [reg1] */ void -OP_660 () +OP_60 () { + /* interp.c will bump this by +2, so correct for it here. */ + State.pc = State.regs[OP[0]] - 2; } +/* jarl disp22, reg */ +void +OP_780 () +{ + unsigned int op0, opc; + int temp; + + temp = OP[0]; + temp = (temp << 10) >> 10; + op0 = temp; + opc = State.pc; + + State.pc += temp; + + /* Gross. jarl X,r0 is really jr and doesn't save its result. */ + if (OP[1] != 0) + State.regs[OP[1]] = opc + 4; +} /* add reg, reg */ void @@ -642,21 +663,11 @@ OP_10720 () } void -OP_780 () -{ -} - -void OP_720 () { } void -OP_60 () -{ -} - -void OP_87C0 () { } @@ -1094,3 +1105,8 @@ OP_700 () { } +void +OP_660 () +{ +} + |