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authorDoug Evans <dje@google.com>1999-01-07 00:08:46 +0000
committerDoug Evans <dje@google.com>1999-01-07 00:08:46 +0000
commite0eaa63837a81b504e5eb85cb9c53b75159d6728 (patch)
tree556a6ff5dcc9dd3cad933a65c3ff03afa63a2dcb /sim
parentb2ebff7bcf8b82ae30b59ec0b310a276b0591ff4 (diff)
downloadgdb-e0eaa63837a81b504e5eb85cb9c53b75159d6728.zip
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* cpu.h: Regenerate.
* cpux.h: Regenerate.
Diffstat (limited to 'sim')
-rw-r--r--sim/m32r/ChangeLog7
-rw-r--r--sim/m32r/cpu.h10
-rw-r--r--sim/m32r/cpux.h10
3 files changed, 27 insertions, 0 deletions
diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog
index 7e488e1..6dba1d0 100644
--- a/sim/m32r/ChangeLog
+++ b/sim/m32r/ChangeLog
@@ -1,3 +1,10 @@
+1999-01-06 Doug Evans <devans@casey.cygnus.com>
+
+ * cpu.h: Regenerate.
+start-sanitize-m32rx
+ * cpux.h: Regenerate.
+end-sanitize-m32rx
+
1999-01-05 Doug Evans <devans@casey.cygnus.com>
* Makefile.in (MAIN_INCLUDE_DEPS): Delete.
diff --git a/sim/m32r/cpu.h b/sim/m32r/cpu.h
index bd07264..a959833 100644
--- a/sim/m32r/cpu.h
+++ b/sim/m32r/cpu.h
@@ -46,18 +46,28 @@ typedef struct {
#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
/* control registers */
USI h_cr[16];
+/* GET_H_CR macro user-written */
+/* SET_H_CR macro user-written */
/* accumulator */
DI h_accum;
+/* GET_H_ACCUM macro user-written */
+/* SET_H_ACCUM macro user-written */
/* start-sanitize-m32rx */
/* accumulators */
DI h_accums[2];
/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+/* GET_H_ACCUMS macro user-written */
+/* SET_H_ACCUMS macro user-written */
+/* end-sanitize-m32rx */
/* condition bit */
BI h_cond;
#define GET_H_COND() CPU (h_cond)
#define SET_H_COND(x) (CPU (h_cond) = (x))
/* psw part of psw */
UQI h_psw;
+/* GET_H_PSW macro user-written */
+/* SET_H_PSW macro user-written */
/* backup psw */
UQI h_bpsw;
#define GET_H_BPSW() CPU (h_bpsw)
diff --git a/sim/m32r/cpux.h b/sim/m32r/cpux.h
index 9ddd8f1..89fc7b6 100644
--- a/sim/m32r/cpux.h
+++ b/sim/m32r/cpux.h
@@ -46,18 +46,28 @@ typedef struct {
#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
/* control registers */
USI h_cr[16];
+/* GET_H_CR macro user-written */
+/* SET_H_CR macro user-written */
/* accumulator */
DI h_accum;
+/* GET_H_ACCUM macro user-written */
+/* SET_H_ACCUM macro user-written */
/* start-sanitize-m32rx */
/* accumulators */
DI h_accums[2];
/* end-sanitize-m32rx */
+/* start-sanitize-m32rx */
+/* GET_H_ACCUMS macro user-written */
+/* SET_H_ACCUMS macro user-written */
+/* end-sanitize-m32rx */
/* condition bit */
BI h_cond;
#define GET_H_COND() CPU (h_cond)
#define SET_H_COND(x) (CPU (h_cond) = (x))
/* psw part of psw */
UQI h_psw;
+/* GET_H_PSW macro user-written */
+/* SET_H_PSW macro user-written */
/* backup psw */
UQI h_bpsw;
#define GET_H_BPSW() CPU (h_bpsw)