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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-08-09 08:32:54 +1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-08-09 08:32:54 +1000 |
| commit | a7b0384d541b6124e55c8d19e2855e91f03fc1b4 (patch) | |
| tree | 013a18801b3111d6c43a3dbae7bab64444b2c1e9 /sim | |
| parent | 647adc681238f8ed1638520f7e09ed8b56af55af (diff) | |
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gas: sparc: Fix faligndatai assembly and disassembly
The first operand is a general register, not an fp register;
the third operand is encoded into RS2, not RS3;
the second operand must match the destination operand.
Diffstat (limited to 'sim')
0 files changed, 0 insertions, 0 deletions