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authorAndrew Cagney <cagney@redhat.com>1998-02-02 14:14:17 +0000
committerAndrew Cagney <cagney@redhat.com>1998-02-02 14:14:17 +0000
commit4634263c4ce689d14854632526dcb4e1b4a61f9c (patch)
tree0c02924c61ed9680a6847201839e3957af113433 /sim
parenta97f304b04e1c9300611c2f712d76ebabd7e791a (diff)
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Make IGEN the generator for all but mips16 simulators.
Clean up botched merge in interp.c:sim_open().
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/configure.in22
1 files changed, 17 insertions, 5 deletions
diff --git a/sim/mips/configure.in b/sim/mips/configure.in
index 9ebf0b4..cef211d 100644
--- a/sim/mips/configure.in
+++ b/sim/mips/configure.in
@@ -12,7 +12,7 @@ SIM_AC_OPTION_HOSTENDIAN
SIM_AC_OPTION_WARNINGS
-# Ensure a reasonable default simulator is constructed:
+# Ensure a reasonable default simulator is constructed: (DEPRECATED)
case "${target}" in
# start-sanitize-tx19
mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";;
@@ -30,6 +30,7 @@ case "${target}" in
esac
AC_SUBST(SIMCONF)
+# DEPRECATED
case "${target}" in
# start-sanitize-tx19
mipstx19*-*-*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
@@ -39,6 +40,7 @@ esac
AC_SUBST(SIM_SUBTARGET)
+
#
# Select the byte order of the target
#
@@ -59,6 +61,7 @@ esac
SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian)
+
#
# Select the bitsize of the target
#
@@ -77,6 +80,7 @@ esac
SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb)
+
#
# Select the floating hardware support of the target
#
@@ -96,6 +100,7 @@ esac
SIM_AC_OPTION_FLOAT($mips_fpu)
+
#
# Select the level of SMP support
#
@@ -108,6 +113,7 @@ esac
SIM_AC_OPTION_SMP($mips_smp)
+
#
# Select the IGEN architecture
#
@@ -116,7 +122,6 @@ sim_igen_machine="-M mipsIV"
sim_m16_machine="-M mips16"
sim_igen_filter="32,64,f"
sim_m16_filter="16"
-
case "${target}" in
# start-sanitize-tx19
mipstx19*-*-*) sim_default_gen=M16
@@ -145,12 +150,17 @@ case "${target}" in
sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5000"
# end-sanitize-vr5400
;;
+ mips64*-*-*) sim_default_gen=IGEN
+ sim_igen_filter="32,64,f"
+ sim_use_gen=IGEN
+ ;;
mips16*-*-*) sim_default_gen=M16
+ sim_igen_filter="32,64,f"
+ sim_m16_filter="16"
;;
- mips32*-*-*) sim_default_gen=IGEN
+ mips*-*-*) sim_default_gen=IGEN
sim_igen_filter="32,f"
- ;;
- *) sim_default_gen=IGEN
+ sim_use_gen=IGEN
;;
esac
sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
@@ -158,6 +168,8 @@ sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
AC_SUBST(sim_igen_flags)
AC_SUBST(sim_m16_flags)
+
+
#
# Enable igen
#