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author | Andrew Cagney <cagney@redhat.com> | 1998-12-04 04:45:05 +0000 |
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committer | Andrew Cagney <cagney@redhat.com> | 1998-12-04 04:45:05 +0000 |
commit | 33ccdb1b9786497b5c284c28520888166da877fa (patch) | |
tree | 28028a31ef50501a458829e36f285b4e3d233499 /sim | |
parent | beef5e777c21a0ddb82dd4d91c5cb41303eb880f (diff) | |
download | gdb-33ccdb1b9786497b5c284c28520888166da877fa.zip gdb-33ccdb1b9786497b5c284c28520888166da877fa.tar.gz gdb-33ccdb1b9786497b5c284c28520888166da877fa.tar.bz2 |
* gen-engine.c (print_run_body): Prefix instruction_address.
Diffstat (limited to 'sim')
-rw-r--r-- | sim/igen/ChangeLog | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/sim/igen/ChangeLog b/sim/igen/ChangeLog index 4040c6b..508b130 100644 --- a/sim/igen/ChangeLog +++ b/sim/igen/ChangeLog @@ -1,7 +1,23 @@ +Fri Dec 4 15:14:09 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * gen-engine.c (print_run_body): Prefix instruction_address. + +Wed Oct 28 18:12:43 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * Makefile.in (SIM_WARNINGS): Update to match ../common/aclocal.m4 + changes. + +Wed Aug 12 10:55:28 1998 Frank Ch. Eigler <fche@cygnus.com> + + * gen-icache.c (print_icache_extraction): #undef a generated + symbol before #define'ing it, to remove conflict with system + macros. + Wed Jul 29 10:07:27 1998 Andrew Cagney <cagney@b1.cygnus.com> - * gen.c (gen_entry_expand_opcode): Extract the field value from an - opcode using the correct location bits. + * gen.c (gen_entry_expand_opcode): For conditional, fields. Fix + the extraction of the value from its source - both table and bit + cases were wrong. Tue Jul 28 11:19:43 1998 Andrew Cagney <cagney@b1.cygnus.com> |