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| author | Andrew Cagney <cagney@redhat.com> | 1997-11-26 12:07:27 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-11-26 12:07:27 +0000 |
| commit | 0d5d0d102d7ccd8fc9a1f1729175bb1cad6eb6a9 (patch) | |
| tree | ac06db276b05b71a48aac14011ede22e0de73adf /sim | |
| parent | 35c246c9d7cb115e4f2aeb8ee5531be2459a1993 (diff) | |
| download | gdb-0d5d0d102d7ccd8fc9a1f1729175bb1cad6eb6a9.zip gdb-0d5d0d102d7ccd8fc9a1f1729175bb1cad6eb6a9.tar.gz gdb-0d5d0d102d7ccd8fc9a1f1729175bb1cad6eb6a9.tar.bz2 | |
Fix typo in format argument to sim_io_eprintf.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mips/ChangeLog | 2 | ||||
| -rw-r--r-- | sim/mips/mdmx.igen | 6 |
2 files changed, 5 insertions, 3 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 60f9d52..8f8c7df 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -3,6 +3,8 @@ Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com> * mips.igen (LWC1): Correct assembler - lwc1 not swc1. start-sanitize-vr5400 + * mdmx.igen (value_vr): Correct sim_io_eprintf format argument. + * sim-main.h: Add 8*3*8 bit accumulator. * vr5400.igen: Move mdmx instructins from here diff --git a/sim/mips/mdmx.igen b/sim/mips/mdmx.igen index 2b53c54..e9c2b85 100644 --- a/sim/mips/mdmx.igen +++ b/sim/mips/mdmx.igen @@ -74,7 +74,7 @@ case fmt_unknown: break; default: - sim_io_eprintf(sd, "Vector %d format invalid (PC = 0x08lx)\n", + sim_io_eprintf(sd, "Vector %d format invalid (PC = 0x%08lx)\n", fpr, (long) cia); FPR_STATE[fpr] = fmt_unknown; } @@ -96,7 +96,7 @@ return 0; } -:function:::signed:store_vr:int scale, int fpr, int element, signed value +:function:::void:store_vr:int scale, int fpr, int element, signed value { switch (FPR_STATE[fpr]) { @@ -107,7 +107,7 @@ case fmt_unknown: break; default: - sim_io_eprintf(sd, "Vector %d format invalid (PC = 0x08lx)\n", + sim_io_eprintf(sd, "Vector %d format invalid (PC = 0x%08lx)\n", fpr, (long) cia); FPR_STATE[fpr] = fmt_unknown; } |