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authorChris Demetriou <cgd@google.com>2002-03-01 19:55:42 +0000
committerChris Demetriou <cgd@google.com>2002-03-01 19:55:42 +0000
commit0d3e762b2fe6dd03424a62e6d6399a0cfd99496a (patch)
treee098c508e33d8c2cb2804d17fe3e10576f53ca17 /sim
parent26eb409359779b56ee1573b5a62ee95a55fa2106 (diff)
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2002-03-01 Chris Demetriou <cgd@broadcom.com>
* mips.igen (CACHE): Provide instruction-printing string. * interp.c (signal_exception): Comment tokens after #endif.
Diffstat (limited to 'sim')
-rw-r--r--sim/mips/ChangeLog6
-rw-r--r--sim/mips/interp.c2
-rw-r--r--sim/mips/mips.igen1
3 files changed, 8 insertions, 1 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 554b85b..a1499fe 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,9 @@
+2002-03-01 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (CACHE): Provide instruction-printing string.
+
+ * interp.c (signal_exception): Comment tokens after #endif.
+
2002-02-28 Chris Demetriou <cgd@broadcom.com>
* mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index a032763..95f0ab6 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1805,7 +1805,7 @@ signal_exception (SIM_DESC sd,
#ifdef SUBTARGET_3900
/* Exception vector: BEV=0 BFC00000 / BEF=1 BFC00000 */
PC = (signed)0xBFC00000;
-#endif SUBTARGET_3900
+#endif /* SUBTARGET_3900 */
return;
case TLBModification:
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 3c46579..946a99a 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -4348,6 +4348,7 @@
101111,5.BASE,5.OP,16.OFFSET:NORMAL:32::CACHE
+"cache <OP>, <OFFSET>(r<BASE>)"
*mipsIII:
*mipsIV:
*mipsV: