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author | Jeff Law <jeffreyalaw@gmail.com> | 2022-04-06 11:06:53 -0400 |
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committer | Jeff Law <jeffreyalaw@gmail.com> | 2022-04-06 11:06:53 -0400 |
commit | 49fffa58f7e6da777d10fe77663bc7c8f531fe7f (patch) | |
tree | 9b2efafe99b733a62bffb45b61c965a7a80979cc /sim/v850/simops.c | |
parent | 7fb56b98937a2feef5a3e12d8b00506ff4d132be (diff) | |
download | gdb-49fffa58f7e6da777d10fe77663bc7c8f531fe7f.zip gdb-49fffa58f7e6da777d10fe77663bc7c8f531fe7f.tar.gz gdb-49fffa58f7e6da777d10fe77663bc7c8f531fe7f.tar.bz2 |
Fix "bins" simulation for v850e3v5
I've been carrying this for a few years. One test in the GCC testsuite is
failing due to a bug in the handling of the v850e3v5 instruction "bins".
When the "bins" instruction specifies a 32bit bitfield size, the simulator
exhibits undefined behavior by trying to shift a 32 bit quantity by 32 bits.
In the case of a 32 bit shift, we know what the resultant mask should be. So
we can just set it.
That seemed better than using 1UL for the constant (on a 32bit host unsigned
long might still just be 32 bits) or needlessly forcing everything to
long long types.
Thankfully the case where this shows up is only bins <src>, 0, 32, <dest>
which would normally be encoded as a simple move.
* testsuite/v850/allinsns.exp: Add v850e3v5.
* testsuite/v850/bins.cgs: New test.
* v850/simops.c (v850_bins): Avoid undefined behavior on left shift.
Diffstat (limited to 'sim/v850/simops.c')
-rw-r--r-- | sim/v850/simops.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/sim/v850/simops.c b/sim/v850/simops.c index d264057..e9a5d48 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -3267,7 +3267,14 @@ v850_bins (SIM_DESC sd, unsigned int source, unsigned int lsb, unsigned int msb, pos = lsb; width = (msb - lsb) + 1; - mask = ~ (-(1 << width)); + /* A width of 32 exhibits undefined behavior on the shift. The easiest + way to make this code safe is to just avoid that case and set the mask + to the right value. */ + if (width >= 32) + mask = 0xffffffff; + else + mask = ~ (-(1 << width)); + source &= mask; mask <<= pos; result = (* dest) & ~ mask; |