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authorAndrew Cagney <cagney@redhat.com>1997-09-08 17:23:16 +0000
committerAndrew Cagney <cagney@redhat.com>1997-09-08 17:23:16 +0000
commit70c8abdb4cf6fc5f3e9d7374491997bce1048100 (patch)
treeb62dea0b06aa8dfb3e3f51e5d0b7915c2d422bd7 /sim/tic80
parent75faf9aecb2023ca625dd5cbdd667e134071cf9f (diff)
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Use updated MSMASK, MSMASKED macros.
Fix sat problem in d30v.
Diffstat (limited to 'sim/tic80')
-rw-r--r--sim/tic80/ChangeLog8
-rw-r--r--sim/tic80/cpu.h2
-rw-r--r--sim/tic80/sim-main.h10
3 files changed, 10 insertions, 10 deletions
diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog
index 7f9decb..862a8d9 100644
--- a/sim/tic80/ChangeLog
+++ b/sim/tic80/ChangeLog
@@ -1,3 +1,11 @@
+Mon Sep 8 20:10:43 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * cpu.h (CPU_CIA): Define.
+
+ * sim-main.h (struct sim_state): Delete halt_ok, path_to_halt,
+ restart_ok, path_to_restart members.
+ (struct sim_state): Delete reason, siggnal members.
+
Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
* configure: Regenerated to track ../common/aclocal.m4 changes.
diff --git a/sim/tic80/cpu.h b/sim/tic80/cpu.h
index ca2d327..e710364 100644
--- a/sim/tic80/cpu.h
+++ b/sim/tic80/cpu.h
@@ -151,6 +151,8 @@ struct _sim_cpu {
sim_cpu_base base;
};
+#define CPU_CIA(CPU) ((CPU)->cia)
+
#define GPR(N) ((CPU)->reg[N])
#define GPR_SET(N, VAL) ((CPU)->reg[N] = (VAL))
#define ACC(N) ((CPU)->acc[N])
diff --git a/sim/tic80/sim-main.h b/sim/tic80/sim-main.h
index 87aef80..4387227 100644
--- a/sim/tic80/sim-main.h
+++ b/sim/tic80/sim-main.h
@@ -51,16 +51,6 @@ static const sim_cia null_cia = {0}; /* Dummy */
struct sim_state {
- /* escape route for inner functions */
- int halt_ok;
- jmp_buf path_to_halt;
- int restart_ok;
- jmp_buf path_to_restart;
-
- /* status from last halt */
- enum sim_stop reason;
- int siggnal;
-
/* the processors proper */
sim_cpu cpu;
#define STATE_CPU(sd, n) (&(sd)->cpu)