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| author | Andrew Cagney <cagney@redhat.com> | 1997-05-15 00:14:33 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-05-15 00:14:33 +0000 |
| commit | 2310e3c2b5591bfe2459bf6fb36c4ae147c94982 (patch) | |
| tree | 9de5837abdd7b33f36c4912c34fc6aae9e48dead /sim/tic80 | |
| parent | 93555c3b026cb5cd5a4395b59cdee1ec7944264a (diff) | |
| download | gdb-2310e3c2b5591bfe2459bf6fb36c4ae147c94982.zip gdb-2310e3c2b5591bfe2459bf6fb36c4ae147c94982.tar.gz gdb-2310e3c2b5591bfe2459bf6fb36c4ae147c94982.tar.bz2 | |
Passify gcc's warnings.
Diffstat (limited to 'sim/tic80')
| -rw-r--r-- | sim/tic80/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/tic80/insns | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/sim/tic80/ChangeLog b/sim/tic80/ChangeLog index 9c6908d..ea9bb67 100644 --- a/sim/tic80/ChangeLog +++ b/sim/tic80/ChangeLog @@ -1,3 +1,7 @@ +Thu May 15 10:14:06 1997 Andrew Cagney <cagney@b1.cygnus.com> + + * insns (do_trap): Printf formatting. + Wed May 14 18:05:50 1997 Mike Meissner <meissner@cygnus.com> * misc.c (tic80_trace_fpu{3,2,2i}): Align columns with other diff --git a/sim/tic80/insns b/sim/tic80/insns index 270b5c4..b823b96 100644 --- a/sim/tic80/insns +++ b/sim/tic80/insns @@ -1066,7 +1066,7 @@ void::function::do_trap:unsigned32 trap_number if (!TRACE_ALU_P (CPU)) trace_one_insn (SD, CPU, cia.ip, 1, itable[MY_INDEX].file, itable[MY_INDEX].line_nr, "trap", - "Trap %d", trap_number); + "Trap %ld", (long) trap_number); for (i = 0; i < 32; i++) sim_io_eprintf (SD, "%s0x%.8lx%s", ((i % 8) == 0) ? "\t" : " ", (long)GPR(i), |