aboutsummaryrefslogtreecommitdiff
path: root/sim/tic80/alu.h
diff options
context:
space:
mode:
authorAndrew Cagney <cagney@redhat.com>1997-05-05 13:21:04 +0000
committerAndrew Cagney <cagney@redhat.com>1997-05-05 13:21:04 +0000
commit7a418800c16e72cc1f902ad19e0e81d1a6d66576 (patch)
tree06e7375d21160e5d650d31e99c42f5b6bca2b3e6 /sim/tic80/alu.h
parent3971886ac1616c4125531e42a884f031e27f7e21 (diff)
downloadgdb-7a418800c16e72cc1f902ad19e0e81d1a6d66576.zip
gdb-7a418800c16e72cc1f902ad19e0e81d1a6d66576.tar.gz
gdb-7a418800c16e72cc1f902ad19e0e81d1a6d66576.tar.bz2
Start of implementation of a distributed (between processors)
simulator core object.
Diffstat (limited to 'sim/tic80/alu.h')
-rw-r--r--sim/tic80/alu.h15
1 files changed, 7 insertions, 8 deletions
diff --git a/sim/tic80/alu.h b/sim/tic80/alu.h
index 3a325e1..d8fb136 100644
--- a/sim/tic80/alu.h
+++ b/sim/tic80/alu.h
@@ -39,19 +39,18 @@ with this program; if not, write to the Free Software Foundation, Inc.,
/* Bring data in from the cold */
#define IMEM(EA) \
-(sim_core_read_4(sd, sim_core_execute_map, (EA), \
- STATE_CPU (sd, 0), cia))
+(sim_core_read_aligned_4(STATE_CPU (sd, 0), cia, sim_core_execute_map, (EA)))
#define MEM(SIGN, EA, NR_BYTES) \
-((SIGN##_##NR_BYTES) sim_core_read_##NR_BYTES (SD, sim_core_read_map, \
- (EA) & ~(NR_BYTES - 1), \
- STATE_CPU (sd, 0), cia))
+((SIGN##_##NR_BYTES) sim_core_read_unaligned_##NR_BYTES (STATE_CPU (sd, 0), cia, \
+ sim_core_read_map, \
+ (EA)))
#define STORE(EA, NR_BYTES, VAL) \
do { \
- sim_core_write_##NR_BYTES (SD, sim_core_write_map, \
- (EA) & ~(NR_BYTES - 1), (VAL), \
- STATE_CPU (sd, 0), cia); \
+ sim_core_write_unaligned_##NR_BYTES (STATE_CPU (sd, 0), cia, \
+ sim_core_write_map, \
+ (EA), (VAL)); \
} while (0)