diff options
author | Richard Sandiford <rdsandiford@googlemail.com> | 2004-03-01 09:26:33 +0000 |
---|---|---|
committer | Richard Sandiford <rdsandiford@googlemail.com> | 2004-03-01 09:26:33 +0000 |
commit | 8ae0baa2685df96375cc43b44b5632044288f74a (patch) | |
tree | f66d697cb45e2fb7bb61ddd1e25047cfd75f4e65 /sim/testsuite | |
parent | 3ce2bf1815f79e33ffbcebcf7da5f6896536f390 (diff) | |
download | gdb-8ae0baa2685df96375cc43b44b5632044288f74a.zip gdb-8ae0baa2685df96375cc43b44b5632044288f74a.tar.gz gdb-8ae0baa2685df96375cc43b44b5632044288f74a.tar.bz2 |
cpu/
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
(rstb, rsth, rst, rstd, rstq): Delete.
(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
gas/testsuite/
* gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops.
(rstbf, rsthf, rstf, rstdf, rstqf): Likewise.
* gas/frv/allinsn.d: Update accordingly.
opcodes/
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
sim/frv/
* decode.c, decode.h, model.c, sem.c: Regenerate.
sim/testsuite/
* sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete.
* sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
Diffstat (limited to 'sim/testsuite')
-rw-r--r-- | sim/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rst.cgs | 107 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstb.cgs | 72 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstbf.cgs | 76 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstd.cgs | 171 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstdf.cgs | 186 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstf.cgs | 112 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rsth.cgs | 83 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rsthf.cgs | 87 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstq.cgs | 297 | ||||
-rw-r--r-- | sim/testsuite/sim/frv/rstqf.cgs | 333 |
11 files changed, 5 insertions, 1524 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index 4e7b230..32e71da 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete. + * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete. + 2004-01-26 Chris Demetriou <cgd@broadcom.com> * sim/mips: New directory. Tests for the MIPS simulator. diff --git a/sim/testsuite/sim/frv/rst.cgs b/sim/testsuite/sim/frv/rst.cgs deleted file mode 100644 index c8ba442..0000000 --- a/sim/testsuite/sim/frv/rst.cgs +++ /dev/null @@ -1,107 +0,0 @@ -# frv testcase for rst $GRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global rst -rst: - ; No nesr's active - set_gr_gr sp,gr10 - set_gr_gr sp,gr24 - set_mem_limmed 0x2222,0x2222,gr24 - set_gr_gr gr24,gr27 - inc_gr_immed -4,gr27 - set_mem_limmed 0x3333,0x3333,gr27 - set_gr_gr gr27,gr26 - inc_gr_immed -4,gr26 - set_mem_limmed 0x4444,0x4444,gr26 - set_gr_gr gr26,gr25 - inc_gr_immed -4,gr25 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_gr_immed 0,gr7 - set_gr_limmed 0xffff,0xffff,gr8 - rst gr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0x1111,0x1111,gr20 - - ; 1 nesr active with the incorrect address in neear for gr - nldi @(sp,0),gr20 - test_spr_gr neear0,gr10 - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_gr_limmed 0xffff,0xffff,gr8 - set_gr_immed -4,gr7 - rst gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr24 - test_mem_limmed 0xffff,0xffff,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0x1111,0x1111,gr20 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -4,gr10 - nldfi @(sp,-4),fr20 - test_spr_gr neear1,gr10 - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed -4,sp - set_gr_immed 4,gr7 - rst gr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for gr - inc_gr_immed -4,gr10 - nldi @(sp,-4),gr20 - test_spr_gr neear2,gr10 - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed -4,sp - set_gr_immed 0,gr7 - rst gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0xffff,0xffff,gr20 - - ; 1 nesr active with the correct address in neear for fr - inc_gr_immed -4,gr10 - nldfi @(sp,-4),fr20 - test_spr_gr neear3,gr10 - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_limmed 0xffff,0xffff,gr8 - set_gr_immed -4,gr7 - rst gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0xffff,0xffff,gr25 - test_fr_limmed 0xffff,0xffff,fr20 - - pass diff --git a/sim/testsuite/sim/frv/rstb.cgs b/sim/testsuite/sim/frv/rstb.cgs deleted file mode 100644 index e7bab42..0000000 --- a/sim/testsuite/sim/frv/rstb.cgs +++ /dev/null @@ -1,72 +0,0 @@ -# frv testcase for rstb $GRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr21 - set_gr_gr gr21,gr22 - set_gr_limmed 0x1111,0x1111,gr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_gr_immed 0,gr7 - set_gr_limmed 0xffff,0xffff,gr8 - rstb gr8,@(sp,gr7) - test_mem_limmed 0xff22,0x2222,sp - test_gr_limmed 0x1111,0x1111,gr20 - - ; 1 nesr active with the incorrect address in neear for gr - inc_gr_immed 3,gr22 - nldubi @(sp,3),gr20 - test_spr_gr neear0,gr22 - set_gr_limmed 0x1111,0x1111,gr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed 1,gr7 - rstb gr8,@(sp,gr7) - test_mem_limmed 0x22ff,0x2222,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -1,gr22 - nldbfi @(sp,2),fr20 - test_spr_gr neear1,gr22 - set_fr_iimmed 0x1111,0x1111,fr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed 4,sp - set_gr_immed -1,gr7 - rstb gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x22ff,gr21 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for gr - inc_gr_immed -1,gr22 - nldubi @(sp,-3),gr20 - test_spr_gr neear2,gr22 - set_gr_limmed 0x1111,0x1111,gr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed -4,sp - set_gr_immed 1,gr7 - rstb gr8,@(sp,gr7) - test_mem_limmed 0x22ff,0x2222,gr21 - test_gr_limmed 0x0000,0x00ff,gr20 - - ; 1 nesr active with the correct address in neear for fr - inc_gr_immed -1,gr22 - nldbfi @(sp,0),fr20 - test_spr_gr neear3,gr22 - set_fr_iimmed 0x1111,0x1111,fr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_gr_limmed 0xffff,0xffff,gr8 - set_gr_immed 0,gr7 - rstb gr8,@(sp,gr7) - test_mem_limmed 0xff22,0x2222,gr21 - test_fr_limmed 0x0000,0x00ff,fr20 - - pass diff --git a/sim/testsuite/sim/frv/rstbf.cgs b/sim/testsuite/sim/frv/rstbf.cgs deleted file mode 100644 index e35260a..0000000 --- a/sim/testsuite/sim/frv/rstbf.cgs +++ /dev/null @@ -1,76 +0,0 @@ -# frv testcase for rstbf $FRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr21 - set_gr_gr gr21,gr22 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_limmed 0x1111,0x1111,gr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_gr_immed 0,gr7 - set_fr_iimmed 0xffff,0xffff,fr8 - rstbf fr8,@(sp,gr7) - test_mem_limmed 0xff22,0x2222,sp - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the incorrect address in neear for gr - inc_gr_immed 1,gr22 - nldubi @(sp,1),gr20 - test_spr_gr neear0,gr22 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed 2,gr7 - rstbf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0xff22,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -1,gr22 - nldbfi @(sp,0),fr20 - test_spr_gr neear1,gr22 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed 4,sp - set_gr_immed -1,gr7 - rstbf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x22ff,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for gr - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed -4,sp - set_gr_immed 1,gr7 - rstbf fr8,@(sp,gr7) - test_mem_limmed 0x22ff,0x2222,gr21 - test_gr_limmed 0x0000,0x00ff,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for fr - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_mem_limmed 0x2222,0x2222,gr21 - set_fr_iimmed 0xffff,0xffff,fr8 - set_gr_immed 0,gr7 - rstbf fr8,@(sp,gr7) - test_mem_limmed 0xff22,0x2222,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x0000,0x00ff,fr20 - - pass diff --git a/sim/testsuite/sim/frv/rstd.cgs b/sim/testsuite/sim/frv/rstd.cgs deleted file mode 100644 index bf67635..0000000 --- a/sim/testsuite/sim/frv/rstd.cgs +++ /dev/null @@ -1,171 +0,0 @@ -# frv testcase for rstd $GRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr20 - set_mem_limmed 0x2222,0x2222,gr20 - set_gr_gr gr20,gr27 - inc_gr_immed -4,gr27 - set_mem_limmed 0x3333,0x3333,gr27 - set_gr_gr gr27,gr26 - inc_gr_immed -4,gr26 - set_mem_limmed 0x4444,0x4444,gr26 - set_gr_gr gr26,gr25 - inc_gr_immed -4,gr25 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_gr gr25,gr24 - inc_gr_immed -4,gr24 - set_mem_limmed 0x6666,0x6666,gr24 - set_gr_gr gr24,gr23 - inc_gr_immed -4,gr23 - set_mem_limmed 0x7777,0x7777,gr23 - set_gr_gr gr23,gr22 - inc_gr_immed -4,gr22 - set_mem_limmed 0x8888,0x8888,gr22 - set_gr_gr gr22,gr21 - inc_gr_immed -4,gr21 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - inc_gr_immed -4,sp - set_gr_immed 0,gr7 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - rstd gr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr20 - test_mem_limmed 0xeeee,0xeeee,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - - ; 1 nesr active with the incorrect address in neear for gr - set_gr_gr sp,gr10 - nlddi @(sp,0),gr40 - test_spr_gr neear0,gr10 - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_immed -8,gr7 - rstd gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr20 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0xeeee,0xeeee,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -8,gr10 - nlddfi @(sp,-8),fr40 - test_spr_gr neear1,gr10 - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - inc_gr_immed -8,sp - set_gr_immed 8,gr7 - rstd gr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr20 - test_mem_limmed 0xeeee,0xeeee,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - - ; 1 nesr active with the correct address in neear for gr - inc_gr_immed -8,gr10 - nlddi @(sp,-8),gr40 - test_spr_gr neear2,gr10 - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - inc_gr_immed -8,sp - set_gr_immed 0,gr7 - rstd gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr20 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0xffff,0xffff,gr24 - test_mem_limmed 0xeeee,0xeeee,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0xffff,0xffff,gr41 - test_gr_limmed 0xeeee,0xeeee,gr40 - - ; 1 nesr active with the correct address in neear for fr - inc_gr_immed -8,gr10 - nlddfi @(sp,-8),fr40 - test_spr_gr neear3,gr10 - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_gr_immed -8,gr7 - rstd gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr20 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0xffff,0xffff,gr22 - test_mem_limmed 0xeeee,0xeeee,gr21 - test_fr_limmed 0xffff,0xffff,fr41 - test_fr_limmed 0xeeee,0xeeee,fr40 - - pass diff --git a/sim/testsuite/sim/frv/rstdf.cgs b/sim/testsuite/sim/frv/rstdf.cgs deleted file mode 100644 index 9d0d841..0000000 --- a/sim/testsuite/sim/frv/rstdf.cgs +++ /dev/null @@ -1,186 +0,0 @@ -# frv testcase for rstdf $FRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr20 - set_mem_limmed 0x2222,0x2222,gr20 - set_gr_gr gr20,gr27 - inc_gr_immed -4,gr27 - set_mem_limmed 0x3333,0x3333,gr27 - set_gr_gr gr27,gr26 - inc_gr_immed -4,gr26 - set_mem_limmed 0x4444,0x4444,gr26 - set_gr_gr gr26,gr25 - inc_gr_immed -4,gr25 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_gr gr25,gr24 - inc_gr_immed -4,gr24 - set_mem_limmed 0x6666,0x6666,gr24 - set_gr_gr gr24,gr23 - inc_gr_immed -4,gr23 - set_mem_limmed 0x7777,0x7777,gr23 - set_gr_gr gr23,gr22 - inc_gr_immed -4,gr22 - set_mem_limmed 0x8888,0x8888,gr22 - set_gr_gr gr22,gr21 - inc_gr_immed -4,gr21 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - inc_gr_immed -4,sp - set_gr_immed 0,gr7 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - rstdf fr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr20 - test_mem_limmed 0xeeee,0xeeee,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - - ; 1 nesr active with the incorrect address in neear for gr - set_gr_gr sp,gr10 - inc_gr_immed -16,gr10 - nlddi @(sp,-16),gr40 - test_spr_gr neear0,gr10 - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_gr_immed -8,gr7 - rstdf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr20 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0xeeee,0xeeee,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -8,gr10 - nlddfi @(sp,-24),fr40 - test_spr_gr neear1,gr10 - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - inc_gr_immed -8,sp - set_gr_immed 8,gr7 - rstdf fr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr20 - test_mem_limmed 0xeeee,0xeeee,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - - ; 1 nesr active with the correct address in neear for gr - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - inc_gr_immed -8,sp - set_gr_immed 0,gr7 - rstdf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr20 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0xffff,0xffff,gr24 - test_mem_limmed 0xeeee,0xeeee,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_gr_limmed 0xffff,0xffff,gr41 - test_gr_limmed 0xeeee,0xeeee,gr40 - test_fr_limmed 0x1111,0x1111,fr41 - test_fr_limmed 0x1111,0x1111,fr40 - - ; 1 nesr active with the correct address in neear for fr - set_mem_limmed 0x2222,0x2222,gr20 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_gr_immed -8,gr7 - rstdf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr20 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0xffff,0xffff,gr22 - test_mem_limmed 0xeeee,0xeeee,gr21 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr40 - test_fr_limmed 0xffff,0xffff,fr41 - test_fr_limmed 0xeeee,0xeeee,fr40 - - pass diff --git a/sim/testsuite/sim/frv/rstf.cgs b/sim/testsuite/sim/frv/rstf.cgs deleted file mode 100644 index 17a123a..0000000 --- a/sim/testsuite/sim/frv/rstf.cgs +++ /dev/null @@ -1,112 +0,0 @@ -# frv testcase for rstf $FRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr10 - set_gr_gr sp,gr24 - set_mem_limmed 0x2222,0x2222,gr24 - set_gr_gr gr24,gr27 - inc_gr_immed -4,gr27 - set_mem_limmed 0x3333,0x3333,gr27 - set_gr_gr gr27,gr26 - inc_gr_immed -4,gr26 - set_mem_limmed 0x4444,0x4444,gr26 - set_gr_gr gr26,gr25 - inc_gr_immed -4,gr25 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_immed 0,gr7 - set_fr_iimmed 0xffff,0xffff,fr8 - rstf fr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the incorrect address in neear for gr - inc_gr_immed -8,gr10 - nldi @(sp,-8),gr20 - test_spr_gr neear0,gr10 - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - set_gr_immed -4,gr7 - rstf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr24 - test_mem_limmed 0xffff,0xffff,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -4,gr10 - nldfi @(sp,-12),fr20 - test_spr_gr neear1,gr10 - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed -4,sp - set_gr_immed 4,gr7 - rstf fr8,@(sp,gr7) - test_mem_limmed 0xffff,0xffff,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for gr - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed -4,sp - set_gr_immed 0,gr7 - rstf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_gr_limmed 0xffff,0xffff,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for fr - set_mem_limmed 0x2222,0x2222,gr24 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - set_gr_immed -4,gr7 - rstf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr24 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0xffff,0xffff,gr25 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0xffff,0xffff,fr20 - - pass diff --git a/sim/testsuite/sim/frv/rsth.cgs b/sim/testsuite/sim/frv/rsth.cgs deleted file mode 100644 index a2b283e..0000000 --- a/sim/testsuite/sim/frv/rsth.cgs +++ /dev/null @@ -1,83 +0,0 @@ -# frv testcase for rsth $GRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr22 - set_mem_limmed 0x2222,0x2222,gr22 - set_gr_gr gr22,gr21 - inc_gr_immed -4,gr21 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_gr gr22,gr23 - set_gr_limmed 0x1111,0x1111,gr20 - set_gr_immed 0,gr7 - set_gr_limmed 0xffff,0xffff,gr8 - rsth gr8,@(sp,gr7) - test_mem_limmed 0xffff,0x2222,gr22 - test_mem_limmed 0x3333,0x3333,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - - ; 1 nesr active with the incorrect address in neear for gr - nlduhi @(sp,0),gr20 - test_spr_gr neear0,gr23 - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_limmed 0x1111,0x1111,gr20 - set_gr_limmed 0xffff,0xffff,gr8 - set_gr_immed 2,gr7 - rsth gr8,@(sp,gr7) - test_mem_limmed 0x2222,0xffff,gr22 - test_mem_limmed 0x3333,0x3333,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed 2,gr23 - nldhfi @(sp,2),fr20 - test_spr_gr neear1,gr23 - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed 4,sp - set_gr_immed -4,gr7 - rsth gr8,@(sp,gr7) - test_mem_limmed 0xffff,0x2222,gr22 - test_mem_limmed 0x3333,0x3333,gr21 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for gr - inc_gr_immed -4,gr23 - nlduhi @(sp,-6),gr20 - test_spr_gr neear2,gr23 - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_limmed 0x1111,0x1111,gr20 - set_gr_limmed 0xffff,0xffff,gr8 - inc_gr_immed -4,sp - set_gr_immed -2,gr7 - rsth gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr22 - test_mem_limmed 0x3333,0xffff,gr21 - test_gr_limmed 0x0000,0xffff,gr20 - - ; 1 nesr active with the correct address in neear for fr - inc_gr_immed -2,gr23 - nldhfi @(sp,-4),fr20 - test_spr_gr neear3,gr23 - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_limmed 0xffff,0xffff,gr8 - set_gr_immed -4,gr7 - rsth gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr22 - test_mem_limmed 0xffff,0x3333,gr21 - test_fr_limmed 0x0000,0xffff,fr20 - - pass diff --git a/sim/testsuite/sim/frv/rsthf.cgs b/sim/testsuite/sim/frv/rsthf.cgs deleted file mode 100644 index 06adb97..0000000 --- a/sim/testsuite/sim/frv/rsthf.cgs +++ /dev/null @@ -1,87 +0,0 @@ -# frv testcase for rsthf $FRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr22 - set_mem_limmed 0x2222,0x2222,gr22 - set_gr_gr gr22,gr21 - inc_gr_immed -4,gr21 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_gr gr22,gr23 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_gr_immed 0,gr7 - set_fr_iimmed 0xffff,0xffff,fr8 - rsthf fr8,@(sp,gr7) - test_mem_limmed 0xffff,0x2222,gr22 - test_mem_limmed 0x3333,0x3333,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the incorrect address in neear for gr - inc_gr_immed -2,gr23 - nlduhi @(sp,-2),gr20 - test_spr_gr neear0,gr23 - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0xffff,0xffff,fr8 - set_gr_immed 2,gr7 - rsthf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0xffff,gr22 - test_mem_limmed 0x3333,0x3333,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -2,gr23 - nldhfi @(sp,-4),fr20 - test_spr_gr neear1,gr23 - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed 4,sp - set_gr_immed -4,gr7 - rsthf fr8,@(sp,gr7) - test_mem_limmed 0xffff,0x2222,gr22 - test_mem_limmed 0x3333,0x3333,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for gr - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - inc_gr_immed -4,sp - set_gr_immed -2,gr7 - rsthf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr22 - test_mem_limmed 0x3333,0xffff,gr21 - test_gr_limmed 0x0000,0xffff,gr20 - test_fr_limmed 0x1111,0x1111,fr20 - - ; 1 nesr active with the correct address in neear for fr - set_mem_limmed 0x2222,0x2222,gr22 - set_mem_limmed 0x3333,0x3333,gr21 - set_gr_limmed 0x1111,0x1111,gr20 - set_fr_iimmed 0x1111,0x1111,fr20 - set_fr_iimmed 0xffff,0xffff,fr8 - set_gr_immed -4,gr7 - rsthf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr22 - test_mem_limmed 0xffff,0x3333,gr21 - test_gr_limmed 0x1111,0x1111,gr20 - test_fr_limmed 0x0000,0xffff,fr20 - - pass diff --git a/sim/testsuite/sim/frv/rstq.cgs b/sim/testsuite/sim/frv/rstq.cgs deleted file mode 100644 index 190c954..0000000 --- a/sim/testsuite/sim/frv/rstq.cgs +++ /dev/null @@ -1,297 +0,0 @@ -# frv testcase for rstq $GRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr6 - set_mem_limmed 0x2222,0x2222,gr6 - set_gr_gr gr6,gr27 - inc_gr_immed -4,gr27 - set_mem_limmed 0x3333,0x3333,gr27 - set_gr_gr gr27,gr26 - inc_gr_immed -4,gr26 - set_mem_limmed 0x4444,0x4444,gr26 - set_gr_gr gr26,gr25 - inc_gr_immed -4,gr25 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_gr gr25,gr24 - inc_gr_immed -4,gr24 - set_mem_limmed 0x6666,0x6666,gr24 - set_gr_gr gr24,gr23 - inc_gr_immed -4,gr23 - set_mem_limmed 0x7777,0x7777,gr23 - set_gr_gr gr23,gr22 - inc_gr_immed -4,gr22 - set_mem_limmed 0x8888,0x8888,gr22 - set_gr_gr gr22,gr21 - inc_gr_immed -4,gr21 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_gr gr21,gr20 - inc_gr_immed -4,gr20 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_gr_gr gr20,gr19 - inc_gr_immed -4,gr19 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_gr_gr gr19,gr18 - inc_gr_immed -4,gr18 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_gr_gr gr18,gr17 - inc_gr_immed -4,gr17 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_gr_gr gr17,gr16 - inc_gr_immed -4,gr16 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_gr_gr gr16,gr15 - inc_gr_immed -4,gr15 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_gr_gr gr15,gr14 - inc_gr_immed -4,gr14 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_gr_gr gr14,gr13 - inc_gr_immed -4,gr13 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - inc_gr_immed -12,sp - set_gr_immed 0,gr7 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0xcccc,0xcccc,gr10 - set_gr_limmed 0xdddd,0xdddd,gr11 - rstq gr8,@(sp,gr7) - test_mem_limmed 0xdddd,0xdddd,gr6 - test_mem_limmed 0xcccc,0xcccc,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0xeeee,0xeeee,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr42 - test_gr_limmed 0x1111,0x1111,gr43 - - ; 1 nesr active with the incorrect address in neear for gr - set_gr_gr sp,gr12 - nldq @(sp,gr0),gr40 - test_spr_gr neear0,gr12 - set_mem_limmed 0x2222,0x2222,gr6 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0xcccc,0xcccc,gr10 - set_gr_limmed 0xdddd,0xdddd,gr11 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - set_gr_immed -16,gr7 - rstq gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr6 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0xdddd,0xdddd,gr24 - test_mem_limmed 0xcccc,0xcccc,gr23 - test_mem_limmed 0xffff,0xffff,gr22 - test_mem_limmed 0xeeee,0xeeee,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr42 - test_gr_limmed 0x1111,0x1111,gr43 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -16,gr12 - nlddfi @(sp,-16),fr40 - test_spr_gr neear1,gr12 - set_mem_limmed 0x2222,0x2222,gr6 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0xcccc,0xcccc,gr10 - set_gr_limmed 0xdddd,0xdddd,gr11 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - inc_gr_immed -16,sp - set_gr_immed 16,gr7 - rstq gr8,@(sp,gr7) - test_mem_limmed 0xdddd,0xdddd,gr6 - test_mem_limmed 0xcccc,0xcccc,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0xeeee,0xeeee,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - test_fr_limmed 0x1111,0x1111,fr42 - test_fr_limmed 0x1111,0x1111,fr43 - - ; 1 nesr active with the correct address in neear for gr - inc_gr_immed -16,gr12 - nlddi @(sp,-16),gr40 - test_spr_gr neear2,gr12 - set_mem_limmed 0x2222,0x2222,gr6 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0xcccc,0xcccc,gr10 - set_gr_limmed 0xdddd,0xdddd,gr11 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - inc_gr_immed -16,sp - set_gr_immed 0,gr7 - rstq gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr6 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xdddd,0xdddd,gr20 - test_mem_limmed 0xcccc,0xcccc,gr19 - test_mem_limmed 0xffff,0xffff,gr18 - test_mem_limmed 0xeeee,0xeeee,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0xeeee,0xeeee,gr40 - test_gr_limmed 0xffff,0xffff,gr41 - test_gr_limmed 0xcccc,0xcccc,gr42 - test_gr_limmed 0xdddd,0xdddd,gr43 - - ; 1 nesr active with the correct address in neear for fr - inc_gr_immed -16,gr12 - nlddfi @(sp,-16),fr40 - test_spr_gr neear3,gr12 - set_mem_limmed 0x2222,0x2222,gr6 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_gr_limmed 0xeeee,0xeeee,gr8 - set_gr_limmed 0xffff,0xffff,gr9 - set_gr_limmed 0xcccc,0xcccc,gr10 - set_gr_limmed 0xdddd,0xdddd,gr11 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - set_gr_immed -16,gr7 - rstq gr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr6 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xdddd,0xdddd,gr16 - test_mem_limmed 0xcccc,0xcccc,gr15 - test_mem_limmed 0xffff,0xffff,gr14 - test_mem_limmed 0xeeee,0xeeee,gr13 - test_fr_limmed 0xeeee,0xeeee,fr40 - test_fr_limmed 0xffff,0xffff,fr41 - test_fr_limmed 0xcccc,0xcccc,fr42 - test_fr_limmed 0xdddd,0xdddd,fr43 - - pass diff --git a/sim/testsuite/sim/frv/rstqf.cgs b/sim/testsuite/sim/frv/rstqf.cgs deleted file mode 100644 index 72fd04a..0000000 --- a/sim/testsuite/sim/frv/rstqf.cgs +++ /dev/null @@ -1,333 +0,0 @@ -# frv testcase for rstqf $FRk,@($GRi,$GRj) -# mach: frv -# as(frv): -mcpu=frv - - .include "testutils.inc" - - start - - .global add -add: - ; No nesr's active - set_gr_gr sp,gr12 - set_mem_limmed 0x2222,0x2222,gr12 - set_gr_gr gr12,gr27 - inc_gr_immed -4,gr27 - set_mem_limmed 0x3333,0x3333,gr27 - set_gr_gr gr27,gr26 - inc_gr_immed -4,gr26 - set_mem_limmed 0x4444,0x4444,gr26 - set_gr_gr gr26,gr25 - inc_gr_immed -4,gr25 - set_mem_limmed 0x5555,0x5555,gr25 - set_gr_gr gr25,gr24 - inc_gr_immed -4,gr24 - set_mem_limmed 0x6666,0x6666,gr24 - set_gr_gr gr24,gr23 - inc_gr_immed -4,gr23 - set_mem_limmed 0x7777,0x7777,gr23 - set_gr_gr gr23,gr22 - inc_gr_immed -4,gr22 - set_mem_limmed 0x8888,0x8888,gr22 - set_gr_gr gr22,gr21 - inc_gr_immed -4,gr21 - set_mem_limmed 0x9999,0x9999,gr21 - set_gr_gr gr21,gr20 - inc_gr_immed -4,gr20 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_gr_gr gr20,gr19 - inc_gr_immed -4,gr19 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_gr_gr gr19,gr18 - inc_gr_immed -4,gr18 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_gr_gr gr18,gr17 - inc_gr_immed -4,gr17 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_gr_gr gr17,gr16 - inc_gr_immed -4,gr16 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_gr_gr gr16,gr15 - inc_gr_immed -4,gr15 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_gr_gr gr15,gr14 - inc_gr_immed -4,gr14 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_gr_gr gr14,gr13 - inc_gr_immed -4,gr13 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - inc_gr_immed -12,sp - set_gr_immed 0,gr7 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_fr_iimmed 0xcccc,0xcccc,fr10 - set_fr_iimmed 0xdddd,0xdddd,fr11 - rstqf fr8,@(sp,gr7) - test_mem_limmed 0xdddd,0xdddd,gr12 - test_mem_limmed 0xcccc,0xcccc,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0xeeee,0xeeee,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr42 - test_gr_limmed 0x1111,0x1111,gr43 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - test_fr_limmed 0x1111,0x1111,fr42 - test_fr_limmed 0x1111,0x1111,fr43 - - ; 1 nesr active with the incorrect address in neear for gr - set_gr_gr sp,gr10 - inc_gr_immed -32,gr10 - set_gr_immed -32,gr9 - nldq @(sp,gr9),gr40 - test_spr_gr neear0,gr10 - set_mem_limmed 0x2222,0x2222,gr12 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_fr_iimmed 0xcccc,0xcccc,fr10 - set_fr_iimmed 0xdddd,0xdddd,fr11 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - set_gr_immed -16,gr7 - rstqf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr12 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0xdddd,0xdddd,gr24 - test_mem_limmed 0xcccc,0xcccc,gr23 - test_mem_limmed 0xffff,0xffff,gr22 - test_mem_limmed 0xeeee,0xeeee,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr42 - test_gr_limmed 0x1111,0x1111,gr43 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - test_fr_limmed 0x1111,0x1111,fr42 - test_fr_limmed 0x1111,0x1111,fr43 - - ; 1 nesr active with the incorrect address in neear for fr - inc_gr_immed -16,gr10 - nlddfi @(sp,-48),fr40 - test_spr_gr neear1,gr10 - set_mem_limmed 0x2222,0x2222,gr12 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_fr_iimmed 0xcccc,0xcccc,fr10 - set_fr_iimmed 0xdddd,0xdddd,fr11 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - inc_gr_immed -16,sp - set_gr_immed 16,gr7 - rstqf fr8,@(sp,gr7) - test_mem_limmed 0xdddd,0xdddd,gr12 - test_mem_limmed 0xcccc,0xcccc,gr27 - test_mem_limmed 0xffff,0xffff,gr26 - test_mem_limmed 0xeeee,0xeeee,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr42 - test_gr_limmed 0x1111,0x1111,gr43 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - test_fr_limmed 0x1111,0x1111,fr42 - test_fr_limmed 0x1111,0x1111,fr43 - - ; 1 nesr active with the correct address in neear for gr - set_mem_limmed 0x2222,0x2222,gr12 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_fr_iimmed 0xcccc,0xcccc,fr10 - set_fr_iimmed 0xdddd,0xdddd,fr11 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - inc_gr_immed -16,sp - set_gr_immed 0,gr7 - rstqf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr12 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xdddd,0xdddd,gr20 - test_mem_limmed 0xcccc,0xcccc,gr19 - test_mem_limmed 0xffff,0xffff,gr18 - test_mem_limmed 0xeeee,0xeeee,gr17 - test_mem_limmed 0xeeee,0xeeee,gr16 - test_mem_limmed 0xf0f0,0xf0f0,gr15 - test_mem_limmed 0xf1f1,0xf1f1,gr14 - test_mem_limmed 0xf2f2,0xf2f2,gr13 - test_gr_limmed 0xeeee,0xeeee,gr40 - test_gr_limmed 0xffff,0xffff,gr41 - test_gr_limmed 0xcccc,0xcccc,gr42 - test_gr_limmed 0xdddd,0xdddd,gr43 - test_fr_limmed 0x1111,0x1111,fr40 - test_fr_limmed 0x1111,0x1111,fr41 - test_fr_limmed 0x1111,0x1111,fr42 - test_fr_limmed 0x1111,0x1111,fr43 - - ; 1 nesr active with the correct address in neear for fr - set_mem_limmed 0x2222,0x2222,gr12 - set_mem_limmed 0x3333,0x3333,gr27 - set_mem_limmed 0x4444,0x4444,gr26 - set_mem_limmed 0x5555,0x5555,gr25 - set_mem_limmed 0x6666,0x6666,gr24 - set_mem_limmed 0x7777,0x7777,gr23 - set_mem_limmed 0x8888,0x8888,gr22 - set_mem_limmed 0x9999,0x9999,gr21 - set_mem_limmed 0xaaaa,0xaaaa,gr20 - set_mem_limmed 0xbbbb,0xbbbb,gr19 - set_mem_limmed 0xcccc,0xcccc,gr18 - set_mem_limmed 0xdddd,0xdddd,gr17 - set_mem_limmed 0xeeee,0xeeee,gr16 - set_mem_limmed 0xf0f0,0xf0f0,gr15 - set_mem_limmed 0xf1f1,0xf1f1,gr14 - set_mem_limmed 0xf2f2,0xf2f2,gr13 - set_fr_iimmed 0xeeee,0xeeee,fr8 - set_fr_iimmed 0xffff,0xffff,fr9 - set_fr_iimmed 0xcccc,0xcccc,fr10 - set_fr_iimmed 0xdddd,0xdddd,fr11 - set_gr_limmed 0x1111,0x1111,gr40 - set_gr_limmed 0x1111,0x1111,gr41 - set_gr_limmed 0x1111,0x1111,gr42 - set_gr_limmed 0x1111,0x1111,gr43 - set_fr_iimmed 0x1111,0x1111,fr40 - set_fr_iimmed 0x1111,0x1111,fr41 - set_fr_iimmed 0x1111,0x1111,fr42 - set_fr_iimmed 0x1111,0x1111,fr43 - set_gr_immed -16,gr7 - rstqf fr8,@(sp,gr7) - test_mem_limmed 0x2222,0x2222,gr12 - test_mem_limmed 0x3333,0x3333,gr27 - test_mem_limmed 0x4444,0x4444,gr26 - test_mem_limmed 0x5555,0x5555,gr25 - test_mem_limmed 0x6666,0x6666,gr24 - test_mem_limmed 0x7777,0x7777,gr23 - test_mem_limmed 0x8888,0x8888,gr22 - test_mem_limmed 0x9999,0x9999,gr21 - test_mem_limmed 0xaaaa,0xaaaa,gr20 - test_mem_limmed 0xbbbb,0xbbbb,gr19 - test_mem_limmed 0xcccc,0xcccc,gr18 - test_mem_limmed 0xdddd,0xdddd,gr17 - test_mem_limmed 0xdddd,0xdddd,gr16 - test_mem_limmed 0xcccc,0xcccc,gr15 - test_mem_limmed 0xffff,0xffff,gr14 - test_mem_limmed 0xeeee,0xeeee,gr13 - test_gr_limmed 0x1111,0x1111,gr40 - test_gr_limmed 0x1111,0x1111,gr41 - test_gr_limmed 0x1111,0x1111,gr42 - test_gr_limmed 0x1111,0x1111,gr43 - test_fr_limmed 0xeeee,0xeeee,fr40 - test_fr_limmed 0xffff,0xffff,fr41 - test_fr_limmed 0xcccc,0xcccc,fr42 - test_fr_limmed 0xdddd,0xdddd,fr43 - - pass |