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authorJason Molenda <jmolenda@apple.com>1999-09-13 21:40:00 +0000
committerJason Molenda <jmolenda@apple.com>1999-09-13 21:40:00 +0000
commitcff3e48be70e018476521d0f62705c29f4112771 (patch)
tree09899684e1ac06491418cb186525498ba0a60544 /sim/testsuite/d10v-elf
parent59f2c4e703f7c5f894322210c24e0ffc4c1c56eb (diff)
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import gdb-1999-09-13 snapshot
Diffstat (limited to 'sim/testsuite/d10v-elf')
-rw-r--r--sim/testsuite/d10v-elf/ChangeLog7
-rw-r--r--sim/testsuite/d10v-elf/Makefile.in4
-rw-r--r--sim/testsuite/d10v-elf/t-ld-st.s32
-rw-r--r--sim/testsuite/d10v-elf/t-sac.s23
-rw-r--r--sim/testsuite/d10v-elf/t-sachi.s22
-rw-r--r--sim/testsuite/d10v-elf/t-slae.s39
6 files changed, 127 insertions, 0 deletions
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog
index b3b7f8c..723f88a 100644
--- a/sim/testsuite/d10v-elf/ChangeLog
+++ b/sim/testsuite/d10v-elf/ChangeLog
@@ -1,3 +1,10 @@
+Wed Sep 8 19:34:55 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
+
+ * t-ld-st.s: New file.
+ * t-sac.s: New file.
+ * t-sachi.s: New file.
+ * t-slae.s: New file.
+
1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com)
* t-sadd.s: New file.
diff --git a/sim/testsuite/d10v-elf/Makefile.in b/sim/testsuite/d10v-elf/Makefile.in
index 09d59ac..b170f37 100644
--- a/sim/testsuite/d10v-elf/Makefile.in
+++ b/sim/testsuite/d10v-elf/Makefile.in
@@ -41,6 +41,7 @@ TESTS = \
exit47.ko \
hello.hi \
t-dbt.ok \
+ t-ld-st.ok \
t-mac.ok \
t-mvtac.ok \
t-mvtc.ok \
@@ -51,7 +52,10 @@ TESTS = \
t-rdt.ok \
t-rep.ok \
t-rte.ok \
+ t-sac.ok \
+ t-sachi.ok \
t-sadd.ok \
+ t-slae.ok \
t-sp.ok \
t-sub2w.ok \
t-sub.ok \
diff --git a/sim/testsuite/d10v-elf/t-ld-st.s b/sim/testsuite/d10v-elf/t-ld-st.s
new file mode 100644
index 0000000..ec9f202
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-ld-st.s
@@ -0,0 +1,32 @@
+.include "t-macros.i"
+
+ start
+
+ ; Test ld and st
+ ld r4, @foo
+ check 1 r4 0xdead
+
+ ldi r4, #0x2152
+ st r4, @foo
+ ld r4, @foo
+ check 2 r4 0x2152
+
+ ; Test ld2w and st2w
+ ldi r4, #0xdead
+ st r4, @foo
+ ld2w r4, @foo
+ check2w2 3 r4 0xdead 0xf000
+
+ ldi r4, #0x2112
+ ldi r5, #0x1984
+ st2w r4, @foo
+ ld2w r4, @foo
+ check2w2 4 r4 0x2112 0x1984
+
+ .data
+ .align 2
+foo: .short 0xdead
+bar: .short 0xf000
+ .text
+
+ exit0
diff --git a/sim/testsuite/d10v-elf/t-sac.s b/sim/testsuite/d10v-elf/t-sac.s
new file mode 100644
index 0000000..7042be0
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-sac.s
@@ -0,0 +1,23 @@
+.include "t-macros.i"
+
+ start
+
+test_sac_1:
+ loadacc2 a0 0x00 0xAFFF 0x0000
+ sac r4, a0
+ check 1 r4 0x7FFF
+ check 2 r5 0xFFFF
+
+test_sac_2:
+ loadacc2 a0 0xFF 0x7000 0x0000
+ sac r4, a0
+ check 3 r4 0x8000
+ check 4 r5 0x0000
+
+test_sac_3:
+ loadacc2 a0 0x00 0x1000 0xA000
+ sac r4, a0
+ check 5 r4 0x1000
+ check 6 r5 0xA000
+
+ exit0
diff --git a/sim/testsuite/d10v-elf/t-sachi.s b/sim/testsuite/d10v-elf/t-sachi.s
new file mode 100644
index 0000000..7774ee0
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-sachi.s
@@ -0,0 +1,22 @@
+.include "t-macros.i"
+
+ start
+
+test_sachi_1:
+ loadacc2 a0 0x00 0xAFFF 0x0000
+ sachi r4, a0
+ check 1 r4 0x7FFF
+
+
+test_sachi_2:
+ loadacc2 a0 0xFF 0x8000 0x1000
+ sachi r4, a0
+ check 2 r4 0x8000
+
+
+test_sachi_3:
+ loadacc2 a0 0x00 0x1000 0xA000
+ sachi r4, a0
+ check 3 r4 0x1000
+
+ exit0
diff --git a/sim/testsuite/d10v-elf/t-slae.s b/sim/testsuite/d10v-elf/t-slae.s
new file mode 100644
index 0000000..6d8422d
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-slae.s
@@ -0,0 +1,39 @@
+.include "t-macros.i"
+
+ start
+
+test_slae_1:
+ loadpsw2 PSW_ST|PSW_FX
+ loadacc2 a0 0x00 0x0AFF 0xF000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 1 a0 0x00 0x7FFF 0xFFFF
+
+test_slae_2:
+ loadpsw2 PSW_ST|PSW_FX
+ loadacc2 a0 0xFF 0xF700 0x1000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 2 a0 0xFF 0x8000 0x0000
+
+test_slae_3:
+ loadpsw2 PSW_ST|PSW_FX
+ loadacc2 a0 0x00 0x0010 0xA000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 3 a0 0x00 0x010A 0x0000
+
+test_slae_4:
+ loadpsw2 0
+ loadacc2 a0 0x00 0x0010 0xA000
+ ldi r0, 4
+ slae a0, r0
+ checkacc2 4 a0 0x00 0x010A 0x0000
+
+test_slae_5:
+ loadacc2 a0 0x00 0x0010 0xA000
+ ldi r0, -4
+ slae a0, r0
+ checkacc2 4 a0 0x00 0x0001 0x0A00
+
+ exit0