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author | Mike Frysinger <vapier@gentoo.org> | 2023-12-21 01:39:01 -0500 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2023-12-21 01:46:04 -0500 |
commit | f184f3a224405473d605ba1d7a455b011e8f2b9e (patch) | |
tree | 78f5013890413a3706143a2bfce43bd121ff61da /sim/sh | |
parent | 4675df34be599589b4a7229b3f87b27f31d7ee2e (diff) | |
download | gdb-f184f3a224405473d605ba1d7a455b011e8f2b9e.zip gdb-f184f3a224405473d605ba1d7a455b011e8f2b9e.tar.gz gdb-f184f3a224405473d605ba1d7a455b011e8f2b9e.tar.bz2 |
sim: sh: add missing breaks to bit processing
Doesn't seem like we want to cascade in this section when bit processing.
Diffstat (limited to 'sim/sh')
-rw-r--r-- | sim/sh/gencode.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c index 2522ec1..1835cf9 100644 --- a/sim/sh/gencode.c +++ b/sim/sh/gencode.c @@ -3359,16 +3359,22 @@ ppi_gensim (void) printf (" {\n"); printf (" case 0: /* Carry Mode */\n"); printf (" DSR |= carry;\n"); + printf (" break;\n"); printf (" case 1: /* Negative Value Mode */\n"); printf (" DSR |= res_grd >> 7 & 1;\n"); + printf (" break;\n"); printf (" case 2: /* Zero Value Mode */\n"); printf (" DSR |= DSR >> 6 & 1;\n"); + printf (" break;\n"); printf (" case 3: /* Overflow mode */\n"); printf (" DSR |= overflow >> 4;\n"); + printf (" break;\n"); printf (" case 4: /* Signed Greater Than Mode */\n"); printf (" DSR |= DSR >> 7 & 1;\n"); + printf (" break;\n"); printf (" case 5: /* Signed Greater Than Or Equal Mode */\n"); printf (" DSR |= greater_equal >> 7;\n"); + printf (" break;\n"); printf (" }\n"); printf (" assign_z:\n"); printf (" if (0xa05f >> z & 1)\n"); |