This commit was manufactured by cvs2svn to create branchsid-20020905-branchpoint sid-20020905-branch

'sid-20020905-branch'. Sprout from gdb_5_3-branch 2002-09-03 22:29:15 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'gdb_5_3-branch'.' Cherrypick from master 2002-09-07 00:00:04 UTC Alan Modra <amodra@gmail.com> 'daily update': bfd/ChangeLog bfd/config.bfd bfd/version.h include/ChangeLog include/dis-asm.h libiberty/ChangeLog libiberty/regex.c opcodes/ChangeLog opcodes/disassemble.c opcodes/ppc-dis.c opcodes/ppc-opc.c Delete: djunpack.bat gdb/CONTRIBUTE gdb/COPYING gdb/ChangeLog gdb/ChangeLog-1990 gdb/ChangeLog-1991 gdb/ChangeLog-1992 gdb/ChangeLog-1993 gdb/ChangeLog-1994 gdb/ChangeLog-1995 gdb/ChangeLog-1996 gdb/ChangeLog-1997 gdb/ChangeLog-1998 gdb/ChangeLog-1999 gdb/ChangeLog-2000 gdb/ChangeLog-2001 gdb/ChangeLog-3.x gdb/MAINTAINERS gdb/Makefile.in gdb/NEWS gdb/PROBLEMS gdb/README gdb/TODO gdb/a68v-nat.c gdb/abug-rom.c gdb/acconfig.h gdb/acinclude.m4 gdb/aclocal.m4 gdb/ada-exp.y gdb/ada-lang.c gdb/ada-lang.h gdb/ada-lex.l gdb/ada-tasks.c gdb/ada-typeprint.c gdb/ada-valprint.c gdb/aix-thread.c gdb/alpha-linux-tdep.c gdb/alpha-nat.c gdb/alpha-osf1-tdep.c gdb/alpha-tdep.c gdb/alpha-tdep.h gdb/alphabsd-nat.c gdb/alphabsd-tdep.c gdb/alphabsd-tdep.h gdb/alphafbsd-tdep.c gdb/alphanbsd-tdep.c gdb/annotate.c gdb/annotate.h gdb/arc-tdep.c gdb/arch-utils.c gdb/arch-utils.h gdb/arm-linux-nat.c gdb/arm-linux-tdep.c gdb/arm-tdep.c gdb/arm-tdep.h gdb/armnbsd-nat.c gdb/armnbsd-tdep.c gdb/avr-tdep.c gdb/ax-gdb.c gdb/ax-gdb.h gdb/ax-general.c gdb/ax.h gdb/bcache.c gdb/bcache.h gdb/blockframe.c gdb/breakpoint.c gdb/breakpoint.h gdb/buildsym.c gdb/buildsym.h gdb/builtin-regs.c gdb/builtin-regs.h gdb/c-exp.y gdb/c-lang.c gdb/c-lang.h gdb/c-typeprint.c gdb/c-valprint.c gdb/call-cmds.h gdb/ch-exp.c gdb/ch-lang.c gdb/ch-lang.h gdb/ch-typeprint.c gdb/ch-valprint.c gdb/cli-out.c gdb/cli-out.h gdb/cli/cli-cmds.c gdb/cli/cli-cmds.h gdb/cli/cli-decode.c gdb/cli/cli-decode.h gdb/cli/cli-dump.c gdb/cli/cli-dump.h gdb/cli/cli-script.c gdb/cli/cli-script.h gdb/cli/cli-setshow.c gdb/cli/cli-setshow.h gdb/cli/cli-utils.c gdb/cli/cli-utils.h gdb/coff-solib.c gdb/coff-solib.h gdb/coffread.c gdb/command.h gdb/complaints.c gdb/complaints.h gdb/completer.c gdb/completer.h gdb/config.in gdb/config/alpha/alpha-linux.mh gdb/config/alpha/alpha-linux.mt gdb/config/alpha/alpha-osf1.mh gdb/config/alpha/alpha-osf1.mt gdb/config/alpha/alpha-osf2.mh gdb/config/alpha/alpha-osf3.mh gdb/config/alpha/alpha.mt gdb/config/alpha/fbsd.mh gdb/config/alpha/fbsd.mt gdb/config/alpha/nbsd.mh gdb/config/alpha/nbsd.mt gdb/config/alpha/nm-fbsd.h gdb/config/alpha/nm-linux.h gdb/config/alpha/nm-nbsd.h gdb/config/alpha/nm-osf.h gdb/config/alpha/nm-osf2.h gdb/config/alpha/nm-osf3.h gdb/config/alpha/tm-alpha.h gdb/config/alpha/tm-alphalinux.h gdb/config/alpha/tm-fbsd.h gdb/config/alpha/tm-nbsd.h gdb/config/alpha/xm-alphalinux.h gdb/config/alpha/xm-alphaosf.h gdb/config/arc/arc.mt gdb/config/arc/tm-arc.h gdb/config/arm/embed.mt gdb/config/arm/linux.mh gdb/config/arm/linux.mt gdb/config/arm/nbsd.mt gdb/config/arm/nbsdaout.mh gdb/config/arm/nbsdelf.mh gdb/config/arm/nm-linux.h gdb/config/arm/nm-nbsd.h gdb/config/arm/nm-nbsdaout.h gdb/config/arm/tm-arm.h gdb/config/arm/tm-embed.h gdb/config/arm/tm-linux.h gdb/config/arm/tm-wince.h gdb/config/arm/wince.mt gdb/config/arm/xm-linux.h gdb/config/arm/xm-nbsd.h gdb/config/avr/avr.mt gdb/config/cris/cris.mt gdb/config/cris/tm-cris.h gdb/config/d10v/d10v.mt gdb/config/d30v/d30v.mt gdb/config/d30v/tm-d30v.h gdb/config/djgpp/README gdb/config/djgpp/config.sed gdb/config/djgpp/djcheck.sh gdb/config/djgpp/djconfig.sh gdb/config/djgpp/fnchange.lst gdb/config/fr30/fr30.mt gdb/config/fr30/tm-fr30.h gdb/config/frv/frv.mt gdb/config/frv/tm-frv.h gdb/config/h8300/h8300.mt gdb/config/h8300/tm-h8300.h gdb/config/h8500/h8500.mt gdb/config/h8500/tm-h8500.h gdb/config/i386/cygwin.mh gdb/config/i386/cygwin.mt gdb/config/i386/embed.mt gdb/config/i386/fbsd.mh gdb/config/i386/fbsd.mt gdb/config/i386/gdbserve.mt gdb/config/i386/go32.mh gdb/config/i386/go32.mt gdb/config/i386/i386aix.mh gdb/config/i386/i386aix.mt gdb/config/i386/i386aout.mt gdb/config/i386/i386bsd.mh gdb/config/i386/i386bsd.mt gdb/config/i386/i386dgux.mh gdb/config/i386/i386gnu.mh gdb/config/i386/i386gnu.mt gdb/config/i386/i386lynx.mh gdb/config/i386/i386lynx.mt gdb/config/i386/i386m3.mh gdb/config/i386/i386m3.mt gdb/config/i386/i386mach.mh gdb/config/i386/i386mk.mh gdb/config/i386/i386mk.mt gdb/config/i386/i386nw.mt gdb/config/i386/i386os9k.mt gdb/config/i386/i386sco.mh gdb/config/i386/i386sco4.mh gdb/config/i386/i386sco5.mh gdb/config/i386/i386sco5.mt gdb/config/i386/i386sol2.mh gdb/config/i386/i386sol2.mt gdb/config/i386/i386v.mh gdb/config/i386/i386v.mt gdb/config/i386/i386v32.mh gdb/config/i386/i386v4.mh gdb/config/i386/i386v4.mt gdb/config/i386/i386v42mp.mh gdb/config/i386/i386v42mp.mt gdb/config/i386/linux.mh gdb/config/i386/linux.mt gdb/config/i386/nbsd.mt gdb/config/i386/nbsdaout.mh gdb/config/i386/nbsdelf.mh gdb/config/i386/ncr3000.mh gdb/config/i386/ncr3000.mt gdb/config/i386/nm-cygwin.h gdb/config/i386/nm-fbsd.h gdb/config/i386/nm-go32.h gdb/config/i386/nm-i386.h gdb/config/i386/nm-i386aix.h gdb/config/i386/nm-i386bsd.h gdb/config/i386/nm-i386gnu.h gdb/config/i386/nm-i386lynx.h gdb/config/i386/nm-i386mach.h gdb/config/i386/nm-i386sco.h gdb/config/i386/nm-i386sco4.h gdb/config/i386/nm-i386sco5.h gdb/config/i386/nm-i386sol2.h gdb/config/i386/nm-i386v.h gdb/config/i386/nm-i386v4.h gdb/config/i386/nm-i386v42mp.h gdb/config/i386/nm-linux.h gdb/config/i386/nm-m3.h gdb/config/i386/nm-nbsd.h gdb/config/i386/nm-nbsdaout.h gdb/config/i386/nm-obsd.h gdb/config/i386/nm-ptx4.h gdb/config/i386/nm-symmetry.h gdb/config/i386/nm-x86-64linux.h gdb/config/i386/obsd.mh gdb/config/i386/ptx.mh gdb/config/i386/ptx.mt gdb/config/i386/ptx4.mh gdb/config/i386/ptx4.mt gdb/config/i386/symmetry.mh gdb/config/i386/symmetry.mt gdb/config/i386/tm-cygwin.h gdb/config/i386/tm-fbsd.h gdb/config/i386/tm-go32.h gdb/config/i386/tm-i386.h gdb/config/i386/tm-i386aix.h gdb/config/i386/tm-i386bsd.h gdb/config/i386/tm-i386lynx.h gdb/config/i386/tm-i386m3.h gdb/config/i386/tm-i386mk.h gdb/config/i386/tm-i386os9k.h gdb/config/i386/tm-i386sol2.h gdb/config/i386/tm-i386v4.h gdb/config/i386/tm-i386v42mp.h gdb/config/i386/tm-linux.h gdb/config/i386/tm-nbsd.h gdb/config/i386/tm-ptx.h gdb/config/i386/tm-ptx4.h gdb/config/i386/tm-symmetry.h gdb/config/i386/tm-vxworks.h gdb/config/i386/tm-x86-64linux.h gdb/config/i386/vxworks.mt gdb/config/i386/x86-64linux.mh gdb/config/i386/x86-64linux.mt gdb/config/i386/xm-cygwin.h gdb/config/i386/xm-go32.h gdb/config/i386/xm-i386.h gdb/config/i386/xm-i386aix.h gdb/config/i386/xm-i386bsd.h gdb/config/i386/xm-i386m3.h gdb/config/i386/xm-i386mach.h gdb/config/i386/xm-i386mk.h gdb/config/i386/xm-i386sco.h gdb/config/i386/xm-i386v.h gdb/config/i386/xm-i386v32.h gdb/config/i386/xm-i386v4.h gdb/config/i386/xm-nbsd.h gdb/config/i386/xm-ptx.h gdb/config/i386/xm-ptx4.h gdb/config/i386/xm-symmetry.h gdb/config/i960/mon960.mt gdb/config/i960/nindy960.mt gdb/config/i960/tm-i960.h gdb/config/i960/tm-mon960.h gdb/config/i960/tm-nindy960.h gdb/config/i960/tm-vx960.h gdb/config/i960/vxworks960.mt gdb/config/ia64/aix.mh gdb/config/ia64/aix.mt gdb/config/ia64/ia64.mt gdb/config/ia64/linux.mh gdb/config/ia64/linux.mt gdb/config/ia64/nm-aix.h gdb/config/ia64/nm-linux.h gdb/config/ia64/tm-aix.h gdb/config/ia64/tm-ia64.h gdb/config/ia64/tm-linux.h gdb/config/ia64/xm-aix.h gdb/config/ia64/xm-linux.h gdb/config/m32r/m32r.mt gdb/config/m32r/tm-m32r.h gdb/config/m68hc11/m68hc11.mt gdb/config/m68k/3b1.mh gdb/config/m68k/3b1.mt gdb/config/m68k/apollo68b.mh gdb/config/m68k/apollo68b.mt gdb/config/m68k/apollo68v.mh gdb/config/m68k/cisco.mt gdb/config/m68k/delta68.mh gdb/config/m68k/delta68.mt gdb/config/m68k/dpx2.mh gdb/config/m68k/dpx2.mt gdb/config/m68k/es1800.mt gdb/config/m68k/hp300bsd.mh gdb/config/m68k/hp300bsd.mt gdb/config/m68k/hp300hpux.mh gdb/config/m68k/hp300hpux.mt gdb/config/m68k/linux.mh gdb/config/m68k/linux.mt gdb/config/m68k/m68klynx.mh gdb/config/m68k/m68klynx.mt gdb/config/m68k/m68kv4.mh gdb/config/m68k/m68kv4.mt gdb/config/m68k/monitor.mt gdb/config/m68k/nbsdaout.mh gdb/config/m68k/nbsdaout.mt gdb/config/m68k/nm-apollo68b.h gdb/config/m68k/nm-apollo68v.h gdb/config/m68k/nm-delta68.h gdb/config/m68k/nm-dpx2.h gdb/config/m68k/nm-hp300bsd.h gdb/config/m68k/nm-hp300hpux.h gdb/config/m68k/nm-linux.h gdb/config/m68k/nm-m68klynx.h gdb/config/m68k/nm-nbsd.h gdb/config/m68k/nm-nbsdaout.h gdb/config/m68k/nm-sun2.h gdb/config/m68k/nm-sun3.h gdb/config/m68k/nm-sysv4.h gdb/config/m68k/os68k.mt gdb/config/m68k/st2000.mt gdb/config/m68k/sun2os3.mh gdb/config/m68k/sun2os3.mt gdb/config/m68k/sun2os4.mh gdb/config/m68k/sun2os4.mt gdb/config/m68k/sun3os3.mh gdb/config/m68k/sun3os3.mt gdb/config/m68k/sun3os4.mh gdb/config/m68k/sun3os4.mt gdb/config/m68k/tm-3b1.h gdb/config/m68k/tm-apollo68b.h gdb/config/m68k/tm-cisco.h gdb/config/m68k/tm-delta68.h gdb/config/m68k/tm-dpx2.h gdb/config/m68k/tm-es1800.h gdb/config/m68k/tm-hp300bsd.h gdb/config/m68k/tm-hp300hpux.h gdb/config/m68k/tm-linux.h gdb/config/m68k/tm-m68k.h gdb/config/m68k/tm-m68klynx.h gdb/config/m68k/tm-m68kv4.h gdb/config/m68k/tm-mac.h gdb/config/m68k/tm-monitor.h gdb/config/m68k/tm-nbsd.h gdb/config/m68k/tm-os68k.h gdb/config/m68k/tm-st2000.h gdb/config/m68k/tm-sun2.h gdb/config/m68k/tm-sun2os4.h gdb/config/m68k/tm-sun3.h gdb/config/m68k/tm-sun3os4.h gdb/config/m68k/tm-vx68.h gdb/config/m68k/vxworks68.mt gdb/config/m68k/xm-3b1.h gdb/config/m68k/xm-apollo68b.h gdb/config/m68k/xm-apollo68v.h gdb/config/m68k/xm-delta68.h gdb/config/m68k/xm-dpx2.h gdb/config/m68k/xm-hp300bsd.h gdb/config/m68k/xm-hp300hpux.h gdb/config/m68k/xm-linux.h gdb/config/m68k/xm-m68k.h gdb/config/m68k/xm-m68kv4.h gdb/config/m68k/xm-nbsd.h gdb/config/m68k/xm-sun2.h gdb/config/m68k/xm-sun3.h gdb/config/m68k/xm-sun3os4.h gdb/config/m88k/delta88.mh gdb/config/m88k/delta88.mt gdb/config/m88k/delta88v4.mh gdb/config/m88k/delta88v4.mt gdb/config/m88k/m88k.mh gdb/config/m88k/m88k.mt gdb/config/m88k/nm-delta88v4.h gdb/config/m88k/nm-m88k.h gdb/config/m88k/tm-delta88.h gdb/config/m88k/tm-delta88v4.h gdb/config/m88k/tm-m88k.h gdb/config/m88k/xm-delta88.h gdb/config/m88k/xm-delta88v4.h gdb/config/m88k/xm-dgux.h gdb/config/mcore/mcore.mt gdb/config/mips/bigmips.mt gdb/config/mips/bigmips64.mt gdb/config/mips/decstation.mh gdb/config/mips/decstation.mt gdb/config/mips/embed.mt gdb/config/mips/embed64.mt gdb/config/mips/embedl.mt gdb/config/mips/embedl64.mt gdb/config/mips/irix3.mh gdb/config/mips/irix3.mt gdb/config/mips/irix4.mh gdb/config/mips/irix5.mh gdb/config/mips/irix5.mt gdb/config/mips/irix6.mh gdb/config/mips/irix6.mt gdb/config/mips/linux.mh gdb/config/mips/linux.mt gdb/config/mips/littlemips.mh gdb/config/mips/littlemips.mt gdb/config/mips/mipsm3.mh gdb/config/mips/mipsm3.mt gdb/config/mips/mipsv4.mh gdb/config/mips/mipsv4.mt gdb/config/mips/nbsd.mh gdb/config/mips/nbsd.mt gdb/config/mips/news-mips.mh gdb/config/mips/nm-irix3.h gdb/config/mips/nm-irix4.h gdb/config/mips/nm-irix5.h gdb/config/mips/nm-irix6.h gdb/config/mips/nm-linux.h gdb/config/mips/nm-mips.h gdb/config/mips/nm-nbsd.h gdb/config/mips/nm-news-mips.h gdb/config/mips/nm-riscos.h gdb/config/mips/riscos.mh gdb/config/mips/tm-bigmips.h gdb/config/mips/tm-bigmips64.h gdb/config/mips/tm-embed.h gdb/config/mips/tm-embed64.h gdb/config/mips/tm-embedl.h gdb/config/mips/tm-embedl64.h gdb/config/mips/tm-irix3.h gdb/config/mips/tm-irix5.h gdb/config/mips/tm-irix6.h gdb/config/mips/tm-linux.h gdb/config/mips/tm-mips.h gdb/config/mips/tm-mips64.h gdb/config/mips/tm-mipsm3.h gdb/config/mips/tm-mipsv4.h gdb/config/mips/tm-nbsd.h gdb/config/mips/tm-tx39.h gdb/config/mips/tm-tx39l.h gdb/config/mips/tm-vr4100.h gdb/config/mips/tm-vr4300.h gdb/config/mips/tm-vr4300el.h gdb/config/mips/tm-vr4xxx.h gdb/config/mips/tm-vr4xxxel.h gdb/config/mips/tm-vr5000.h gdb/config/mips/tm-vr5000el.h gdb/config/mips/tm-vxmips.h gdb/config/mips/tm-wince.h gdb/config/mips/tx39.mt gdb/config/mips/tx39l.mt gdb/config/mips/vr4100.mt gdb/config/mips/vr4300.mt gdb/config/mips/vr4300el.mt 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readline/config.h.bot readline/config.h.in readline/configure readline/configure.in readline/cross-build/cygwin.cache readline/display.c readline/doc/ChangeLog.gdb readline/doc/Makefile.in readline/doc/hist.texinfo readline/doc/hstech.texinfo readline/doc/hsuser.texinfo readline/doc/inc-hist.texinfo readline/doc/manvers.texinfo readline/doc/readline.3 readline/doc/rlman.texinfo readline/doc/rltech.texinfo readline/doc/rluser.texinfo readline/doc/rluserman.texinfo readline/doc/texi2dvi readline/doc/texi2html readline/emacs_keymap.c readline/examples/ChangeLog.gdb readline/examples/Inputrc readline/examples/Makefile.in readline/examples/excallback.c readline/examples/fileman.c readline/examples/histexamp.c readline/examples/manexamp.c readline/examples/rl.c readline/examples/rlfe.c readline/examples/rltest.c readline/examples/rlversion.c readline/funmap.c readline/histexpand.c readline/histfile.c readline/histlib.h readline/history.c readline/history.h readline/histsearch.c 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sim/testsuite/sim/m32r/ldh-d.cgs sim/testsuite/sim/m32r/ldh.cgs sim/testsuite/sim/m32r/ldi16.cgs sim/testsuite/sim/m32r/ldi8.cgs sim/testsuite/sim/m32r/ldub-d.cgs sim/testsuite/sim/m32r/ldub.cgs sim/testsuite/sim/m32r/lduh-d.cgs sim/testsuite/sim/m32r/lduh.cgs sim/testsuite/sim/m32r/lock.cgs sim/testsuite/sim/m32r/machi.cgs sim/testsuite/sim/m32r/maclo.cgs sim/testsuite/sim/m32r/macwhi.cgs sim/testsuite/sim/m32r/macwlo.cgs sim/testsuite/sim/m32r/misc.exp sim/testsuite/sim/m32r/mul.cgs sim/testsuite/sim/m32r/mulhi.cgs sim/testsuite/sim/m32r/mullo.cgs sim/testsuite/sim/m32r/mulwhi.cgs sim/testsuite/sim/m32r/mulwlo.cgs sim/testsuite/sim/m32r/mv.cgs sim/testsuite/sim/m32r/mvfachi.cgs sim/testsuite/sim/m32r/mvfaclo.cgs sim/testsuite/sim/m32r/mvfacmi.cgs sim/testsuite/sim/m32r/mvfc.cgs sim/testsuite/sim/m32r/mvtachi.cgs sim/testsuite/sim/m32r/mvtaclo.cgs sim/testsuite/sim/m32r/mvtc.cgs sim/testsuite/sim/m32r/neg.cgs sim/testsuite/sim/m32r/nop.cgs sim/testsuite/sim/m32r/not.cgs sim/testsuite/sim/m32r/or.cgs sim/testsuite/sim/m32r/or3.cgs sim/testsuite/sim/m32r/rac.cgs sim/testsuite/sim/m32r/rach.cgs sim/testsuite/sim/m32r/rem.cgs sim/testsuite/sim/m32r/remu.cgs sim/testsuite/sim/m32r/rte.cgs sim/testsuite/sim/m32r/seth.cgs sim/testsuite/sim/m32r/sll.cgs sim/testsuite/sim/m32r/sll3.cgs sim/testsuite/sim/m32r/slli.cgs sim/testsuite/sim/m32r/sra.cgs sim/testsuite/sim/m32r/sra3.cgs sim/testsuite/sim/m32r/srai.cgs sim/testsuite/sim/m32r/srl.cgs sim/testsuite/sim/m32r/srl3.cgs sim/testsuite/sim/m32r/srli.cgs sim/testsuite/sim/m32r/st-d.cgs sim/testsuite/sim/m32r/st-minus.cgs sim/testsuite/sim/m32r/st-plus.cgs sim/testsuite/sim/m32r/st.cgs sim/testsuite/sim/m32r/stb-d.cgs sim/testsuite/sim/m32r/stb.cgs sim/testsuite/sim/m32r/sth-d.cgs sim/testsuite/sim/m32r/sth.cgs sim/testsuite/sim/m32r/sub.cgs sim/testsuite/sim/m32r/subv.cgs sim/testsuite/sim/m32r/subx.cgs sim/testsuite/sim/m32r/testutils.inc sim/testsuite/sim/m32r/trap.cgs sim/testsuite/sim/m32r/unlock.cgs sim/testsuite/sim/m32r/uread16.ms sim/testsuite/sim/m32r/uread32.ms sim/testsuite/sim/m32r/uwrite16.ms sim/testsuite/sim/m32r/uwrite32.ms sim/testsuite/sim/m32r/xor.cgs sim/testsuite/sim/m32r/xor3.cgs sim/v850/ChangeLog sim/v850/Makefile.in sim/v850/acconfig.h sim/v850/config.in sim/v850/configure sim/v850/configure.in sim/v850/interp.c sim/v850/sim-main.h sim/v850/simops.c sim/v850/simops.h sim/v850/v850-dc sim/v850/v850.igen sim/v850/v850_sim.h sim/z8k/ChangeLog sim/z8k/Makefile.in sim/z8k/acconfig.h sim/z8k/comped1.c sim/z8k/comped2.c sim/z8k/comped3.c sim/z8k/compedb3.c sim/z8k/config.in sim/z8k/configure sim/z8k/configure.in sim/z8k/iface.c sim/z8k/inlines.h sim/z8k/mem.c sim/z8k/mem.h sim/z8k/quick.c sim/z8k/sim.h sim/z8k/support.c sim/z8k/syscall.h sim/z8k/tconfig.in sim/z8k/tm.h sim/z8k/writecode.c texinfo/texinfo.tex
author: nobody <> 2002-09-07 00:00:05 +0000
committer: nobody <> 2002-09-07 00:00:05 +0000
commit: c1aa2a27e755c883b5c49b223120dfb712ea4e28 (patch)
tree: a98633075cd1f2b034b49446e83e522708d11f68 /sim/sh/interp.c
parent: 2e3c0e2427295c9cc09a8a707dfba38d50e2ba30 (diff)
download: gdb-sid-20020905-branch.zip
gdb-sid-20020905-branch.tar.gz
gdb-sid-20020905-branch.tar.bz2
1 files changed, 0 insertions, 2284 deletions
diff --git a/sim/sh/interp.c b/sim/sh/interp.c
deleted file mode 100644
index 2f5d1d3..0000000
--- a/sim/sh/interp.c
+++ /dev/null
@@ -1,2284 +0,0 @@
-/* Simulator for the Hitachi SH architecture.
-
-   Written by Steve Chamberlain of Cygnus Support.
-   sac@cygnus.com
-
-   This file is part of SH sim
-
-
-		THIS SOFTWARE IS NOT COPYRIGHTED
-
-   Cygnus offers the following for use in the public domain.  Cygnus
-   makes no warranty with regard to the software or it's performance
-   and the user accepts the software "AS IS" with all faults.
-
-   CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO
-   THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-   MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-*/
-
-#include "config.h"
-
-#include <signal.h>
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-
-#include "sysdep.h"
-#include "bfd.h"
-#include "gdb/callback.h"
-#include "gdb/remote-sim.h"
-#include "gdb/sim-sh.h"
-
-/* This file is local - if newlib changes, then so should this.  */
-#include "syscall.h"
-
-#include <math.h>
-
-#ifdef _WIN32
-#include <float.h>		/* Needed for _isnan() */
-#define isnan _isnan
-#endif
-
-#ifndef SIGBUS
-#define SIGBUS SIGSEGV
-#endif
-
-#ifndef SIGQUIT
-#define SIGQUIT SIGTERM
-#endif
-
-#ifndef SIGTRAP
-#define SIGTRAP 5
-#endif
-
-extern unsigned char sh_jump_table[], sh_dsp_table[0x1000], ppi_table[];
-
-int sim_write (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size);
-
-#define O_RECOMPILE 85
-#define DEFINE_TABLE
-#define DISASSEMBLER_TABLE
-
-/* Define the rate at which the simulator should poll the host
-   for a quit. */
-#define POLL_QUIT_INTERVAL 0x60000
-
-typedef union
-{
-
-  struct
-  {
-    int regs[16];
-    int pc;
-
-    /* System registers.  For sh-dsp this also includes A0 / X0 / X1 / Y0 / Y1
-       which are located in fregs, i.e. strictly speaking, these are
-       out-of-bounds accesses of sregs.i .  This wart of the code could be
-       fixed by making fregs part of sregs, and including pc too - to avoid
-       alignment repercussions - but this would cause very onerous union /
-       structure nesting, which would only be managable with anonymous
-       unions and structs.  */
-    union
-      {
-	struct
-	  {
-	    int mach;
-	    int macl;
-	    int pr;
-	    int dummy3, dummy4;
-	    int fpul; /* A1 for sh-dsp -  but only for movs etc.  */
-	    int fpscr; /* dsr for sh-dsp */
-	  } named;
-	int i[7];
-      } sregs;
-
-    /* sh3e / sh-dsp */
-    union fregs_u
-      {
-	float f[16];
-	double d[8];
-	int i[16];
-      }
-    fregs[2];
-
-    /* Control registers; on the SH4, ldc / stc is privileged, except when
-       accessing gbr.  */
-    union
-      {
-	struct
-	  {
-	    int sr;
-	    int gbr;
-	    int vbr;
-	    int ssr;
-	    int spc;
-	    int mod;
-	    /* sh-dsp */
-	    int rs;
-	    int re;
-	    /* sh3 */
-	    int bank[8];
-	  } named;
-	int i[16];
-      } cregs;
-
-    unsigned char *insn_end;
-
-    int ticks;
-    int stalls;
-    int memstalls;
-    int cycles;
-    int insts;
-
-    int prevlock;
-    int thislock;
-    int exception;
-
-    int end_of_registers;
-
-    int msize;
-#define PROFILE_FREQ 1
-#define PROFILE_SHIFT 2
-    int profile;
-    unsigned short *profile_hist;
-    unsigned char *memory;
-    int xyram_select, xram_start, yram_start;
-    unsigned char *xmem;
-    unsigned char *ymem;
-    unsigned char *xmem_offset;
-    unsigned char *ymem_offset;
-  }
-  asregs;
-  int asints[40];
-} saved_state_type;
-
-saved_state_type saved_state;
-
-struct loop_bounds { unsigned char *start, *end; };
-
-/* These variables are at file scope so that functions other than
-   sim_resume can use the fetch/store macros */
-
-static int target_little_endian;
-static int global_endianw, endianb;
-static int target_dsp;
-static int host_little_endian;
-static char **prog_argv;
-
-#if 1
-static int maskw = 0;
-#endif
-
-static SIM_OPEN_KIND sim_kind;
-static char *myname;
-
-
-/* Short hand definitions of the registers */
-
-#define SBIT(x) ((x)&sbit)
-#define R0 	saved_state.asregs.regs[0]
-#define Rn 	saved_state.asregs.regs[n]
-#define Rm 	saved_state.asregs.regs[m]
-#define UR0 	(unsigned int)(saved_state.asregs.regs[0])
-#define UR 	(unsigned int)R
-#define UR 	(unsigned int)R
-#define SR0 	saved_state.asregs.regs[0]
-#define CREG(n)	(saved_state.asregs.cregs.i[(n)])
-#define GBR 	saved_state.asregs.cregs.named.gbr
-#define VBR 	saved_state.asregs.cregs.named.vbr
-#define SSR	saved_state.asregs.cregs.named.ssr
-#define SPC	saved_state.asregs.cregs.named.spc
-#define SREG(n)	(saved_state.asregs.sregs.i[(n)])
-#define MACH 	saved_state.asregs.sregs.named.mach
-#define MACL 	saved_state.asregs.sregs.named.macl
-#define PR	saved_state.asregs.sregs.named.pr
-#define FPUL	saved_state.asregs.sregs.named.fpul
-
-#define PC insn_ptr
-
-
-
-/* Alternate bank of registers r0-r7 */
-
-/* Note: code controling SR handles flips between BANK0 and BANK1 */
-#define Rn_BANK(n) (saved_state.asregs.cregs.named.bank[(n)])
-#define SET_Rn_BANK(n, EXP) do { saved_state.asregs.cregs.named.bank[(n)] = (EXP); } while (0)
-
-
-/* Manipulate SR */
-
-#define SR_MASK_DMY (1 << 11)
-#define SR_MASK_DMX (1 << 10)
-#define SR_MASK_M (1 << 9)
-#define SR_MASK_Q (1 << 8)
-#define SR_MASK_I (0xf << 4)
-#define SR_MASK_S (1 << 1)
-#define SR_MASK_T (1 << 0)
-
-#define SR_MASK_BL (1 << 28)
-#define SR_MASK_RB (1 << 29)
-#define SR_MASK_MD (1 << 30)
-#define SR_MASK_RC 0x0fff0000
-#define SR_RC_INCREMENT -0x00010000
-
-#define M 	((saved_state.asregs.cregs.named.sr & SR_MASK_M) != 0)
-#define Q 	((saved_state.asregs.cregs.named.sr & SR_MASK_Q) != 0)
-#define S 	((saved_state.asregs.cregs.named.sr & SR_MASK_S) != 0)
-#define T 	((saved_state.asregs.cregs.named.sr & SR_MASK_T) != 0)
-
-#define SR_BL ((saved_state.asregs.cregs.named.sr & SR_MASK_BL) != 0)
-#define SR_RB ((saved_state.asregs.cregs.named.sr & SR_MASK_RB) != 0)
-#define SR_MD ((saved_state.asregs.cregs.named.sr & SR_MASK_MD) != 0)
-#define SR_DMY ((saved_state.asregs.cregs.named.sr & SR_MASK_DMY) != 0)
-#define SR_DMX ((saved_state.asregs.cregs.named.sr & SR_MASK_DMX) != 0)
-#define SR_RC ((saved_state.asregs.cregs.named.sr & SR_MASK_RC))
-
-/* Note: don't use this for privileged bits */
-#define SET_SR_BIT(EXP, BIT) \
-do { \
-  if ((EXP) & 1) \
-    saved_state.asregs.cregs.named.sr |= (BIT); \
-  else \
-    saved_state.asregs.cregs.named.sr &= ~(BIT); \
-} while (0)
-
-#define SET_SR_M(EXP) SET_SR_BIT ((EXP), SR_MASK_M)
-#define SET_SR_Q(EXP) SET_SR_BIT ((EXP), SR_MASK_Q)
-#define SET_SR_S(EXP) SET_SR_BIT ((EXP), SR_MASK_S)
-#define SET_SR_T(EXP) SET_SR_BIT ((EXP), SR_MASK_T)
-
-/* stc currently relies on being able to read SR without modifications.  */
-#define GET_SR() (saved_state.asregs.cregs.named.sr - 0)
-
-#define SET_SR(x) set_sr (x)
-
-#define SET_RC(x) \
-  (saved_state.asregs.cregs.named.sr \
-   = saved_state.asregs.cregs.named.sr & 0xf000ffff | ((x) & 0xfff) << 16)
-
-/* Manipulate FPSCR */
-
-#define FPSCR_MASK_FR (1 << 21)
-#define FPSCR_MASK_SZ (1 << 20)
-#define FPSCR_MASK_PR (1 << 19)
-
-#define FPSCR_FR  ((GET_FPSCR() & FPSCR_MASK_FR) != 0)
-#define FPSCR_SZ  ((GET_FPSCR() & FPSCR_MASK_SZ) != 0)
-#define FPSCR_PR  ((GET_FPSCR() & FPSCR_MASK_PR) != 0)
-
-/* Count the number of arguments in an argv.  */
-static int
-count_argc (char **argv)
-{
-  int i;
-
-  if (! argv)
-    return -1;
-
-  for (i = 0; argv[i] != NULL; ++i)
-    continue;
-  return i;
-}
-
-static void
-set_fpscr1 (x)
-	int x;
-{
-  int old = saved_state.asregs.sregs.named.fpscr;
-  saved_state.asregs.sregs.named.fpscr = (x);
-  /* swap the floating point register banks */
-  if ((saved_state.asregs.sregs.named.fpscr ^ old) & FPSCR_MASK_FR
-      /* Ignore bit change if simulating sh-dsp.  */
-      && ! target_dsp)
-    {
-      union fregs_u tmpf = saved_state.asregs.fregs[0];
-      saved_state.asregs.fregs[0] = saved_state.asregs.fregs[1];
-      saved_state.asregs.fregs[1] = tmpf;
-    }
-}
-
-/* sts relies on being able to read fpscr directly.  */
-#define GET_FPSCR()  (saved_state.asregs.sregs.named.fpscr)
-#define SET_FPSCR(x) \
-do { \
-  set_fpscr1 (x); \
-} while (0)
-
-#define DSR  (saved_state.asregs.sregs.named.fpscr)
-
-int 
-fail ()
-{
-  abort ();
-}
-
-#define RAISE_EXCEPTION(x) \
-  (saved_state.asregs.exception = x, saved_state.asregs.insn_end = 0)
-
-/* This function exists mainly for the purpose of setting a breakpoint to
-   catch simulated bus errors when running the simulator under GDB.  */
-
-void
-raise_exception (x)
-     int x;
-{
-  RAISE_EXCEPTION(x);
-}
-
-void
-raise_buserror ()
-{
-  raise_exception (SIGBUS);
-}
-
-#define PROCESS_SPECIAL_ADDRESS(addr, endian, ptr, bits_written, \
-				forbidden_addr_bits, data, retval) \
-do { \
-  if (addr & forbidden_addr_bits) \
-    { \
-      raise_buserror (); \
-      return retval; \
-    } \
-  else if ((addr & saved_state.asregs.xyram_select) \
-	   == saved_state.asregs.xram_start) \
-    ptr = (void *) &saved_state.asregs.xmem_offset[addr ^ endian]; \
-  else if ((addr & saved_state.asregs.xyram_select) \
-	   == saved_state.asregs.yram_start) \
-    ptr = (void *) &saved_state.asregs.ymem_offset[addr ^ endian]; \
-  else if ((unsigned) addr >> 24 == 0xf0 \
-	   && bits_written == 32 && (data & 1) == 0) \
-    /* This invalidates (if not associative) or might invalidate \
-       (if associative) an instruction cache line.  This is used for \
-       trampolines.  Since we don't simulate the cache, this is a no-op \
-       as far as the simulator is concerned.  */ \
-    return retval; \
-  else \
-    { \
-      if (bits_written == 8 && addr > 0x5000000) \
-	IOMEM (addr, 1, data); \
-      /* We can't do anything useful with the other stuff, so fail.  */ \
-      raise_buserror (); \
-      return retval; \
-    } \
-} while (0)
-
-/* FIXME: sim_resume should be renamed to sim_engine_run.  sim_resume
-   being implemented by ../common/sim_resume.c and the below should
-   make a call to sim_engine_halt */
-
-#define BUSERROR(addr, mask) ((addr) & (mask))
-
-#define WRITE_BUSERROR(addr, mask, data, addr_func) \
-  do \
-    { \
-      if (addr & mask) \
-	{ \
-	  addr_func (addr, data); \
-	  return; \
-	} \
-    } \
-  while (0)
-
-#define READ_BUSERROR(addr, mask, addr_func) \
-  do \
-    { \
-      if (addr & mask) \
-	return addr_func (addr); \
-    } \
-  while (0)
-
-/* Define this to enable register lifetime checking.
-   The compiler generates "add #0,rn" insns to mark registers as invalid,
-   the simulator uses this info to call fail if it finds a ref to an invalid
-   register before a def
-
-   #define PARANOID
-*/
-
-#ifdef PARANOID
-int valid[16];
-#define CREF(x)  if(!valid[x]) fail();
-#define CDEF(x)  valid[x] = 1;
-#define UNDEF(x) valid[x] = 0;
-#else
-#define CREF(x)
-#define CDEF(x)
-#define UNDEF(x)
-#endif
-
-static void parse_and_set_memory_size PARAMS ((char *str));
-static int IOMEM PARAMS ((int addr, int write, int value));
-static struct loop_bounds get_loop_bounds PARAMS((int, int, unsigned char *,
-						  unsigned char *, int, int));
-static void process_wlat_addr PARAMS((int, int));
-static void process_wwat_addr PARAMS((int, int));
-static void process_wbat_addr PARAMS((int, int));
-static int process_rlat_addr PARAMS((int));
-static int process_rwat_addr PARAMS((int));
-static int process_rbat_addr PARAMS((int));
-static void INLINE wlat_fast PARAMS ((unsigned char *, int, int, int));
-static void INLINE wwat_fast PARAMS ((unsigned char *, int, int, int, int));
-static void INLINE wbat_fast PARAMS ((unsigned char *, int, int, int));
-static int INLINE rlat_fast PARAMS ((unsigned char *, int, int));
-static int INLINE rwat_fast PARAMS ((unsigned char *, int, int, int));
-static int INLINE rbat_fast PARAMS ((unsigned char *, int, int));
-
-static host_callback *callback;
-
-
-
-/* Floating point registers */
-
-#define DR(n) (get_dr (n))
-static double
-get_dr (n)
-     int n;
-{
-  n = (n & ~1);
-  if (host_little_endian)
-    {
-      union
-      {
-	int i[2];
-	double d;
-      } dr;
-      dr.i[1] = saved_state.asregs.fregs[0].i[n + 0];
-      dr.i[0] = saved_state.asregs.fregs[0].i[n + 1];
-      return dr.d;
-    }
-  else
-    return (saved_state.asregs.fregs[0].d[n >> 1]);
-}
-
-#define SET_DR(n, EXP) set_dr ((n), (EXP))
-static void
-set_dr (n, exp)
-     int n;
-     double exp;
-{
-  n = (n & ~1);
-  if (host_little_endian)
-    {
-      union
-      {
-	int i[2];
-	double d;
-      } dr;
-      dr.d = exp;
-      saved_state.asregs.fregs[0].i[n + 0] = dr.i[1];
-      saved_state.asregs.fregs[0].i[n + 1] = dr.i[0];
-    }
-  else
-    saved_state.asregs.fregs[0].d[n >> 1] = exp;
-}
-
-#define SET_FI(n,EXP) (saved_state.asregs.fregs[0].i[(n)] = (EXP))
-#define FI(n) (saved_state.asregs.fregs[0].i[(n)])
-
-#define FR(n) (saved_state.asregs.fregs[0].f[(n)])
-#define SET_FR(n,EXP) (saved_state.asregs.fregs[0].f[(n)] = (EXP))
-
-#define XD_TO_XF(n) ((((n) & 1) << 5) | ((n) & 0x1e))
-#define XF(n) (saved_state.asregs.fregs[(n) >> 5].i[(n) & 0x1f])
-#define SET_XF(n,EXP) (saved_state.asregs.fregs[(n) >> 5].i[(n) & 0x1f] = (EXP))
-
-#define RS saved_state.asregs.cregs.named.rs
-#define RE saved_state.asregs.cregs.named.re
-#define MOD (saved_state.asregs.cregs.named.mod)
-#define SET_MOD(i) \
-(MOD = (i), \
- MOD_ME = (unsigned) MOD >> 16 | (SR_DMY ? ~0xffff : (SR_DMX ? 0 : 0x10000)), \
- MOD_DELTA = (MOD & 0xffff) - ((unsigned) MOD >> 16))
-
-#define DSP_R(n) saved_state.asregs.sregs.i[(n)]
-#define DSP_GRD(n) DSP_R ((n) + 8)
-#define GET_DSP_GRD(n) ((n | 2) == 7 ? SEXT (DSP_GRD (n)) : SIGN32 (DSP_R (n)))
-#define A1 DSP_R (5)
-#define A0 DSP_R (7)
-#define X0 DSP_R (8)
-#define X1 DSP_R (9)
-#define Y0 DSP_R (10)
-#define Y1 DSP_R (11)
-#define M0 DSP_R (12)
-#define A1G DSP_R (13)
-#define M1 DSP_R (14)
-#define A0G DSP_R (15)
-/* DSP_R (16) / DSP_GRD (16) are used as a fake destination for pcmp.  */
-#define MOD_ME DSP_GRD (17)
-#define MOD_DELTA DSP_GRD (18)
-
-#define FP_OP(n, OP, m) \
-{ \
-  if (FPSCR_PR) \
-    { \
-      if (((n) & 1) || ((m) & 1)) \
-	RAISE_EXCEPTION (SIGILL); \
-      else \
-	SET_DR(n, (DR(n) OP DR(m))); \
-    } \
-  else \
-    SET_FR(n, (FR(n) OP FR(m))); \
-} while (0)
-
-#define FP_UNARY(n, OP) \
-{ \
-  if (FPSCR_PR) \
-    { \
-      if ((n) & 1) \
-	RAISE_EXCEPTION (SIGILL); \
-      else \
-	SET_DR(n, (OP (DR(n)))); \
-    } \
-  else \
-    SET_FR(n, (OP (FR(n)))); \
-} while (0)
-
-#define FP_CMP(n, OP, m) \
-{ \
-  if (FPSCR_PR) \
-    { \
-      if (((n) & 1) || ((m) & 1)) \
-	RAISE_EXCEPTION (SIGILL); \
-      else \
-	SET_SR_T (DR(n) OP DR(m)); \
-    } \
-  else \
-    SET_SR_T (FR(n) OP FR(m)); \
-} while (0)
-
-static void
-set_sr (new_sr)
-     int new_sr;
-{
-  /* do we need to swap banks */
-  int old_gpr = SR_MD && SR_RB;
-  int new_gpr = (new_sr & SR_MASK_MD) && (new_sr & SR_MASK_RB);
-  if (old_gpr != new_gpr)
-    {
-      int i, tmp;
-      for (i = 0; i < 8; i++)
-	{
-	  tmp = saved_state.asregs.cregs.named.bank[i];
-	  saved_state.asregs.cregs.named.bank[i] = saved_state.asregs.regs[i];
-	  saved_state.asregs.regs[i] = tmp;
-	}
-    }
-  saved_state.asregs.cregs.named.sr = new_sr;
-  SET_MOD (MOD);
-}
-
-static void INLINE 
-wlat_fast (memory, x, value, maskl)
-     unsigned char *memory;
-{
-  int v = value;
-  unsigned int *p = (unsigned int *)(memory + x);
-  WRITE_BUSERROR (x, maskl, v, process_wlat_addr);
-  *p = v;
-}
-
-static void INLINE 
-wwat_fast (memory, x, value, maskw, endianw)
-     unsigned char *memory;
-{
-  int v = value;
-  unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
-  WRITE_BUSERROR (x, maskw, v, process_wwat_addr);
-  *p = v;
-}
-
-static void INLINE 
-wbat_fast (memory, x, value, maskb)
-     unsigned char *memory;
-{
-  unsigned char *p = memory + (x ^ endianb);
-  WRITE_BUSERROR (x, maskb, value, process_wbat_addr);
-
-  p[0] = value;
-}
-
-/* Read functions */
-
-static int INLINE 
-rlat_fast (memory, x, maskl)
-     unsigned char *memory;
-{
-  unsigned int *p = (unsigned int *)(memory + x);
-  READ_BUSERROR (x, maskl, process_rlat_addr);
-
-  return *p;
-}
-
-static int INLINE 
-rwat_fast (memory, x, maskw, endianw)
-     unsigned char *memory;
-     int x, maskw, endianw;
-{
-  unsigned short *p = (unsigned short *)(memory + (x ^ endianw));
-  READ_BUSERROR (x, maskw, process_rwat_addr);
-
-  return *p;
-}
-
-static int INLINE 
-riat_fast (insn_ptr, endianw)
-     unsigned char *insn_ptr;
-{
-  unsigned short *p = (unsigned short *)((size_t) insn_ptr ^ endianw);
-
-  return *p;
-}
-
-static int INLINE 
-rbat_fast (memory, x, maskb)
-     unsigned char *memory;
-{
-  unsigned char *p = memory + (x ^ endianb);
-  READ_BUSERROR (x, maskb, process_rbat_addr);
-
-  return *p;
-}
-
-#define RWAT(x) 	(rwat_fast (memory, x, maskw, endianw))
-#define RLAT(x) 	(rlat_fast (memory, x, maskl))
-#define RBAT(x)         (rbat_fast (memory, x, maskb))
-#define RIAT(p)		(riat_fast ((p), endianw))
-#define WWAT(x,v) 	(wwat_fast (memory, x, v, maskw, endianw))
-#define WLAT(x,v) 	(wlat_fast (memory, x, v, maskl))
-#define WBAT(x,v)       (wbat_fast (memory, x, v, maskb))
-
-#define RUWAT(x)  (RWAT(x) & 0xffff)
-#define RSWAT(x)  ((short)(RWAT(x)))
-#define RSBAT(x)  (SEXT(RBAT(x)))
-
-#define RDAT(x, n) (do_rdat (memory, (x), (n), (maskl)))
-static int
-do_rdat (memory, x, n, maskl)
-     char *memory;
-     int x;
-     int n;
-     int maskl;
-{
-  int f0;
-  int f1;
-  int i = (n & 1);
-  int j = (n & ~1);
-  f0 = rlat_fast (memory, x + 0, maskl);
-  f1 = rlat_fast (memory, x + 4, maskl);
-  saved_state.asregs.fregs[i].i[(j + 0)] = f0;
-  saved_state.asregs.fregs[i].i[(j + 1)] = f1;
-  return 0;
-}
-
-#define WDAT(x, n) (do_wdat (memory, (x), (n), (maskl)))
-static int
-do_wdat (memory, x, n, maskl)
-     char *memory;
-     int x;
-     int n;
-     int maskl;
-{
-  int f0;
-  int f1;
-  int i = (n & 1);
-  int j = (n & ~1);
-  f0 = saved_state.asregs.fregs[i].i[(j + 0)];
-  f1 = saved_state.asregs.fregs[i].i[(j + 1)];
-  wlat_fast (memory, (x + 0), f0, maskl);
-  wlat_fast (memory, (x + 4), f1, maskl);
-  return 0;
-}
-
-static void
-process_wlat_addr (addr, value)
-     int addr;
-     int value;
-{
-  unsigned int *ptr;
-
-  PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, 32, 3, value, );
-  *ptr = value;
-}
-
-static void
-process_wwat_addr (addr, value)
-     int addr;
-     int value;
-{
-  unsigned short *ptr;
-
-  PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, 16, 1, value, );
-  *ptr = value;
-}
-
-static void
-process_wbat_addr (addr, value)
-     int addr;
-     int value;
-{
-  unsigned char *ptr;
-
-  PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, 8, 0, value, );
-  *ptr = value;
-}
-
-static int
-process_rlat_addr (addr)
-     int addr;
-{
-  unsigned char *ptr;
-
-  PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, -32, 3, -1, 0);
-  return *ptr;
-}
-
-static int
-process_rwat_addr (addr)
-     int addr;
-{
-  unsigned char *ptr;
-
-  PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, -16, 1, -1, 0);
-  return *ptr;
-}
-
-static int
-process_rbat_addr (addr)
-     int addr;
-{
-  unsigned char *ptr;
-
-  PROCESS_SPECIAL_ADDRESS (addr, endianb, ptr, -8, 0, -1, 0);
-  return *ptr;
-}
-
-#define SEXT(x)     	(((x &  0xff) ^ (~0x7f))+0x80)
-#define SEXT12(x)	(((x & 0xfff) ^ 0x800) - 0x800)
-#define SEXTW(y)    	((int)((short)y))
-#if 0
-#define SEXT32(x)	((int)((x & 0xffffffff) ^ 0x80000000U) - 0x7fffffff - 1)
-#else
-#define SEXT32(x)	((int)(x))
-#endif
-#define SIGN32(x)	(SEXT32 (x) >> 31)
-
-/* convert pointer from target to host value.  */
-#define PT2H(x) ((x) + memory)
-/* convert pointer from host to target value.  */
-#define PH2T(x) ((x) - memory)
-
-#define SKIP_INSN(p) ((p) += ((RIAT (p) & 0xfc00) == 0xf800 ? 4 : 2))
-
-#define SET_NIP(x) nip = (x); CHECK_INSN_PTR (nip);
-
-#define Delay_Slot(TEMPPC)  	iword = RIAT (TEMPPC); goto top;
-
-#define CHECK_INSN_PTR(p) \
-do { \
-  if (saved_state.asregs.exception || PH2T (p) & maskw) \
-    saved_state.asregs.insn_end = 0; \
-  else if (p < loop.end) \
-    saved_state.asregs.insn_end = loop.end; \
-  else \
-    saved_state.asregs.insn_end = mem_end; \
-} while (0)
-
-#ifdef ACE_FAST
-
-#define MA(n)
-#define L(x)
-#define TL(x)
-#define TB(x)
-
-#else
-
-#define MA(n) \
-  do { memstalls += ((((int) PC & 3) != 0) ? (n) : ((n) - 1)); } while (0)
-
-#define L(x)   thislock = x;
-#define TL(x)  if ((x) == prevlock) stalls++;
-#define TB(x,y)  if ((x) == prevlock || (y)==prevlock) stalls++;
-
-#endif
-
-#if defined(__GO32__) || defined(_WIN32)
-int sim_memory_size = 19;
-#else
-int sim_memory_size = 24;
-#endif
-
-static int sim_profile_size = 17;
-static int nsamples;
-
-#undef TB
-#define TB(x,y)
-
-#define SMR1 (0x05FFFEC8)	/* Channel 1  serial mode register */
-#define BRR1 (0x05FFFEC9)	/* Channel 1  bit rate register */
-#define SCR1 (0x05FFFECA)	/* Channel 1  serial control register */
-#define TDR1 (0x05FFFECB)	/* Channel 1  transmit data register */
-#define SSR1 (0x05FFFECC)	/* Channel 1  serial status register */
-#define RDR1 (0x05FFFECD)	/* Channel 1  receive data register */
-
-#define SCI_RDRF  	 0x40	/* Recieve data register full */
-#define SCI_TDRE	0x80	/* Transmit data register empty */
-
-static int
-IOMEM (addr, write, value)
-     int addr;
-     int write;
-     int value;
-{
-  if (write)
-    {
-      switch (addr)
-	{
-	case TDR1:
-	  if (value != '\r')
-	    {
-	      putchar (value);
-	      fflush (stdout);
-	    }
-	  break;
-	}
-    }
-  else
-    {
-      switch (addr)
-	{
-	case RDR1:
-	  return getchar ();
-	}
-    }
-  return 0;
-}
-
-static int
-get_now ()
-{
-  return time ((long *) 0);
-}
-
-static int
-now_persec ()
-{
-  return 1;
-}
-
-static FILE *profile_file;
-
-static unsigned INLINE
-swap (n)
-     unsigned n;
-{
-  if (endianb)
-    n = (n << 24 | (n & 0xff00) << 8
-	 | (n & 0xff0000) >> 8 | (n & 0xff000000) >> 24);
-  return n;
-}
-
-static unsigned short INLINE
-swap16 (n)
-     unsigned short n;
-{
-  if (endianb)
-    n = n << 8 | (n & 0xff00) >> 8;
-  return n;
-}
-
-static void
-swapout (n)
-     int n;
-{
-  if (profile_file)
-    {
-      union { char b[4]; int n; } u;
-      u.n = swap (n);
-      fwrite (u.b, 4, 1, profile_file);
-    }
-}
-
-static void
-swapout16 (n)
-     int n;
-{
-  union { char b[4]; int n; } u;
-  u.n = swap16 (n);
-  fwrite (u.b, 2, 1, profile_file);
-}
-
-/* Turn a pointer in a register into a pointer into real memory. */
-
-static char *
-ptr (x)
-     int x;
-{
-  return (char *) (x + saved_state.asregs.memory);
-}
-
-static int
-strswaplen (str)
-     int str;
-{
-  unsigned char *memory = saved_state.asregs.memory;
-  int start, end;
-  int endian = endianb;
-
-  if (! endian)
-    return 0;
-  end = str;
-  for (end = str; memory[end ^ endian]; end++) ;
-  return end - str;
-}
-
-static void
-strnswap (str, len)
-     int str;
-     int len;
-{
-  int *start, *end;
-
-  if (! endianb || ! len)
-    return;
-  start = (int *) ptr (str & ~3);
-  end = (int *) ptr (str + len);
-  do
-    {
-      int old = *start;
-      *start = (old << 24 | (old & 0xff00) << 8
-		| (old & 0xff0000) >> 8 | (old & 0xff000000) >> 24);
-      start++;
-    }
-  while (start < end);
-}
-
-/* Simulate a monitor trap, put the result into r0 and errno into r1 */
-
-static void
-trap (i, regs, memory, maskl, maskw, endianw)
-     int i;
-     int *regs;
-     unsigned char *memory;
-{
-  switch (i)
-    {
-    case 1:
-      printf ("%c", regs[0]);
-      break;
-    case 2:
-      raise_exception (SIGQUIT);
-      break;
-    case 3:			/* FIXME: for backwards compat, should be removed */
-    case 34:
-      {
-	extern int errno;
-	int perrno = errno;
-	errno = 0;
-
-	switch (regs[4])
-	  {
-
-#if !defined(__GO32__) && !defined(_WIN32)
-	  case SYS_fork:
-	    regs[0] = fork ();
-	    break;
-/* This would work only if endianness matched between host and target.
-   Besides, it's quite dangerous.  */
-#if 0
-	  case SYS_execve:
-	    regs[0] = execve (ptr (regs[5]), (char **)ptr (regs[6]), (char **)ptr (regs[7]));
-	    break;
-	  case SYS_execv:
-	    regs[0] = execve (ptr (regs[5]),(char **) ptr (regs[6]), 0);
-	    break;
-#endif
-	  case SYS_pipe:
-	    {
-	      regs[0] = (BUSERROR (regs[5], maskl)
-			 ? -EINVAL
-			 : pipe ((int *) ptr (regs[5])));
-	    }
-	    break;
-
-	  case SYS_wait:
-	    regs[0] = wait (ptr (regs[5]));
-	    break;
-#endif /* !defined(__GO32__) && !defined(_WIN32) */
-
-	  case SYS_read:
-	    strnswap (regs[6], regs[7]);
-	    regs[0]
-	      = callback->read (callback, regs[5], ptr (regs[6]), regs[7]);
-	    strnswap (regs[6], regs[7]);
-	    break;
-	  case SYS_write:
-	    strnswap (regs[6], regs[7]);
-	    if (regs[5] == 1)
-	      regs[0] = (int)callback->write_stdout (callback, ptr(regs[6]), regs[7]);
-	    else
-	      regs[0] = (int)callback->write (callback, regs[5], ptr (regs[6]), regs[7]);
-	    strnswap (regs[6], regs[7]);
-	    break;
-	  case SYS_lseek:
-	    regs[0] = callback->lseek (callback,regs[5], regs[6], regs[7]);
-	    break;
-	  case SYS_close:
-	    regs[0] = callback->close (callback,regs[5]);
-	    break;
-	  case SYS_open:
-	    {
-	      int len = strswaplen (regs[5]);
-	      strnswap (regs[5], len);
-	      regs[0] = callback->open (callback,ptr (regs[5]), regs[6]);
-	      strnswap (regs[5], len);
-	      break;
-	    }
-	  case SYS_exit:
-	    /* EXIT - caller can look in r5 to work out the reason */
-	    raise_exception (SIGQUIT);
-	    regs[0] = regs[5];
-	    break;
-
-	  case SYS_stat:	/* added at hmsi */
-	    /* stat system call */
-	    {
-	      struct stat host_stat;
-	      int buf;
-	      int len = strswaplen (regs[5]);
-
-	      strnswap (regs[5], len);
-	      regs[0] = stat (ptr (regs[5]), &host_stat);
-	      strnswap (regs[5], len);
-
-	      buf = regs[6];
-
-	      WWAT (buf, host_stat.st_dev);
-	      buf += 2;
-	      WWAT (buf, host_stat.st_ino);
-	      buf += 2;
-	      WLAT (buf, host_stat.st_mode);
-	      buf += 4;
-	      WWAT (buf, host_stat.st_nlink);
-	      buf += 2;
-	      WWAT (buf, host_stat.st_uid);
-	      buf += 2;
-	      WWAT (buf, host_stat.st_gid);
-	      buf += 2;
-	      WWAT (buf, host_stat.st_rdev);
-	      buf += 2;
-	      WLAT (buf, host_stat.st_size);
-	      buf += 4;
-	      WLAT (buf, host_stat.st_atime);
-	      buf += 4;
-	      WLAT (buf, 0);
-	      buf += 4;
-	      WLAT (buf, host_stat.st_mtime);
-	      buf += 4;
-	      WLAT (buf, 0);
-	      buf += 4;
-	      WLAT (buf, host_stat.st_ctime);
-	      buf += 4;
-	      WLAT (buf, 0);
-	      buf += 4;
-	      WLAT (buf, 0);
-	      buf += 4;
-	      WLAT (buf, 0);
-	      buf += 4;
-	    }
-	    break;
-
-#ifndef _WIN32
-	  case SYS_chown:
-	    {
-	      int len = strswaplen (regs[5]);
-
-	      strnswap (regs[5], len);
-	      regs[0] = chown (ptr (regs[5]), regs[6], regs[7]);
-	      strnswap (regs[5], len);
-	      break;
-	    }
-#endif /* _WIN32 */
-	  case SYS_chmod:
-	    {
-	      int len = strswaplen (regs[5]);
-
-	      strnswap (regs[5], len);
-	      regs[0] = chmod (ptr (regs[5]), regs[6]);
-	      strnswap (regs[5], len);
-	      break;
-	    }
-	  case SYS_utime:
-	    {
-	      /* Cast the second argument to void *, to avoid type mismatch
-		 if a prototype is present.  */
-	      int len = strswaplen (regs[5]);
-
-	      strnswap (regs[5], len);
-	      regs[0] = utime (ptr (regs[5]), (void *) ptr (regs[6]));
-	      strnswap (regs[5], len);
-	      break;
-	    }
-	  case SYS_argc:
-	    regs[0] = count_argc (prog_argv);
-	    break;
-	  case SYS_argnlen:
-	    if (regs[5] < count_argc (prog_argv))
-	      regs[0] = strlen (prog_argv[regs[5]]);
-	    else
-	      regs[0] = -1;
-	    break;
-	  case SYS_argn:
-	    if (regs[5] < count_argc (prog_argv))
-	      {
-		/* Include the termination byte.  */
-		int i = strlen (prog_argv[regs[5]]) + 1;
-		regs[0] = sim_write (0, regs[6], prog_argv[regs[5]], i);
-	      }
-	    else
-	      regs[0] = -1;
-	    break;
-	  case SYS_time:
-	    regs[0] = get_now ();
-	    break;
-	  default:
-	    regs[0] = -1;
-	    break;
-	  }
-	regs[1] = callback->get_errno (callback);
-	errno = perrno;
-      }
-      break;
-
-    case 0xc3:
-    case 255:
-      raise_exception (SIGTRAP);
-      break;
-    }
-
-}
-
-void
-control_c (sig, code, scp, addr)
-     int sig;
-     int code;
-     char *scp;
-     char *addr;
-{
-  raise_exception (SIGINT);
-}
-
-static int
-div1 (R, iRn2, iRn1/*, T*/)
-     int *R;
-     int iRn1;
-     int iRn2;
-     /* int T;*/
-{
-  unsigned long tmp0;
-  unsigned char old_q, tmp1;
-
-  old_q = Q;
-  SET_SR_Q ((unsigned char) ((0x80000000 & R[iRn1]) != 0));
-  R[iRn1] <<= 1;
-  R[iRn1] |= (unsigned long) T;
-
-  switch (old_q)
-    {
-    case 0:
-      switch (M)
-	{
-	case 0:
-	  tmp0 = R[iRn1];
-	  R[iRn1] -= R[iRn2];
-	  tmp1 = (R[iRn1] > tmp0);
-	  switch (Q)
-	    {
-	    case 0:
-	      SET_SR_Q (tmp1);
-	      break;
-	    case 1:
-	      SET_SR_Q ((unsigned char) (tmp1 == 0));
-	      break;
-	    }
-	  break;
-	case 1:
-	  tmp0 = R[iRn1];
-	  R[iRn1] += R[iRn2];
-	  tmp1 = (R[iRn1] < tmp0);
-	  switch (Q)
-	    {
-	    case 0:
-	      SET_SR_Q ((unsigned char) (tmp1 == 0));
-	      break;
-	    case 1:
-	      SET_SR_Q (tmp1);
-	      break;
-	    }
-	  break;
-	}
-      break;
-    case 1:
-      switch (M)
-	{
-	case 0:
-	  tmp0 = R[iRn1];
-	  R[iRn1] += R[iRn2];
-	  tmp1 = (R[iRn1] < tmp0);
-	  switch (Q)
-	    {
-	    case 0:
-	      SET_SR_Q (tmp1);
-	      break;
-	    case 1:
-	      SET_SR_Q ((unsigned char) (tmp1 == 0));
-	      break;
-	    }
-	  break;
-	case 1:
-	  tmp0 = R[iRn1];
-	  R[iRn1] -= R[iRn2];
-	  tmp1 = (R[iRn1] > tmp0);
-	  switch (Q)
-	    {
-	    case 0:
-	      SET_SR_Q ((unsigned char) (tmp1 == 0));
-	      break;
-	    case 1:
-	      SET_SR_Q (tmp1);
-	      break;
-	    }
-	  break;
-	}
-      break;
-    }
-  /*T = (Q == M);*/
-  SET_SR_T (Q == M);
-  /*return T;*/
-}
-
-static void
-dmul (sign, rm, rn)
-     int sign;
-     unsigned int rm;
-     unsigned int rn;
-{
-  unsigned long RnL, RnH;
-  unsigned long RmL, RmH;
-  unsigned long temp0, temp1, temp2, temp3;
-  unsigned long Res2, Res1, Res0;
-
-  RnL = rn & 0xffff;
-  RnH = (rn >> 16) & 0xffff;
-  RmL = rm & 0xffff;
-  RmH = (rm >> 16) & 0xffff;
-  temp0 = RmL * RnL;
-  temp1 = RmH * RnL;
-  temp2 = RmL * RnH;
-  temp3 = RmH * RnH;
-  Res2 = 0;
-  Res1 = temp1 + temp2;
-  if (Res1 < temp1)
-    Res2 += 0x00010000;
-  temp1 = (Res1 << 16) & 0xffff0000;
-  Res0 = temp0 + temp1;
-  if (Res0 < temp0)
-    Res2 += 1;
-  Res2 += ((Res1 >> 16) & 0xffff) + temp3;
-  
-  if (sign)
-    {
-      if (rn & 0x80000000)
-	Res2 -= rm;
-      if (rm & 0x80000000)
-	Res2 -= rn;
-    }
-
-  MACH = Res2;
-  MACL = Res0;
-}
-
-static void
-macw (regs, memory, n, m, endianw)
-     int *regs;
-     unsigned char *memory;
-     int m, n;
-     int endianw;
-{
-  long tempm, tempn;
-  long prod, macl, sum;
-
-  tempm=RSWAT(regs[m]); regs[m]+=2;
-  tempn=RSWAT(regs[n]); regs[n]+=2;
-
-  macl = MACL;
-  prod = (long)(short) tempm * (long)(short) tempn;
-  sum = prod + macl;
-  if (S)
-    {
-      if ((~(prod ^ macl) & (sum ^ prod)) < 0)
-	{
-	  /* MACH's lsb is a sticky overflow bit.  */
-	  MACH |= 1;
-	  /* Store the smallest negative number in MACL if prod is
-	     negative, and the largest positive number otherwise.  */
-	  sum = 0x7fffffff + (prod < 0);
-	}
-    }
-  else
-    {
-      long mach;
-      /* Add to MACH the sign extended product, and carry from low sum.  */
-      mach = MACH + (-(prod < 0)) + ((unsigned long) sum < prod);
-      /* Sign extend at 10:th bit in MACH.  */
-      MACH = (mach & 0x1ff) | -(mach & 0x200);
-    }
-  MACL = sum;
-}
-
-static struct loop_bounds
-get_loop_bounds (rs, re, memory, mem_end, maskw, endianw)
-     int rs, re;
-     unsigned char *memory, *mem_end;
-     int maskw, endianw;
-{
-  struct loop_bounds loop;
-
-  if (SR_RC)
-    {
-      if (RS >= RE)
-	{
-	  loop.start = PT2H (RE - 4);
-	  SKIP_INSN (loop.start);
-	  loop.end = loop.start;
-	  if (RS - RE == 0)
-	    SKIP_INSN (loop.end);
-	  if (RS - RE <= 2)
-	    SKIP_INSN (loop.end);
-	  SKIP_INSN (loop.end);
-	}
-      else
-	{
-	  loop.start = PT2H (RS);
-	  loop.end = PT2H (RE - 4);
-	  SKIP_INSN (loop.end);
-	  SKIP_INSN (loop.end);
-	  SKIP_INSN (loop.end);
-	  SKIP_INSN (loop.end);
-	}
-      if (loop.end >= mem_end)
-	loop.end = PT2H (0);
-    }
-  else
-    loop.end = PT2H (0);
-
-  return loop;
-}
-
-static void
-ppi_insn();
-
-#include "ppi.c"
-
-/* Set the memory size to the power of two provided. */
-
-void
-sim_size (power)
-     int power;
-
-{
-  saved_state.asregs.msize = 1 << power;
-
-  sim_memory_size = power;
-
-  if (saved_state.asregs.memory)
-    {
-      free (saved_state.asregs.memory);
-    }
-
-  saved_state.asregs.memory =
-    (unsigned char *) calloc (64, saved_state.asregs.msize / 64);
-
-  if (!saved_state.asregs.memory)
-    {
-      fprintf (stderr,
-	       "Not enough VM for simulation of %d bytes of RAM\n",
-	       saved_state.asregs.msize);
-
-      saved_state.asregs.msize = 1;
-      saved_state.asregs.memory = (unsigned char *) calloc (1, 1);
-    }
-}
-
-static void
-init_dsp (abfd)
-     struct _bfd *abfd;
-{
-  int was_dsp = target_dsp;
-  unsigned long mach = bfd_get_mach (abfd);
-
-  if (mach == bfd_mach_sh_dsp || mach == bfd_mach_sh3_dsp)
-    {
-      int ram_area_size, xram_start, yram_start;
-      int new_select;
-
-      target_dsp = 1;
-      if (mach == bfd_mach_sh_dsp)
-	{
-	  /* SH7410 (orig. sh-sdp):
-	     4KB each for X & Y memory;
-	     On-chip X RAM 0x0800f000-0x0800ffff
-	     On-chip Y RAM 0x0801f000-0x0801ffff  */
-	  xram_start = 0x0800f000;
-	  ram_area_size = 0x1000;
-	}
-      if (mach == bfd_mach_sh3_dsp)
-	{
-	  /* SH7612:
-	     8KB each for X & Y memory;
-	     On-chip X RAM 0x1000e000-0x1000ffff
-	     On-chip Y RAM 0x1001e000-0x1001ffff  */
-	  xram_start = 0x1000e000;
-	  ram_area_size = 0x2000;
-	}
-      yram_start = xram_start + 0x10000;
-      new_select = ~(ram_area_size - 1);
-      if (saved_state.asregs.xyram_select != new_select)
-	{
-	  saved_state.asregs.xyram_select = new_select;
-	  free (saved_state.asregs.xmem);
-	  free (saved_state.asregs.ymem);
-	  saved_state.asregs.xmem = (unsigned char *) calloc (1, ram_area_size);
-	  saved_state.asregs.ymem = (unsigned char *) calloc (1, ram_area_size);
-
-	  /* Disable use of X / Y mmeory if not allocated.  */
-	  if (! saved_state.asregs.xmem || ! saved_state.asregs.ymem)
-	    {
-	      saved_state.asregs.xyram_select = 0;
-	      if (saved_state.asregs.xmem)
-		free (saved_state.asregs.xmem);
-	      if (saved_state.asregs.ymem)
-		free (saved_state.asregs.ymem);
-	    }
-	}
-      saved_state.asregs.xram_start = xram_start;
-      saved_state.asregs.yram_start = yram_start;
-      saved_state.asregs.xmem_offset = saved_state.asregs.xmem - xram_start;
-      saved_state.asregs.ymem_offset = saved_state.asregs.ymem - yram_start;
-    }
-  else
-    {
-      target_dsp = 0;
-      if (saved_state.asregs.xyram_select)
-	{
-	  saved_state.asregs.xyram_select = 0;
-	  free (saved_state.asregs.xmem);
-	  free (saved_state.asregs.ymem);
-	}
-    }
-
-  if (! saved_state.asregs.xyram_select)
-    {
-      saved_state.asregs.xram_start = 1;
-      saved_state.asregs.yram_start = 1;
-    }
-
-  if (target_dsp != was_dsp)
-    {
-      int i, tmp;
-
-      for (i = sizeof sh_dsp_table - 1; i >= 0; i--)
-	{
-	  tmp = sh_jump_table[0xf000 + i];
-	  sh_jump_table[0xf000 + i] = sh_dsp_table[i];
-	  sh_dsp_table[i] = tmp;
-	}
-    }
-}
-
-static void
-init_pointers ()
-{
-  host_little_endian = 0;
-  *(char*)&host_little_endian = 1;
-  host_little_endian &= 1;
-
-  if (saved_state.asregs.msize != 1 << sim_memory_size)
-    {
-      sim_size (sim_memory_size);
-    }
-
-  if (saved_state.asregs.profile && !profile_file)
-    {
-      profile_file = fopen ("gmon.out", "wb");
-      /* Seek to where to put the call arc data */
-      nsamples = (1 << sim_profile_size);
-
-      fseek (profile_file, nsamples * 2 + 12, 0);
-
-      if (!profile_file)
-	{
-	  fprintf (stderr, "Can't open gmon.out\n");
-	}
-      else
-	{
-	  saved_state.asregs.profile_hist =
-	    (unsigned short *) calloc (64, (nsamples * sizeof (short) / 64));
-	}
-    }
-}
-
-static void
-dump_profile ()
-{
-  unsigned int minpc;
-  unsigned int maxpc;
-  unsigned short *p;
-  int i;
-
-  p = saved_state.asregs.profile_hist;
-  minpc = 0;
-  maxpc = (1 << sim_profile_size);
-
-  fseek (profile_file, 0L, 0);
-  swapout (minpc << PROFILE_SHIFT);
-  swapout (maxpc << PROFILE_SHIFT);
-  swapout (nsamples * 2 + 12);
-  for (i = 0; i < nsamples; i++)
-    swapout16 (saved_state.asregs.profile_hist[i]);
-
-}
-
-static void
-gotcall (from, to)
-     int from;
-     int to;
-{
-  swapout (from);
-  swapout (to);
-  swapout (1);
-}
-
-#define MMASKB ((saved_state.asregs.msize -1) & ~0)
-
-int
-sim_stop (sd)
-     SIM_DESC sd;
-{
-  raise_exception (SIGINT);
-  return 1;
-}
-
-void
-sim_resume (sd, step, siggnal)
-     SIM_DESC sd;
-     int step, siggnal;
-{
-  register unsigned char *insn_ptr;
-  unsigned char *mem_end;
-  struct loop_bounds loop;
-  register int cycles = 0;
-  register int stalls = 0;
-  register int memstalls = 0;
-  register int insts = 0;
-  register int prevlock;
-  register int thislock;
-  register unsigned int doprofile;
-  register int pollcount = 0;
-  /* endianw is used for every insn fetch, hence it makes sense to cache it.
-     endianb is used less often.  */
-  register int endianw = global_endianw;
-
-  int tick_start = get_now ();
-  void (*prev) ();
-  void (*prev_fpe) ();
-
-  register unsigned char *jump_table = sh_jump_table;
-
-  register int *R = &(saved_state.asregs.regs[0]);
-  /*register int T;*/
-#ifndef PR
-  register int PR;
-#endif
-
-  register int maskb = ~((saved_state.asregs.msize - 1) & ~0);
-  register int maskw = ~((saved_state.asregs.msize - 1) & ~1);
-  register int maskl = ~((saved_state.asregs.msize - 1) & ~3);
-  register unsigned char *memory;
-  register unsigned int sbit = ((unsigned int) 1 << 31);
-
-  prev = signal (SIGINT, control_c);
-  prev_fpe = signal (SIGFPE, SIG_IGN);
-
-  init_pointers ();
-  saved_state.asregs.exception = 0;
-
-  memory = saved_state.asregs.memory;
-  mem_end = memory + saved_state.asregs.msize;
-
-  loop = get_loop_bounds (RS, RE, memory, mem_end, maskw, endianw);
-  insn_ptr = PT2H (saved_state.asregs.pc);
-  CHECK_INSN_PTR (insn_ptr);
-
-#ifndef PR
-  PR = saved_state.asregs.sregs.named.pr;
-#endif
-  /*T = GET_SR () & SR_MASK_T;*/
-  prevlock = saved_state.asregs.prevlock;
-  thislock = saved_state.asregs.thislock;
-  doprofile = saved_state.asregs.profile;
-
-  /* If profiling not enabled, disable it by asking for
-     profiles infrequently. */
-  if (doprofile == 0)
-    doprofile = ~0;
-
- loop:
-  if (step && insn_ptr < saved_state.asregs.insn_end)
-    {
-      if (saved_state.asregs.exception)
-	/* This can happen if we've already been single-stepping and
-	   encountered a loop end.  */
-	saved_state.asregs.insn_end = insn_ptr;
-      else
-	{
-	  saved_state.asregs.exception = SIGTRAP;
-	  saved_state.asregs.insn_end = insn_ptr + 2;
-	}
-    }
-
-  while (insn_ptr < saved_state.asregs.insn_end)
-    {
-      register unsigned int iword = RIAT (insn_ptr);
-      register unsigned int ult;
-      register unsigned char *nip = insn_ptr + 2;
-
-#ifndef ACE_FAST
-      insts++;
-#endif
-    top:
-
-#include "code.c"
-
-
-      insn_ptr = nip;
-
-      if (--pollcount < 0)
-	{
-	  pollcount = POLL_QUIT_INTERVAL;
-	  if ((*callback->poll_quit) != NULL
-	      && (*callback->poll_quit) (callback))
-	    {
-	      sim_stop (sd);
-	    }	    
-	}
-
-#ifndef ACE_FAST
-      prevlock = thislock;
-      thislock = 30;
-      cycles++;
-
-      if (cycles >= doprofile)
-	{
-
-	  saved_state.asregs.cycles += doprofile;
-	  cycles -= doprofile;
-	  if (saved_state.asregs.profile_hist)
-	    {
-	      int n = PH2T (insn_ptr) >> PROFILE_SHIFT;
-	      if (n < nsamples)
-		{
-		  int i = saved_state.asregs.profile_hist[n];
-		  if (i < 65000)
-		    saved_state.asregs.profile_hist[n] = i + 1;
-		}
-
-	    }
-	}
-#endif
-    }
-  if (saved_state.asregs.insn_end == loop.end)
-    {
-      saved_state.asregs.cregs.named.sr += SR_RC_INCREMENT;
-      if (SR_RC)
-	insn_ptr = loop.start;
-      else
-	{
-	  saved_state.asregs.insn_end = mem_end;
-	  loop.end = PT2H (0);
-	}
-      goto loop;
-    }
-
-  if (saved_state.asregs.exception == SIGILL
-      || saved_state.asregs.exception == SIGBUS)
-    {
-      insn_ptr -= 2;
-    }
-  /* Check for SIGBUS due to insn fetch.  */
-  else if (! saved_state.asregs.exception)
-    saved_state.asregs.exception = SIGBUS;
-
-  saved_state.asregs.ticks += get_now () - tick_start;
-  saved_state.asregs.cycles += cycles;
-  saved_state.asregs.stalls += stalls;
-  saved_state.asregs.memstalls += memstalls;
-  saved_state.asregs.insts += insts;
-  saved_state.asregs.pc = PH2T (insn_ptr);
-#ifndef PR
-  saved_state.asregs.sregs.named.pr = PR;
-#endif
-
-  saved_state.asregs.prevlock = prevlock;
-  saved_state.asregs.thislock = thislock;
-
-  if (profile_file)
-    {
-      dump_profile ();
-    }
-
-  signal (SIGFPE, prev_fpe);
-  signal (SIGINT, prev);
-}
-
-int
-sim_write (sd, addr, buffer, size)
-     SIM_DESC sd;
-     SIM_ADDR addr;
-     unsigned char *buffer;
-     int size;
-{
-  int i;
-
-  init_pointers ();
-
-  for (i = 0; i < size; i++)
-    {
-      saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb] = buffer[i];
-    }
-  return size;
-}
-
-int
-sim_read (sd, addr, buffer, size)
-     SIM_DESC sd;
-     SIM_ADDR addr;
-     unsigned char *buffer;
-     int size;
-{
-  int i;
-
-  init_pointers ();
-
-  for (i = 0; i < size; i++)
-    {
-      buffer[i] = saved_state.asregs.memory[(MMASKB & (addr + i)) ^ endianb];
-    }
-  return size;
-}
-
-int
-sim_store_register (sd, rn, memory, length)
-     SIM_DESC sd;
-     int rn;
-     unsigned char *memory;
-     int length;
-{
-  unsigned val;
-
-  init_pointers ();
-  val = swap (* (int *)memory);
-  switch (rn)
-    {
-    case SIM_SH_R0_REGNUM: case SIM_SH_R1_REGNUM: case SIM_SH_R2_REGNUM:
-    case SIM_SH_R3_REGNUM: case SIM_SH_R4_REGNUM: case SIM_SH_R5_REGNUM:
-    case SIM_SH_R6_REGNUM: case SIM_SH_R7_REGNUM: case SIM_SH_R8_REGNUM:
-    case SIM_SH_R9_REGNUM: case SIM_SH_R10_REGNUM: case SIM_SH_R11_REGNUM:
-    case SIM_SH_R12_REGNUM: case SIM_SH_R13_REGNUM: case SIM_SH_R14_REGNUM:
-    case SIM_SH_R15_REGNUM:
-      saved_state.asregs.regs[rn] = val;
-      break;
-    case SIM_SH_PC_REGNUM:
-      saved_state.asregs.pc = val;
-      break;
-    case SIM_SH_PR_REGNUM:
-      PR = val;
-      break;
-    case SIM_SH_GBR_REGNUM:
-      GBR = val;
-      break;
-    case SIM_SH_VBR_REGNUM:
-      VBR = val;
-      break;
-    case SIM_SH_MACH_REGNUM:
-      MACH = val;
-      break;
-    case SIM_SH_MACL_REGNUM:
-      MACL = val;
-      break;
-    case SIM_SH_SR_REGNUM:
-      SET_SR (val);
-      break;
-    case SIM_SH_FPUL_REGNUM:
-      FPUL = val;
-      break;
-    case SIM_SH_FPSCR_REGNUM:
-      SET_FPSCR (val);
-      break;
-    case SIM_SH_FR0_REGNUM: case SIM_SH_FR1_REGNUM: case SIM_SH_FR2_REGNUM:
-    case SIM_SH_FR3_REGNUM: case SIM_SH_FR4_REGNUM: case SIM_SH_FR5_REGNUM:
-    case SIM_SH_FR6_REGNUM: case SIM_SH_FR7_REGNUM: case SIM_SH_FR8_REGNUM:
-    case SIM_SH_FR9_REGNUM: case SIM_SH_FR10_REGNUM: case SIM_SH_FR11_REGNUM:
-    case SIM_SH_FR12_REGNUM: case SIM_SH_FR13_REGNUM: case SIM_SH_FR14_REGNUM:
-    case SIM_SH_FR15_REGNUM:
-      SET_FI (rn - SIM_SH_FR0_REGNUM, val);
-      break;
-    case SIM_SH_DSR_REGNUM:
-      DSR = val;
-      break;
-    case SIM_SH_A0G_REGNUM:
-      A0G = val;
-      break;
-    case SIM_SH_A0_REGNUM:
-      A0 = val;
-      break;
-    case SIM_SH_A1G_REGNUM:
-      A1G = val;
-      break;
-    case SIM_SH_A1_REGNUM:
-      A1 = val;
-      break;
-    case SIM_SH_M0_REGNUM:
-      M0 = val;
-      break;
-    case SIM_SH_M1_REGNUM:
-      M1 = val;
-      break;
-    case SIM_SH_X0_REGNUM:
-      X0 = val;
-      break;
-    case SIM_SH_X1_REGNUM:
-      X1 = val;
-      break;
-    case SIM_SH_Y0_REGNUM:
-      Y0 = val;
-      break;
-    case SIM_SH_Y1_REGNUM:
-      Y1 = val;
-      break;
-    case SIM_SH_MOD_REGNUM:
-      SET_MOD (val);
-      break;
-    case SIM_SH_RS_REGNUM:
-      RS = val;
-      break;
-    case SIM_SH_RE_REGNUM:
-      RE = val;
-      break;
-    case SIM_SH_SSR_REGNUM:
-      SSR = val;
-      break;
-    case SIM_SH_SPC_REGNUM:
-      SPC = val;
-      break;
-    /* The rn_bank idiosyncracies are not due to hardware differences, but to
-       a weird aliasing naming scheme for sh3 / sh3e / sh4.  */
-    case SIM_SH_R0_BANK0_REGNUM: case SIM_SH_R1_BANK0_REGNUM:
-    case SIM_SH_R2_BANK0_REGNUM: case SIM_SH_R3_BANK0_REGNUM:
-    case SIM_SH_R4_BANK0_REGNUM: case SIM_SH_R5_BANK0_REGNUM:
-    case SIM_SH_R6_BANK0_REGNUM: case SIM_SH_R7_BANK0_REGNUM:
-      if (SR_MD && SR_RB)
-	Rn_BANK (rn - SIM_SH_R0_BANK0_REGNUM) = val;
-      else
-	saved_state.asregs.regs[rn - SIM_SH_R0_BANK0_REGNUM] = val;
-      break;
-    case SIM_SH_R0_BANK1_REGNUM: case SIM_SH_R1_BANK1_REGNUM:
-    case SIM_SH_R2_BANK1_REGNUM: case SIM_SH_R3_BANK1_REGNUM:
-    case SIM_SH_R4_BANK1_REGNUM: case SIM_SH_R5_BANK1_REGNUM:
-    case SIM_SH_R6_BANK1_REGNUM: case SIM_SH_R7_BANK1_REGNUM:
-      if (SR_MD && SR_RB)
-	saved_state.asregs.regs[rn - SIM_SH_R0_BANK1_REGNUM] = val;
-      else
-	Rn_BANK (rn - SIM_SH_R0_BANK1_REGNUM) = val;
-      break;
-    case SIM_SH_R0_BANK_REGNUM: case SIM_SH_R1_BANK_REGNUM:
-    case SIM_SH_R2_BANK_REGNUM: case SIM_SH_R3_BANK_REGNUM:
-    case SIM_SH_R4_BANK_REGNUM: case SIM_SH_R5_BANK_REGNUM:
-    case SIM_SH_R6_BANK_REGNUM: case SIM_SH_R7_BANK_REGNUM:
-      SET_Rn_BANK (rn - SIM_SH_R0_BANK_REGNUM, val);
-      break;
-    default:
-      return 0;
-    }
-  return -1;
-}
-
-int
-sim_fetch_register (sd, rn, memory, length)
-     SIM_DESC sd;
-     int rn;
-     unsigned char *memory;
-     int length;
-{
-  int val;
-
-  init_pointers ();
-  switch (rn)
-    {
-    case SIM_SH_R0_REGNUM: case SIM_SH_R1_REGNUM: case SIM_SH_R2_REGNUM:
-    case SIM_SH_R3_REGNUM: case SIM_SH_R4_REGNUM: case SIM_SH_R5_REGNUM:
-    case SIM_SH_R6_REGNUM: case SIM_SH_R7_REGNUM: case SIM_SH_R8_REGNUM:
-    case SIM_SH_R9_REGNUM: case SIM_SH_R10_REGNUM: case SIM_SH_R11_REGNUM:
-    case SIM_SH_R12_REGNUM: case SIM_SH_R13_REGNUM: case SIM_SH_R14_REGNUM:
-    case SIM_SH_R15_REGNUM:
-      val = saved_state.asregs.regs[rn];
-      break;
-    case SIM_SH_PC_REGNUM:
-      val = saved_state.asregs.pc;
-      break;
-    case SIM_SH_PR_REGNUM:
-      val = PR;
-      break;
-    case SIM_SH_GBR_REGNUM:
-      val = GBR;
-      break;
-    case SIM_SH_VBR_REGNUM:
-      val = VBR;
-      break;
-    case SIM_SH_MACH_REGNUM:
-      val = MACH;
-      break;
-    case SIM_SH_MACL_REGNUM:
-      val = MACL;
-      break;
-    case SIM_SH_SR_REGNUM:
-      val = GET_SR ();
-      break;
-    case SIM_SH_FPUL_REGNUM:
-      val = FPUL;
-      break;
-    case SIM_SH_FPSCR_REGNUM:
-      val = GET_FPSCR ();
-      break;
-    case SIM_SH_FR0_REGNUM: case SIM_SH_FR1_REGNUM: case SIM_SH_FR2_REGNUM:
-    case SIM_SH_FR3_REGNUM: case SIM_SH_FR4_REGNUM: case SIM_SH_FR5_REGNUM:
-    case SIM_SH_FR6_REGNUM: case SIM_SH_FR7_REGNUM: case SIM_SH_FR8_REGNUM:
-    case SIM_SH_FR9_REGNUM: case SIM_SH_FR10_REGNUM: case SIM_SH_FR11_REGNUM:
-    case SIM_SH_FR12_REGNUM: case SIM_SH_FR13_REGNUM: case SIM_SH_FR14_REGNUM:
-    case SIM_SH_FR15_REGNUM:
-      val = FI (rn - SIM_SH_FR0_REGNUM);
-      break;
-    case SIM_SH_DSR_REGNUM:
-      val = DSR;
-      break;
-    case SIM_SH_A0G_REGNUM:
-      val = SEXT (A0G);
-      break;
-    case SIM_SH_A0_REGNUM:
-      val = A0;
-      break;
-    case SIM_SH_A1G_REGNUM:
-      val = SEXT (A1G);
-      break;
-    case SIM_SH_A1_REGNUM:
-      val = A1;
-      break;
-    case SIM_SH_M0_REGNUM:
-      val = M0;
-      break;
-    case SIM_SH_M1_REGNUM:
-      val = M1;
-      break;
-    case SIM_SH_X0_REGNUM:
-      val = X0;
-      break;
-    case SIM_SH_X1_REGNUM:
-      val = X1;
-      break;
-    case SIM_SH_Y0_REGNUM:
-      val = Y0;
-      break;
-    case SIM_SH_Y1_REGNUM:
-      val = Y1;
-      break;
-    case SIM_SH_MOD_REGNUM:
-      val = MOD;
-      break;
-    case SIM_SH_RS_REGNUM:
-      val = RS;
-      break;
-    case SIM_SH_RE_REGNUM:
-      val = RE;
-      break;
-    case SIM_SH_SSR_REGNUM:
-      val = SSR;
-      break;
-    case SIM_SH_SPC_REGNUM:
-      val = SPC;
-      break;
-    /* The rn_bank idiosyncracies are not due to hardware differences, but to
-       a weird aliasing naming scheme for sh3 / sh3e / sh4.  */
-    case SIM_SH_R0_BANK0_REGNUM: case SIM_SH_R1_BANK0_REGNUM:
-    case SIM_SH_R2_BANK0_REGNUM: case SIM_SH_R3_BANK0_REGNUM:
-    case SIM_SH_R4_BANK0_REGNUM: case SIM_SH_R5_BANK0_REGNUM:
-    case SIM_SH_R6_BANK0_REGNUM: case SIM_SH_R7_BANK0_REGNUM:
-      val = (SR_MD && SR_RB
-	     ? Rn_BANK (rn - SIM_SH_R0_BANK0_REGNUM)
-	     : saved_state.asregs.regs[rn - SIM_SH_R0_BANK0_REGNUM]);
-      break;
-    case SIM_SH_R0_BANK1_REGNUM: case SIM_SH_R1_BANK1_REGNUM:
-    case SIM_SH_R2_BANK1_REGNUM: case SIM_SH_R3_BANK1_REGNUM:
-    case SIM_SH_R4_BANK1_REGNUM: case SIM_SH_R5_BANK1_REGNUM:
-    case SIM_SH_R6_BANK1_REGNUM: case SIM_SH_R7_BANK1_REGNUM:
-      val = (! SR_MD || ! SR_RB
-	     ? Rn_BANK (rn - SIM_SH_R0_BANK1_REGNUM)
-	     : saved_state.asregs.regs[rn - SIM_SH_R0_BANK1_REGNUM]);
-      break;
-    case SIM_SH_R0_BANK_REGNUM: case SIM_SH_R1_BANK_REGNUM:
-    case SIM_SH_R2_BANK_REGNUM: case SIM_SH_R3_BANK_REGNUM:
-    case SIM_SH_R4_BANK_REGNUM: case SIM_SH_R5_BANK_REGNUM:
-    case SIM_SH_R6_BANK_REGNUM: case SIM_SH_R7_BANK_REGNUM:
-      val = Rn_BANK (rn - SIM_SH_R0_BANK_REGNUM);
-      break;
-    default:
-      return 0;
-    }
-  * (int *) memory = swap (val);
-  return -1;
-}
-
-int
-sim_trace (sd)
-     SIM_DESC sd;
-{
-  return 0;
-}
-
-void
-sim_stop_reason (sd, reason, sigrc)
-     SIM_DESC sd;
-     enum sim_stop *reason;
-     int *sigrc;
-{
-  /* The SH simulator uses SIGQUIT to indicate that the program has
-     exited, so we must check for it here and translate it to exit.  */
-  if (saved_state.asregs.exception == SIGQUIT)
-    {
-      *reason = sim_exited;
-      *sigrc = saved_state.asregs.regs[5];
-    }
-  else
-    {
-      *reason = sim_stopped;
-      *sigrc = saved_state.asregs.exception;
-    }
-}
-
-void
-sim_info (sd, verbose)
-     SIM_DESC sd;
-     int verbose;
-{
-  double timetaken = (double) saved_state.asregs.ticks / (double) now_persec ();
-  double virttime = saved_state.asregs.cycles / 36.0e6;
-
-  callback->printf_filtered (callback, "\n\n# instructions executed  %10d\n", 
-			     saved_state.asregs.insts);
-  callback->printf_filtered (callback, "# cycles                 %10d\n",
-			     saved_state.asregs.cycles);
-  callback->printf_filtered (callback, "# pipeline stalls        %10d\n",
-			     saved_state.asregs.stalls);
-  callback->printf_filtered (callback, "# misaligned load/store  %10d\n",
-			     saved_state.asregs.memstalls);
-  callback->printf_filtered (callback, "# real time taken        %10.4f\n",
-			     timetaken);
-  callback->printf_filtered (callback, "# virtual time taken     %10.4f\n",
-			     virttime);
-  callback->printf_filtered (callback, "# profiling size         %10d\n",
-			     sim_profile_size);
-  callback->printf_filtered (callback, "# profiling frequency    %10d\n",
-			     saved_state.asregs.profile);
-  callback->printf_filtered (callback, "# profile maxpc          %10x\n",
-			     (1 << sim_profile_size) << PROFILE_SHIFT);
-
-  if (timetaken != 0)
-    {
-      callback->printf_filtered (callback, "# cycles/second          %10d\n", 
-				 (int) (saved_state.asregs.cycles / timetaken));
-      callback->printf_filtered (callback, "# simulation ratio       %10.4f\n", 
-				 virttime / timetaken);
-    }
-}
-
-void
-sim_set_profile (n)
-     int n;
-{
-  saved_state.asregs.profile = n;
-}
-
-void
-sim_set_profile_size (n)
-     int n;
-{
-  sim_profile_size = n;
-}
-
-SIM_DESC
-sim_open (kind, cb, abfd, argv)
-     SIM_OPEN_KIND kind;
-     host_callback *cb;
-     struct _bfd *abfd;
-     char **argv;
-{
-  char **p;
-  int endian_set = 0;
-  int i;
-  union
-    {
-      int i;
-      short s[2];
-      char c[4];
-    }
-  mem_word;
-
-  sim_kind = kind;
-  myname = argv[0];
-  callback = cb;
-
-  for (p = argv + 1; *p != NULL; ++p)
-    {
-      if (strcmp (*p, "-E") == 0)
-	{
-	  ++p;
-	  if (*p == NULL)
-	    {
-	      /* FIXME: This doesn't use stderr, but then the rest of the
-		 file doesn't either.  */
-	      callback->printf_filtered (callback, "Missing argument to `-E'.\n");
-	      return 0;
-	    }
-	  target_little_endian = strcmp (*p, "big") != 0;
-          endian_set = 1;
-	}
-      else if (isdigit (**p))
-	parse_and_set_memory_size (*p);
-    }
-
-  if (abfd != NULL && ! endian_set)
-      target_little_endian = ! bfd_big_endian (abfd);
-
-  if (abfd)
-    init_dsp (abfd);
-
-  for (i = 4; (i -= 2) >= 0; )
-    mem_word.s[i >> 1] = i;
-  global_endianw = mem_word.i >> (target_little_endian ? 0 : 16) & 0xffff;
-
-  for (i = 4; --i >= 0; )
-    mem_word.c[i] = i;
-  endianb = mem_word.i >> (target_little_endian ? 0 : 24) & 0xff;
-
-  /* fudge our descriptor for now */
-  return (SIM_DESC) 1;
-}
-
-static void
-parse_and_set_memory_size (str)
-     char *str;
-{
-  int n;
-
-  n = strtol (str, NULL, 10);
-  if (n > 0 && n <= 24)
-    sim_memory_size = n;
-  else
-    callback->printf_filtered (callback, "Bad memory size %d; must be 1 to 24, inclusive\n", n);
-}
-
-void
-sim_close (sd, quitting)
-     SIM_DESC sd;
-     int quitting;
-{
-  /* nothing to do */
-}
-
-SIM_RC
-sim_load (sd, prog, abfd, from_tty)
-     SIM_DESC sd;
-     char *prog;
-     bfd *abfd;
-     int from_tty;
-{
-  extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
-  bfd *prog_bfd;
-
-  prog_bfd = sim_load_file (sd, myname, callback, prog, abfd,
-			    sim_kind == SIM_OPEN_DEBUG,
-			    0, sim_write);
-  if (prog_bfd == NULL)
-    return SIM_RC_FAIL;
-  if (abfd == NULL)
-    bfd_close (prog_bfd);
-  return SIM_RC_OK;
-}
-
-SIM_RC
-sim_create_inferior (sd, prog_bfd, argv, env)
-     SIM_DESC sd;
-     struct _bfd *prog_bfd;
-     char **argv;
-     char **env;
-{
-  /* Clear the registers. */
-  memset (&saved_state, 0,
-	  (char*)&saved_state.asregs.end_of_registers - (char*)&saved_state);
-
-  /* Set the PC.  */
-  if (prog_bfd != NULL)
-    saved_state.asregs.pc = bfd_get_start_address (prog_bfd);
-
-  /* Record the program's arguments. */
-  prog_argv = argv;
-
-  return SIM_RC_OK;
-}
-
-void
-sim_do_command (sd, cmd)
-     SIM_DESC sd;
-     char *cmd;
-{
-  char *sms_cmd = "set-memory-size";
-  int cmdsize;
-
-  if (cmd == NULL || *cmd == '\0')
-    {
-      cmd = "help";
-    }
-
-  cmdsize = strlen (sms_cmd);
-  if (strncmp (cmd, sms_cmd, cmdsize) == 0 && strchr (" \t", cmd[cmdsize]) != NULL)
-    {
-      parse_and_set_memory_size (cmd + cmdsize + 1);
-    }
-  else if (strcmp (cmd, "help") == 0)
-    {
-      (callback->printf_filtered) (callback, "List of SH simulator commands:\n\n");
-      (callback->printf_filtered) (callback, "set-memory-size <n> -- Set the number of address bits to use\n");
-      (callback->printf_filtered) (callback, "\n");
-    }
-  else
-    {
-      (callback->printf_filtered) (callback, "Error: \"%s\" is not a valid SH simulator command.\n", cmd);
-    }
-}
-
-void
-sim_set_callbacks (p)
-     host_callback *p;
-{
-  callback = p;
-}
author	nobody <>	2002-09-07 00:00:05 +0000
committer	nobody <>	2002-09-07 00:00:05 +0000
commit	c1aa2a27e755c883b5c49b223120dfb712ea4e28 (patch)
tree	a98633075cd1f2b034b49446e83e522708d11f68 /sim/sh/interp.c
parent	2e3c0e2427295c9cc09a8a707dfba38d50e2ba30 (diff)
download	gdb-sid-20020905-branch.zip gdb-sid-20020905-branch.tar.gz gdb-sid-20020905-branch.tar.bz2