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| author | Joel Brobecker <brobecker@adacore.com> | 2022-01-01 18:56:03 +0400 |
|---|---|---|
| committer | Joel Brobecker <brobecker@adacore.com> | 2022-01-01 19:13:23 +0400 |
| commit | 4a94e36819485cdbd50438f800d1e478156a4889 (patch) | |
| tree | 03138d65b74ebd8d129ed5de07ed54a741dcc4b2 /sim/riscv | |
| parent | dd10f20452c99cfb19ac9630de943ec0c1912142 (diff) | |
| download | gdb-4a94e36819485cdbd50438f800d1e478156a4889.zip gdb-4a94e36819485cdbd50438f800d1e478156a4889.tar.gz gdb-4a94e36819485cdbd50438f800d1e478156a4889.tar.bz2 | |
Automatic Copyright Year update after running gdb/copyright.py
This commit brings all the changes made by running gdb/copyright.py
as per GDB's Start of New Year Procedure.
For the avoidance of doubt, all changes in this commits were
performed by the script.
Diffstat (limited to 'sim/riscv')
| -rw-r--r-- | sim/riscv/Makefile.in | 2 | ||||
| -rw-r--r-- | sim/riscv/interp.c | 2 | ||||
| -rw-r--r-- | sim/riscv/machs.c | 2 | ||||
| -rw-r--r-- | sim/riscv/machs.h | 2 | ||||
| -rw-r--r-- | sim/riscv/sim-main.c | 2 | ||||
| -rw-r--r-- | sim/riscv/sim-main.h | 2 |
6 files changed, 6 insertions, 6 deletions
diff --git a/sim/riscv/Makefile.in b/sim/riscv/Makefile.in index b967654..9aa663b 100644 --- a/sim/riscv/Makefile.in +++ b/sim/riscv/Makefile.in @@ -1,5 +1,5 @@ # Makefile template for Configure for the example basic simulator. -# Copyright (C) 2005-2021 Free Software Foundation, Inc. +# Copyright (C) 2005-2022 Free Software Foundation, Inc. # Written by Mike Frysinger. # # This program is free software; you can redistribute it and/or modify diff --git a/sim/riscv/interp.c b/sim/riscv/interp.c index 13fe6c7..937dc56 100644 --- a/sim/riscv/interp.c +++ b/sim/riscv/interp.c @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2021 Free Software Foundation, Inc. + Copyright (C) 2005-2022 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/machs.c b/sim/riscv/machs.c index 339e5ba..ea099ed 100644 --- a/sim/riscv/machs.c +++ b/sim/riscv/machs.c @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2021 Free Software Foundation, Inc. + Copyright (C) 2005-2022 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/machs.h b/sim/riscv/machs.h index 903488b..8374c84 100644 --- a/sim/riscv/machs.h +++ b/sim/riscv/machs.h @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2021 Free Software Foundation, Inc. + Copyright (C) 2005-2022 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index d2d4cdd..7b672f6 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2021 Free Software Foundation, Inc. + Copyright (C) 2005-2022 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. diff --git a/sim/riscv/sim-main.h b/sim/riscv/sim-main.h index 1088e5b..d06ba97 100644 --- a/sim/riscv/sim-main.h +++ b/sim/riscv/sim-main.h @@ -1,6 +1,6 @@ /* RISC-V simulator. - Copyright (C) 2005-2021 Free Software Foundation, Inc. + Copyright (C) 2005-2022 Free Software Foundation, Inc. Contributed by Mike Frysinger. This file is part of simulators. |