aboutsummaryrefslogtreecommitdiff
path: root/sim/ppc
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@oarcorp.com>2014-11-23 07:11:39 +0400
committerJoel Brobecker <brobecker@adacore.com>2014-11-23 07:11:39 +0400
commit576054f170b1d1a2ab8c9473798193fcd5687c3a (patch)
tree4f7d5087cb38b186e3b670bca2b83de2bb18f712 /sim/ppc
parent8eec6289f850433e42349c1bffc8c1b7479717ae (diff)
downloadgdb-576054f170b1d1a2ab8c9473798193fcd5687c3a.zip
gdb-576054f170b1d1a2ab8c9473798193fcd5687c3a.tar.gz
gdb-576054f170b1d1a2ab8c9473798193fcd5687c3a.tar.bz2
sim/ppc/*: Change immediatly to immediately
sim/ppc/ChangeLog: * ChangeLog, ChangeLog.00, hw_com.c, ld-cache.h, ppc-instructions: Change immediatly to immediately.
Diffstat (limited to 'sim/ppc')
-rw-r--r--sim/ppc/ChangeLog7
-rw-r--r--sim/ppc/ChangeLog.002
-rw-r--r--sim/ppc/hw_com.c4
-rw-r--r--sim/ppc/ld-cache.h2
-rw-r--r--sim/ppc/ppc-instructions2
5 files changed, 11 insertions, 6 deletions
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog
index 4a48a81..fa628bb 100644
--- a/sim/ppc/ChangeLog
+++ b/sim/ppc/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-23 Joel Sherrill <joel.sherrill@oarcorp.com>
+
+ * ChangeLog, ChangeLog.00, hw_com.c, ld-cache.h, ppc-instructions:
+ Change immediatly to immediately.
+
2014-08-27 Joel Sherrill <joel.sherrill@oarcorp.com>
* basics.h, device.c, device.h, hw_htab.c, hw_memory.c:
@@ -3983,7 +3988,7 @@ Wed Jan 17 19:46:07 1996 Andrew Cagney <cagney@highland.com.au>
device tree load from file code.
* psim.c (psim_create): Dump device tree if enabled. If nump
- selected, exit psim immediatly.
+ selected, exit psim immediately.
Wed Jan 17 19:36:52 1996 Andrew Cagney <cagney@highland.com.au>
diff --git a/sim/ppc/ChangeLog.00 b/sim/ppc/ChangeLog.00
index 8b8be82..9f6612f 100644
--- a/sim/ppc/ChangeLog.00
+++ b/sim/ppc/ChangeLog.00
@@ -505,7 +505,7 @@ Mon Dec 4 17:12:13 1995 Andrew Cagney <cagney@highland.com.au>
* sim-endian.h,c (SIM_ENDIAN_INLINE) bits.h,c (BITS_INLINE):
Change to use the updated inline definitions. If enabled
- immediatly include the corresponding c-code so that it will inline
+ immediately include the corresponding c-code so that it will inline
for all modules.
* inline.h, inline.c (SIM_ENDIAN_INLINE, BITS_INLINE): Remove
diff --git a/sim/ppc/hw_com.c b/sim/ppc/hw_com.c
index 648c4df..38d6d85 100644
--- a/sim/ppc/hw_com.c
+++ b/sim/ppc/hw_com.c
@@ -103,14 +103,14 @@
input-buffering = "unbuffered" (optional)
Specifying "unbuffered" buffering disables buffering on the serial
- devices input stream (all data is immediatly read). In the future,
+ devices input stream (all data is immediately read). In the future,
this option may be used to provide input buffering alternatives.
output-buffering = "unbuffered" (optional)
Specifying "unbuffered" buffering disables buffering on the serial
- devices output stream (all data is immediatly written). In the future,
+ devices output stream (all data is immediately written). In the future,
this option may be extended to include other buffering alternatives.
diff --git a/sim/ppc/ld-cache.h b/sim/ppc/ld-cache.h
index 241a652..9662bd1 100644
--- a/sim/ppc/ld-cache.h
+++ b/sim/ppc/ld-cache.h
@@ -24,7 +24,7 @@
The table that follows determines how each field should be treated.
Importantly it considers the case where the extracted field is to
- be used immediatly or stored in an instruction cache.
+ be used immediately or stored in an instruction cache.
<type>
diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions
index 1b8fd89..1a2e51a 100644
--- a/sim/ppc/ppc-instructions
+++ b/sim/ppc/ppc-instructions
@@ -3355,7 +3355,7 @@ void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia,
spreg new_val = (spr_length(n) == 64
? *rS
: MASKED(*rS, 32, 63));
- /* HACK - time base registers need to be updated immediatly */
+ /* HACK - time base registers need to be updated immediately */
if (WITH_TIME_BASE) {
switch (n) {
case spr_tbu: