2003-06-22 Andrew Cagney <cagney@redhat.com>

	Written by matthew green <mrg@redhat.com>, with fixes from Aldy
	Hernandez <aldyh@redhat.com>, Jim Wilson <wilson@redhat.com>, and
	Nick Clifton <nickc@redhat.com>.

	* ppc-instructions: Include altivec.igen and e500.igen.
	(model_busy, model_data): Add vr_busy and vscr_busy.
	(model_trace_release): Trace vr_busy and vscr_busy.
	(model_new_cycle): Update vr_busy and vscr_busy.
	(model_make_busy): Update vr_busy and vscr_busy.
	* registers.c (register_description): Add Altivec and e500
	registers.
	* psim.c (psim_read_register, psim_read_register): Handle Altivec
	and e500 registers.
	* ppc-spr-table (SPEFSCR): Add VRSAVE and SPEFSCR registers.
	* configure.in (sim_filter): When *altivec* add "av".  When *spe*
	or *simd* add e500.
	(sim_float): When *altivec* define WITH_ALTIVEC.  When *spe* add
	WITH_E500.
	* configure: Re-generate.
	* e500.igen, altivec.igen: New files.
	* e500_expression.h, altivec_expression.h: New files.
	* idecode_expression.h: Update copyright.  Include
	"e500_expression.h" and "altivec_expression.h".
	* e500_registers.h, altivec_registers.h: New files.
	* registers.h: Update copyright.  Include "e500_registers.h" and
	"altivec_registers.h".
	(registers): Add Altivec and e500 specific registers.
	* Makefile.in (IDECODE_H): Add "idecode_e500.h" and
	"idecode_altivec.h".
	(REGISTERS_H): Add "e500_registers.h" and "altivec_registers.h".
	(tmp-igen): Add dependencies on altivec.igen and e500.igen .

1 files changed, 82 insertions, 0 deletions

diff --git a/sim/ppc/psim.c b/sim/ppc/psim.c
index 1eb8e00..c20effb 100644
--- a/sim/ppc/psim.c
+++ b/sim/ppc/psim.c
@@ -848,6 +848,30 @@ psim_read_register(psim *system,
     *(unsigned_word*)cooked_buf = model_get_number_of_cycles(cpu_model(processor));
     break;
 
+#ifdef WITH_ALTIVEC
+  case reg_vr:
+    *(vreg*)cooked_buf = cpu_registers(processor)->altivec.vr[description.index];
+    break;
+
+  case reg_vscr:
+    *(vscreg*)cooked_buf = cpu_registers(processor)->altivec.vscr;
+    break;
+#endif
+
+#ifdef WITH_E500
+  case reg_gprh:
+    *(gpreg*)cooked_buf = cpu_registers(processor)->e500.gprh[description.index];
+    break;
+
+  case reg_evr:
+    *(unsigned64*)cooked_buf = EVR(description.index);
+    break;
+
+  case reg_acc:
+    *(accreg*)cooked_buf = cpu_registers(processor)->e500.acc;
+    break;
+#endif
+
   default:
     printf_filtered("psim_read_register(processor=0x%lx,buf=0x%lx,reg=%s) %s\n",
 		    (unsigned long)processor, (unsigned long)buf, reg,
@@ -873,6 +897,21 @@ psim_read_register(psim *system,
     case 8:
       *(unsigned_8*)buf = H2T_8(*(unsigned_8*)cooked_buf);
       break;
+#ifdef WITH_ALTIVEC
+    case 16:
+      if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
+        {
+	  union { vreg v; unsigned_8 d[2]; } h, t;
+          memcpy(&h.v/*dest*/, cooked_buf/*src*/, description.size);
+	  { _SWAP_8(t.d[0] =, h.d[1]); }
+	  { _SWAP_8(t.d[1] =, h.d[0]); }
+          memcpy(buf/*dest*/, &t/*src*/, description.size);
+          break;
+        }
+      else
+        memcpy(buf/*dest*/, cooked_buf/*src*/, description.size);
+      break;
+#endif
     }
   }
   else {
@@ -937,6 +976,20 @@ psim_write_register(psim *system,
     case 8:
       *(unsigned_8*)cooked_buf = T2H_8(*(unsigned_8*)buf);
       break;
+#ifdef WITH_ALTIVEC
+    case 16:
+      if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
+        {
+	  union { vreg v; unsigned_8 d[2]; } h, t;
+          memcpy(&t.v/*dest*/, buf/*src*/, description.size);
+	  { _SWAP_8(h.d[0] =, t.d[1]); }
+	  { _SWAP_8(h.d[1] =, t.d[0]); }
+          memcpy(cooked_buf/*dest*/, &h/*src*/, description.size);
+          break;
+        }
+      else
+        memcpy(cooked_buf/*dest*/, buf/*src*/, description.size);
+#endif
     }
   }
   else {
@@ -978,6 +1031,35 @@ psim_write_register(psim *system,
     cpu_registers(processor)->fpscr = *(fpscreg*)cooked_buf;
     break;
 
+#ifdef WITH_E500
+  case reg_gprh:
+    cpu_registers(processor)->e500.gprh[description.index] = *(gpreg*)cooked_buf;
+    break;
+
+  case reg_evr:
+    {
+      unsigned64 v;
+      v = *(unsigned64*)cooked_buf;
+      cpu_registers(processor)->e500.gprh[description.index] = v >> 32;
+      cpu_registers(processor)->gpr[description.index] = v;
+      break;
+    }
+
+  case reg_acc:
+    cpu_registers(processor)->e500.acc = *(accreg*)cooked_buf;
+    break;
+#endif
+
+#ifdef WITH_ALTIVEC
+  case reg_vr:
+    cpu_registers(processor)->altivec.vr[description.index] = *(vreg*)cooked_buf;
+    break;
+
+  case reg_vscr:
+    cpu_registers(processor)->altivec.vscr = *(vscreg*)cooked_buf;
+    break;
+#endif
+
   default:
     printf_filtered("psim_write_register(processor=0x%lx,cooked_buf=0x%lx,reg=%s) %s\n",
 		    (unsigned long)processor, (unsigned long)cooked_buf, reg,