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| author | Michael Meissner <gnu@the-meissners.org> | 1995-11-24 16:44:37 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1995-11-24 16:44:37 +0000 |
| commit | 45525d8d6da63f0dead75426c3b84f33d8289da9 (patch) | |
| tree | 7330a21a4b19e72e3cf46570fce4aa8963271680 /sim/ppc/ppc-cache-rules | |
| parent | 46c065ab31c014af2cb61a65a489a389400b3230 (diff) | |
| download | gdb-45525d8d6da63f0dead75426c3b84f33d8289da9.zip gdb-45525d8d6da63f0dead75426c3b84f33d8289da9.tar.gz gdb-45525d8d6da63f0dead75426c3b84f33d8289da9.tar.bz2 | |
Fix warnings to everything can be compiled with -Wall; Redo model specific changes once again to speed things up
Diffstat (limited to 'sim/ppc/ppc-cache-rules')
| -rw-r--r-- | sim/ppc/ppc-cache-rules | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/sim/ppc/ppc-cache-rules b/sim/ppc/ppc-cache-rules index 9dad017..939b943 100644 --- a/sim/ppc/ppc-cache-rules +++ b/sim/ppc/ppc-cache-rules @@ -55,29 +55,44 @@ # 1:RA:RA:: 1:RA:rA:signed_word *:(cpu_registers(processor)->gpr + RA) +1:RA:RA_BITMASK:unsigned32:(1 << RA) 1:RT:RT:: 1:RT:rT:signed_word *:(cpu_registers(processor)->gpr + RT) +1:RT:RT_BITMASK:unsigned32:(1 << RT) 2:RS:RS:: 1:RS:rS:signed_word *:(cpu_registers(processor)->gpr + RS) +1:RS:RS_BITMASK:unsigned32:(1 << RS) 2:RB:RB:: 1:RB:rB:signed_word *:(cpu_registers(processor)->gpr + RB) +1:RB:RB_BITMASK:unsigned32:(1 << RB) 2:FRA:FRA:: 1:FRA:frA:unsigned64 *:(cpu_registers(processor)->fpr + FRA) +1:FRA:FRA_BITMASK:unsigned32:(1 << FRA) 2:FRB:FRB:: 1:FRB:frB:unsigned64 *:(cpu_registers(processor)->fpr + FRB) +1:FRB:FRB_BITMASK:unsigned32:(1 << FRB) 2:FRC:FRC:: 1:FRC:frC:unsigned64 *:(cpu_registers(processor)->fpr + FRC) +1:FRC:FRC_BITMASK:unsigned32:(1 << FRC) 2:FRS:FRS:: 1:FRS:frS:unsigned64 *:(cpu_registers(processor)->fpr + FRS) +1:FRS:FRS_BITMASK:unsigned32:(1 << FRS) 2:FRT:FRT:: 1:FRT:frT:unsigned64 *:(cpu_registers(processor)->fpr + FRT) +1:FRT:FRT_BITMASK:unsigned32:(1 << FRT) 1:SI:EXTS_SI:unsigned_word:((signed_word)(signed16)instruction) 2:BI:BI:: 1:BI:BIT32_BI::BIT32(BI) +1:BF:BF:: +1:BF:BF_BITMASK:unsigned32:(1 << BF) 2:BA:BA:: 1:BA:BIT32_BA::BIT32(BA) +1:BA:BA_BITMASK:unsigned32:(1 << BA) 2:BB:BB:: 1:BB:BIT32_BB::BIT32(BB) +1:BB:BB_BITMASK:unsigned32:(1 << BB) +1:BT:BT:: +1:BT:BT_BITMASK:unsigned32:(1 << BT) 1:BD:EXTS_BD_0b00:unsigned_word:(((signed_word)(signed16)instruction) & ~3) #1:BD:CIA_plus_EXTS_BD_0b00:unsigned_word:CIA + EXTS(BD_0b00) 1:LI:EXTS_LI_0b00:unsigned_word:((((signed_word)(signed32)(instruction << 6)) >> 6) & ~0x3) |